RTEMS 6.1-rc5
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x86_64.h
1/*
2 * Copyright (c) 2018 Amaan Cheval <amaan.cheval@gmail.com>
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26#ifndef _RTEMS_SCORE_X86_64_H
27#define _RTEMS_SCORE_X86_64_H
28
29#ifdef __cplusplus
30extern "C" {
31#endif
32
33#define CPU_NAME "x86-64"
34#define CPU_MODEL_NAME "amd64"
35
36#define COM1_BASE_IO 0x3F8
37#define COM1_CLOCK_RATE (115200 * 16)
38
39#define EFLAGS_INTR_ENABLE 0x200
40
41#define FSBASE_MSR 0xC0000100
42
43#if DEBUG
44#define DBG_PRINTF(format, args...) \
45 printf(format, ## args)
46#else
47#define DBG_PRINTF(format, args...)
48#endif
49
50#ifdef __cplusplus
51}
52#endif
53
54#endif /* _RTEMS_SCORE_X86_64_H */