RTEMS 6.1-rc5
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Data Structures | Macros | Functions
stm32h7xx_ll_sdmmc.h File Reference

Header file of SDMMC HAL module. More...

#include "stm32h7xx_hal_def.h"

Go to the source code of this file.

Data Structures

struct  SDMMC_InitTypeDef
 SDMMC Configuration Structure definition. More...
 
struct  SDMMC_CmdInitTypeDef
 SDMMC Command Control structure. More...
 
struct  SDMMC_DataInitTypeDef
 SDMMC Data Control structure. More...
 

Macros

#define SDMMC_ERROR_NONE   ((uint32_t)0x00000000U)
 
#define SDMMC_ERROR_CMD_CRC_FAIL   ((uint32_t)0x00000001U)
 
#define SDMMC_ERROR_DATA_CRC_FAIL   ((uint32_t)0x00000002U)
 
#define SDMMC_ERROR_CMD_RSP_TIMEOUT   ((uint32_t)0x00000004U)
 
#define SDMMC_ERROR_DATA_TIMEOUT   ((uint32_t)0x00000008U)
 
#define SDMMC_ERROR_TX_UNDERRUN   ((uint32_t)0x00000010U)
 
#define SDMMC_ERROR_RX_OVERRUN   ((uint32_t)0x00000020U)
 
#define SDMMC_ERROR_ADDR_MISALIGNED   ((uint32_t)0x00000040U)
 
#define SDMMC_ERROR_BLOCK_LEN_ERR   ((uint32_t)0x00000080U)
 
#define SDMMC_ERROR_ERASE_SEQ_ERR   ((uint32_t)0x00000100U)
 
#define SDMMC_ERROR_BAD_ERASE_PARAM   ((uint32_t)0x00000200U)
 
#define SDMMC_ERROR_WRITE_PROT_VIOLATION   ((uint32_t)0x00000400U)
 
#define SDMMC_ERROR_LOCK_UNLOCK_FAILED   ((uint32_t)0x00000800U)
 
#define SDMMC_ERROR_COM_CRC_FAILED   ((uint32_t)0x00001000U)
 
#define SDMMC_ERROR_ILLEGAL_CMD   ((uint32_t)0x00002000U)
 
#define SDMMC_ERROR_CARD_ECC_FAILED   ((uint32_t)0x00004000U)
 
#define SDMMC_ERROR_CC_ERR   ((uint32_t)0x00008000U)
 
#define SDMMC_ERROR_GENERAL_UNKNOWN_ERR   ((uint32_t)0x00010000U)
 
#define SDMMC_ERROR_STREAM_READ_UNDERRUN   ((uint32_t)0x00020000U)
 
#define SDMMC_ERROR_STREAM_WRITE_OVERRUN   ((uint32_t)0x00040000U)
 
#define SDMMC_ERROR_CID_CSD_OVERWRITE   ((uint32_t)0x00080000U)
 
#define SDMMC_ERROR_WP_ERASE_SKIP   ((uint32_t)0x00100000U)
 
#define SDMMC_ERROR_CARD_ECC_DISABLED   ((uint32_t)0x00200000U)
 
#define SDMMC_ERROR_ERASE_RESET   ((uint32_t)0x00400000U)
 
#define SDMMC_ERROR_AKE_SEQ_ERR   ((uint32_t)0x00800000U)
 
#define SDMMC_ERROR_INVALID_VOLTRANGE   ((uint32_t)0x01000000U)
 
#define SDMMC_ERROR_ADDR_OUT_OF_RANGE   ((uint32_t)0x02000000U)
 
#define SDMMC_ERROR_REQUEST_NOT_APPLICABLE   ((uint32_t)0x04000000U)
 
#define SDMMC_ERROR_INVALID_PARAMETER   ((uint32_t)0x08000000U)
 
#define SDMMC_ERROR_UNSUPPORTED_FEATURE   ((uint32_t)0x10000000U)
 
#define SDMMC_ERROR_BUSY   ((uint32_t)0x20000000U)
 
#define SDMMC_ERROR_DMA   ((uint32_t)0x40000000U)
 
#define SDMMC_ERROR_TIMEOUT   ((uint32_t)0x80000000U)
 
#define SDMMC_CMD_GO_IDLE_STATE   ((uint8_t)0U)
 SDMMC Commands Index.
 
#define SDMMC_CMD_SEND_OP_COND   ((uint8_t)1U)
 
#define SDMMC_CMD_ALL_SEND_CID   ((uint8_t)2U)
 
#define SDMMC_CMD_SET_REL_ADDR   ((uint8_t)3U)
 
#define SDMMC_CMD_SET_DSR   ((uint8_t)4U)
 
#define SDMMC_CMD_SDMMC_SEN_OP_COND   ((uint8_t)5U)
 
#define SDMMC_CMD_HS_SWITCH   ((uint8_t)6U)
 
#define SDMMC_CMD_SEL_DESEL_CARD   ((uint8_t)7U)
 
#define SDMMC_CMD_HS_SEND_EXT_CSD   ((uint8_t)8U)
 
#define SDMMC_CMD_SEND_CSD   ((uint8_t)9U)
 
#define SDMMC_CMD_SEND_CID   ((uint8_t)10U)
 
#define SDMMC_CMD_VOLTAGE_SWITCH   ((uint8_t)11U)
 
#define SDMMC_CMD_STOP_TRANSMISSION   ((uint8_t)12U)
 
#define SDMMC_CMD_SEND_STATUS   ((uint8_t)13U)
 
#define SDMMC_CMD_HS_BUSTEST_READ   ((uint8_t)14U)
 
#define SDMMC_CMD_GO_INACTIVE_STATE   ((uint8_t)15U)
 
#define SDMMC_CMD_SET_BLOCKLEN   ((uint8_t)16U)
 
#define SDMMC_CMD_READ_SINGLE_BLOCK   ((uint8_t)17U)
 
#define SDMMC_CMD_READ_MULT_BLOCK   ((uint8_t)18U)
 
#define SDMMC_CMD_HS_BUSTEST_WRITE   ((uint8_t)19U)
 
#define SDMMC_CMD_WRITE_DAT_UNTIL_STOP   ((uint8_t)20U)
 
#define SDMMC_CMD_SET_BLOCK_COUNT   ((uint8_t)23U)
 
#define SDMMC_CMD_WRITE_SINGLE_BLOCK   ((uint8_t)24U)
 
#define SDMMC_CMD_WRITE_MULT_BLOCK   ((uint8_t)25U)
 
#define SDMMC_CMD_PROG_CID   ((uint8_t)26U)
 
#define SDMMC_CMD_PROG_CSD   ((uint8_t)27U)
 
#define SDMMC_CMD_SET_WRITE_PROT   ((uint8_t)28U)
 
#define SDMMC_CMD_CLR_WRITE_PROT   ((uint8_t)29U)
 
#define SDMMC_CMD_SEND_WRITE_PROT   ((uint8_t)30U)
 
#define SDMMC_CMD_SD_ERASE_GRP_START   ((uint8_t)32U)
 
#define SDMMC_CMD_SD_ERASE_GRP_END   ((uint8_t)33U)
 
#define SDMMC_CMD_ERASE_GRP_START   ((uint8_t)35U)
 
#define SDMMC_CMD_ERASE_GRP_END   ((uint8_t)36U)
 
#define SDMMC_CMD_ERASE   ((uint8_t)38U)
 
#define SDMMC_CMD_FAST_IO   ((uint8_t)39U)
 
#define SDMMC_CMD_GO_IRQ_STATE   ((uint8_t)40U)
 
#define SDMMC_CMD_LOCK_UNLOCK   ((uint8_t)42U)
 
#define SDMMC_CMD_APP_CMD   ((uint8_t)55U)
 
#define SDMMC_CMD_GEN_CMD   ((uint8_t)56U)
 
#define SDMMC_CMD_NO_CMD   ((uint8_t)64U)
 
#define SDMMC_CMD_APP_SD_SET_BUSWIDTH   ((uint8_t)6U)
 Following commands are SD Card Specific commands. SDMMC_APP_CMD should be sent before sending these commands.
 
#define SDMMC_CMD_SD_APP_STATUS   ((uint8_t)13U)
 
#define SDMMC_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS   ((uint8_t)22U)
 
#define SDMMC_CMD_SD_APP_OP_COND   ((uint8_t)41U)
 
#define SDMMC_CMD_SD_APP_SET_CLR_CARD_DETECT   ((uint8_t)42U)
 
#define SDMMC_CMD_SD_APP_SEND_SCR   ((uint8_t)51U)
 
#define SDMMC_CMD_SDMMC_RW_DIRECT   ((uint8_t)52U)
 
#define SDMMC_CMD_SDMMC_RW_EXTENDED   ((uint8_t)53U)
 
#define SDMMC_CMD_MMC_SLEEP_AWAKE   ((uint8_t)5U)
 Following commands are MMC Specific commands.
 
#define SDMMC_CMD_SD_APP_GET_MKB   ((uint8_t)43U)
 Following commands are SD Card Specific security commands. SDMMC_CMD_APP_CMD should be sent before sending these commands.
 
#define SDMMC_CMD_SD_APP_GET_MID   ((uint8_t)44U)
 
#define SDMMC_CMD_SD_APP_SET_CER_RN1   ((uint8_t)45U)
 
#define SDMMC_CMD_SD_APP_GET_CER_RN2   ((uint8_t)46U)
 
#define SDMMC_CMD_SD_APP_SET_CER_RES2   ((uint8_t)47U)
 
#define SDMMC_CMD_SD_APP_GET_CER_RES1   ((uint8_t)48U)
 
#define SDMMC_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK   ((uint8_t)18U)
 
#define SDMMC_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK   ((uint8_t)25U)
 
#define SDMMC_CMD_SD_APP_SECURE_ERASE   ((uint8_t)38U)
 
#define SDMMC_CMD_SD_APP_CHANGE_SECURE_AREA   ((uint8_t)49U)
 
#define SDMMC_CMD_SD_APP_SECURE_WRITE_MKB   ((uint8_t)48U)
 
#define SDMMC_OCR_ADDR_OUT_OF_RANGE   ((uint32_t)0x80000000U)
 Masks for errors Card Status R1 (OCR Register)
 
#define SDMMC_OCR_ADDR_MISALIGNED   ((uint32_t)0x40000000U)
 
#define SDMMC_OCR_BLOCK_LEN_ERR   ((uint32_t)0x20000000U)
 
#define SDMMC_OCR_ERASE_SEQ_ERR   ((uint32_t)0x10000000U)
 
#define SDMMC_OCR_BAD_ERASE_PARAM   ((uint32_t)0x08000000U)
 
#define SDMMC_OCR_WRITE_PROT_VIOLATION   ((uint32_t)0x04000000U)
 
#define SDMMC_OCR_LOCK_UNLOCK_FAILED   ((uint32_t)0x01000000U)
 
#define SDMMC_OCR_COM_CRC_FAILED   ((uint32_t)0x00800000U)
 
#define SDMMC_OCR_ILLEGAL_CMD   ((uint32_t)0x00400000U)
 
#define SDMMC_OCR_CARD_ECC_FAILED   ((uint32_t)0x00200000U)
 
#define SDMMC_OCR_CC_ERROR   ((uint32_t)0x00100000U)
 
#define SDMMC_OCR_GENERAL_UNKNOWN_ERROR   ((uint32_t)0x00080000U)
 
#define SDMMC_OCR_STREAM_READ_UNDERRUN   ((uint32_t)0x00040000U)
 
#define SDMMC_OCR_STREAM_WRITE_OVERRUN   ((uint32_t)0x00020000U)
 
#define SDMMC_OCR_CID_CSD_OVERWRITE   ((uint32_t)0x00010000U)
 
#define SDMMC_OCR_WP_ERASE_SKIP   ((uint32_t)0x00008000U)
 
#define SDMMC_OCR_CARD_ECC_DISABLED   ((uint32_t)0x00004000U)
 
#define SDMMC_OCR_ERASE_RESET   ((uint32_t)0x00002000U)
 
#define SDMMC_OCR_AKE_SEQ_ERROR   ((uint32_t)0x00000008U)
 
#define SDMMC_OCR_ERRORBITS   ((uint32_t)0xFDFFE008U)
 
#define SDMMC_R6_GENERAL_UNKNOWN_ERROR   ((uint32_t)0x00002000U)
 Masks for R6 Response.
 
#define SDMMC_R6_ILLEGAL_CMD   ((uint32_t)0x00004000U)
 
#define SDMMC_R6_COM_CRC_FAILED   ((uint32_t)0x00008000U)
 
#define SDMMC_VOLTAGE_WINDOW_SD   ((uint32_t)0x80100000U)
 
#define SDMMC_HIGH_CAPACITY   ((uint32_t)0x40000000U)
 
#define SDMMC_STD_CAPACITY   ((uint32_t)0x00000000U)
 
#define SDMMC_CHECK_PATTERN   ((uint32_t)0x000001AAU)
 
#define SD_SWITCH_1_8V_CAPACITY   ((uint32_t)0x01000000U)
 
#define SDMMC_DDR50_SWITCH_PATTERN   ((uint32_t)0x80FFFF04U)
 
#define SDMMC_SDR104_SWITCH_PATTERN   ((uint32_t)0x80FF1F03U)
 
#define SDMMC_SDR50_SWITCH_PATTERN   ((uint32_t)0x80FF1F02U)
 
#define SDMMC_SDR25_SWITCH_PATTERN   ((uint32_t)0x80FFFF01U)
 
#define SDMMC_SDR12_SWITCH_PATTERN   ((uint32_t)0x80FFFF00U)
 
#define SDMMC_MAX_VOLT_TRIAL   ((uint32_t)0x0000FFFFU)
 
#define SDMMC_MAX_TRIAL   ((uint32_t)0x0000FFFFU)
 
#define SDMMC_ALLZERO   ((uint32_t)0x00000000U)
 
#define SDMMC_WIDE_BUS_SUPPORT   ((uint32_t)0x00040000U)
 
#define SDMMC_SINGLE_BUS_SUPPORT   ((uint32_t)0x00010000U)
 
#define SDMMC_CARD_LOCKED   ((uint32_t)0x02000000U)
 
#define SDMMC_DATATIMEOUT   ((uint32_t)0xFFFFFFFFU)
 
#define SDMMC_0TO7BITS   ((uint32_t)0x000000FFU)
 
#define SDMMC_8TO15BITS   ((uint32_t)0x0000FF00U)
 
#define SDMMC_16TO23BITS   ((uint32_t)0x00FF0000U)
 
#define SDMMC_24TO31BITS   ((uint32_t)0xFF000000U)
 
#define SDMMC_MAX_DATA_LENGTH   ((uint32_t)0x01FFFFFFU)
 
#define SDMMC_HALFFIFO   ((uint32_t)0x00000008U)
 
#define SDMMC_HALFFIFOBYTES   ((uint32_t)0x00000020U)
 
#define SDMMC_CCCC_ERASE   ((uint32_t)0x00000020U)
 Command Class supported.
 
#define SDMMC_CMDTIMEOUT   ((uint32_t)5000U) /* Command send and response timeout */
 
#define SDMMC_MAXERASETIMEOUT   ((uint32_t)63000U) /* Max erase Timeout 63 s */
 
#define SDMMC_STOPTRANSFERTIMEOUT   ((uint32_t)100000000U) /* Timeout for STOP TRANSMISSION command */
 
#define SDMMC_CLOCK_EDGE_RISING   ((uint32_t)0x00000000U)
 
#define SDMMC_CLOCK_EDGE_FALLING   SDMMC_CLKCR_NEGEDGE
 
#define IS_SDMMC_CLOCK_EDGE(EDGE)
 
#define SDMMC_CLOCK_POWER_SAVE_DISABLE   ((uint32_t)0x00000000U)
 
#define SDMMC_CLOCK_POWER_SAVE_ENABLE   SDMMC_CLKCR_PWRSAV
 
#define IS_SDMMC_CLOCK_POWER_SAVE(SAVE)
 
#define SDMMC_BUS_WIDE_1B   ((uint32_t)0x00000000U)
 
#define SDMMC_BUS_WIDE_4B   SDMMC_CLKCR_WIDBUS_0
 
#define SDMMC_BUS_WIDE_8B   SDMMC_CLKCR_WIDBUS_1
 
#define IS_SDMMC_BUS_WIDE(WIDE)
 
#define SDMMC_SPEED_MODE_AUTO   ((uint32_t)0x00000000U)
 
#define SDMMC_SPEED_MODE_DEFAULT   ((uint32_t)0x00000001U)
 
#define SDMMC_SPEED_MODE_HIGH   ((uint32_t)0x00000002U)
 
#define SDMMC_SPEED_MODE_ULTRA   ((uint32_t)0x00000003U)
 
#define SDMMC_SPEED_MODE_ULTRA_SDR104   SDMMC_SPEED_MODE_ULTRA
 
#define SDMMC_SPEED_MODE_DDR   ((uint32_t)0x00000004U)
 
#define SDMMC_SPEED_MODE_ULTRA_SDR50   ((uint32_t)0x00000005U)
 
#define IS_SDMMC_SPEED_MODE(MODE)
 
#define SDMMC_HARDWARE_FLOW_CONTROL_DISABLE   ((uint32_t)0x00000000U)
 
#define SDMMC_HARDWARE_FLOW_CONTROL_ENABLE   SDMMC_CLKCR_HWFC_EN
 
#define IS_SDMMC_HARDWARE_FLOW_CONTROL(CONTROL)
 
#define IS_SDMMC_CLKDIV(DIV)   ((DIV) < 0x400U)
 
#define SDMMC_TRANSCEIVER_UNKNOWN   ((uint32_t)0x00000000U)
 
#define SDMMC_TRANSCEIVER_NOT_PRESENT   ((uint32_t)0x00000001U)
 
#define SDMMC_TRANSCEIVER_PRESENT   ((uint32_t)0x00000002U)
 
#define IS_SDMMC_CMD_INDEX(INDEX)   ((INDEX) < 0x40U)
 
#define SDMMC_RESPONSE_NO   ((uint32_t)0x00000000U)
 
#define SDMMC_RESPONSE_SHORT   SDMMC_CMD_WAITRESP_0
 
#define SDMMC_RESPONSE_LONG   SDMMC_CMD_WAITRESP
 
#define IS_SDMMC_RESPONSE(RESPONSE)
 
#define SDMMC_WAIT_NO   ((uint32_t)0x00000000U)
 
#define SDMMC_WAIT_IT   SDMMC_CMD_WAITINT
 
#define SDMMC_WAIT_PEND   SDMMC_CMD_WAITPEND
 
#define IS_SDMMC_WAIT(WAIT)
 
#define SDMMC_CPSM_DISABLE   ((uint32_t)0x00000000U)
 
#define SDMMC_CPSM_ENABLE   SDMMC_CMD_CPSMEN
 
#define IS_SDMMC_CPSM(CPSM)
 
#define SDMMC_RESP1   ((uint32_t)0x00000000U)
 
#define SDMMC_RESP2   ((uint32_t)0x00000004U)
 
#define SDMMC_RESP3   ((uint32_t)0x00000008U)
 
#define SDMMC_RESP4   ((uint32_t)0x0000000CU)
 
#define IS_SDMMC_RESP(RESP)
 
#define SDMMC_DISABLE_IDMA   ((uint32_t)0x00000000)
 
#define SDMMC_ENABLE_IDMA_SINGLE_BUFF   (SDMMC_IDMA_IDMAEN)
 
#define SDMMC_ENABLE_IDMA_DOUBLE_BUFF0   (SDMMC_IDMA_IDMAEN | SDMMC_IDMA_IDMABMODE)
 
#define SDMMC_ENABLE_IDMA_DOUBLE_BUFF1   (SDMMC_IDMA_IDMAEN | SDMMC_IDMA_IDMABMODE | SDMMC_IDMA_IDMABACT)
 
#define IS_SDMMC_DATA_LENGTH(LENGTH)   ((LENGTH) <= 0x01FFFFFFU)
 
#define SDMMC_DATABLOCK_SIZE_1B   ((uint32_t)0x00000000U)
 
#define SDMMC_DATABLOCK_SIZE_2B   SDMMC_DCTRL_DBLOCKSIZE_0
 
#define SDMMC_DATABLOCK_SIZE_4B   SDMMC_DCTRL_DBLOCKSIZE_1
 
#define SDMMC_DATABLOCK_SIZE_8B   (SDMMC_DCTRL_DBLOCKSIZE_0|SDMMC_DCTRL_DBLOCKSIZE_1)
 
#define SDMMC_DATABLOCK_SIZE_16B   SDMMC_DCTRL_DBLOCKSIZE_2
 
#define SDMMC_DATABLOCK_SIZE_32B   (SDMMC_DCTRL_DBLOCKSIZE_0|SDMMC_DCTRL_DBLOCKSIZE_2)
 
#define SDMMC_DATABLOCK_SIZE_64B   (SDMMC_DCTRL_DBLOCKSIZE_1|SDMMC_DCTRL_DBLOCKSIZE_2)
 
#define SDMMC_DATABLOCK_SIZE_128B
 
#define SDMMC_DATABLOCK_SIZE_256B   SDMMC_DCTRL_DBLOCKSIZE_3
 
#define SDMMC_DATABLOCK_SIZE_512B   (SDMMC_DCTRL_DBLOCKSIZE_0|SDMMC_DCTRL_DBLOCKSIZE_3)
 
#define SDMMC_DATABLOCK_SIZE_1024B   (SDMMC_DCTRL_DBLOCKSIZE_1|SDMMC_DCTRL_DBLOCKSIZE_3)
 
#define SDMMC_DATABLOCK_SIZE_2048B
 
#define SDMMC_DATABLOCK_SIZE_4096B   (SDMMC_DCTRL_DBLOCKSIZE_2|SDMMC_DCTRL_DBLOCKSIZE_3)
 
#define SDMMC_DATABLOCK_SIZE_8192B
 
#define SDMMC_DATABLOCK_SIZE_16384B
 
#define IS_SDMMC_BLOCK_SIZE(SIZE)
 
#define SDMMC_TRANSFER_DIR_TO_CARD   ((uint32_t)0x00000000U)
 
#define SDMMC_TRANSFER_DIR_TO_SDMMC   SDMMC_DCTRL_DTDIR
 
#define IS_SDMMC_TRANSFER_DIR(DIR)
 
#define SDMMC_TRANSFER_MODE_BLOCK   ((uint32_t)0x00000000U)
 
#define SDMMC_TRANSFER_MODE_STREAM   SDMMC_DCTRL_DTMODE_1
 
#define IS_SDMMC_TRANSFER_MODE(MODE)
 
#define SDMMC_DPSM_DISABLE   ((uint32_t)0x00000000U)
 
#define SDMMC_DPSM_ENABLE   SDMMC_DCTRL_DTEN
 
#define IS_SDMMC_DPSM(DPSM)
 
#define SDMMC_READ_WAIT_MODE_DATA2   ((uint32_t)0x00000000U)
 
#define SDMMC_READ_WAIT_MODE_CLK   (SDMMC_DCTRL_RWMOD)
 
#define IS_SDMMC_READWAIT_MODE(MODE)
 
#define SDMMC_IT_CCRCFAIL   SDMMC_MASK_CCRCFAILIE
 
#define SDMMC_IT_DCRCFAIL   SDMMC_MASK_DCRCFAILIE
 
#define SDMMC_IT_CTIMEOUT   SDMMC_MASK_CTIMEOUTIE
 
#define SDMMC_IT_DTIMEOUT   SDMMC_MASK_DTIMEOUTIE
 
#define SDMMC_IT_TXUNDERR   SDMMC_MASK_TXUNDERRIE
 
#define SDMMC_IT_RXOVERR   SDMMC_MASK_RXOVERRIE
 
#define SDMMC_IT_CMDREND   SDMMC_MASK_CMDRENDIE
 
#define SDMMC_IT_CMDSENT   SDMMC_MASK_CMDSENTIE
 
#define SDMMC_IT_DATAEND   SDMMC_MASK_DATAENDIE
 
#define SDMMC_IT_DHOLD   SDMMC_MASK_DHOLDIE
 
#define SDMMC_IT_DBCKEND   SDMMC_MASK_DBCKENDIE
 
#define SDMMC_IT_DABORT   SDMMC_MASK_DABORTIE
 
#define SDMMC_IT_TXFIFOHE   SDMMC_MASK_TXFIFOHEIE
 
#define SDMMC_IT_RXFIFOHF   SDMMC_MASK_RXFIFOHFIE
 
#define SDMMC_IT_RXFIFOF   SDMMC_MASK_RXFIFOFIE
 
#define SDMMC_IT_TXFIFOE   SDMMC_MASK_TXFIFOEIE
 
#define SDMMC_IT_BUSYD0END   SDMMC_MASK_BUSYD0ENDIE
 
#define SDMMC_IT_SDIOIT   SDMMC_MASK_SDIOITIE
 
#define SDMMC_IT_ACKFAIL   SDMMC_MASK_ACKFAILIE
 
#define SDMMC_IT_ACKTIMEOUT   SDMMC_MASK_ACKTIMEOUTIE
 
#define SDMMC_IT_VSWEND   SDMMC_MASK_VSWENDIE
 
#define SDMMC_IT_CKSTOP   SDMMC_MASK_CKSTOPIE
 
#define SDMMC_IT_IDMABTC   SDMMC_MASK_IDMABTCIE
 
#define SDMMC_FLAG_CCRCFAIL   SDMMC_STA_CCRCFAIL
 
#define SDMMC_FLAG_DCRCFAIL   SDMMC_STA_DCRCFAIL
 
#define SDMMC_FLAG_CTIMEOUT   SDMMC_STA_CTIMEOUT
 
#define SDMMC_FLAG_DTIMEOUT   SDMMC_STA_DTIMEOUT
 
#define SDMMC_FLAG_TXUNDERR   SDMMC_STA_TXUNDERR
 
#define SDMMC_FLAG_RXOVERR   SDMMC_STA_RXOVERR
 
#define SDMMC_FLAG_CMDREND   SDMMC_STA_CMDREND
 
#define SDMMC_FLAG_CMDSENT   SDMMC_STA_CMDSENT
 
#define SDMMC_FLAG_DATAEND   SDMMC_STA_DATAEND
 
#define SDMMC_FLAG_DHOLD   SDMMC_STA_DHOLD
 
#define SDMMC_FLAG_DBCKEND   SDMMC_STA_DBCKEND
 
#define SDMMC_FLAG_DABORT   SDMMC_STA_DABORT
 
#define SDMMC_FLAG_DPSMACT   SDMMC_STA_DPSMACT
 
#define SDMMC_FLAG_CMDACT   SDMMC_STA_CPSMACT
 
#define SDMMC_FLAG_TXFIFOHE   SDMMC_STA_TXFIFOHE
 
#define SDMMC_FLAG_RXFIFOHF   SDMMC_STA_RXFIFOHF
 
#define SDMMC_FLAG_TXFIFOF   SDMMC_STA_TXFIFOF
 
#define SDMMC_FLAG_RXFIFOF   SDMMC_STA_RXFIFOF
 
#define SDMMC_FLAG_TXFIFOE   SDMMC_STA_TXFIFOE
 
#define SDMMC_FLAG_RXFIFOE   SDMMC_STA_RXFIFOE
 
#define SDMMC_FLAG_BUSYD0   SDMMC_STA_BUSYD0
 
#define SDMMC_FLAG_BUSYD0END   SDMMC_STA_BUSYD0END
 
#define SDMMC_FLAG_SDIOIT   SDMMC_STA_SDIOIT
 
#define SDMMC_FLAG_ACKFAIL   SDMMC_STA_ACKFAIL
 
#define SDMMC_FLAG_ACKTIMEOUT   SDMMC_STA_ACKTIMEOUT
 
#define SDMMC_FLAG_VSWEND   SDMMC_STA_VSWEND
 
#define SDMMC_FLAG_CKSTOP   SDMMC_STA_CKSTOP
 
#define SDMMC_FLAG_IDMATE   SDMMC_STA_IDMATE
 
#define SDMMC_FLAG_IDMABTC   SDMMC_STA_IDMABTC
 
#define SDMMC_STATIC_FLAGS
 
#define SDMMC_STATIC_CMD_FLAGS
 
#define SDMMC_STATIC_DATA_FLAGS
 
#define CLKCR_CLEAR_MASK
 
#define DCTRL_CLEAR_MASK
 
#define CMD_CLEAR_MASK
 
#define SDMMC_INIT_CLK_DIV   ((uint8_t)0xFA)
 
#define SDMMC_NSPEED_CLK_DIV   ((uint8_t)0x4)
 
#define SDMMC_HSPEED_CLK_DIV   ((uint8_t)0x2)
 
#define __SDMMC_ENABLE_IT(__INSTANCE__, __INTERRUPT__)   ((__INSTANCE__)->MASK |= (__INTERRUPT__))
 Enable the SDMMC device interrupt.
 
#define __SDMMC_DISABLE_IT(__INSTANCE__, __INTERRUPT__)   ((__INSTANCE__)->MASK &= ~(__INTERRUPT__))
 Disable the SDMMC device interrupt.
 
#define __SDMMC_GET_FLAG(__INSTANCE__, __FLAG__)   (((__INSTANCE__)->STA &(__FLAG__)) != 0U)
 Checks whether the specified SDMMC flag is set or not.
 
#define __SDMMC_CLEAR_FLAG(__INSTANCE__, __FLAG__)   ((__INSTANCE__)->ICR = (__FLAG__))
 Clears the SDMMC pending flags.
 
#define __SDMMC_GET_IT(__INSTANCE__, __INTERRUPT__)   (((__INSTANCE__)->STA &(__INTERRUPT__)) == (__INTERRUPT__))
 Checks whether the specified SDMMC interrupt has occurred or not.
 
#define __SDMMC_CLEAR_IT(__INSTANCE__, __INTERRUPT__)   ((__INSTANCE__)->ICR = (__INTERRUPT__))
 Clears the SDMMC's interrupt pending bits.
 
#define __SDMMC_START_READWAIT_ENABLE(__INSTANCE__)   ((__INSTANCE__)->DCTRL |= SDMMC_DCTRL_RWSTART)
 Enable Start the SD I/O Read Wait operation.
 
#define __SDMMC_START_READWAIT_DISABLE(__INSTANCE__)   ((__INSTANCE__)->DCTRL &= ~SDMMC_DCTRL_RWSTART)
 Disable Start the SD I/O Read Wait operations.
 
#define __SDMMC_STOP_READWAIT_ENABLE(__INSTANCE__)   ((__INSTANCE__)->DCTRL |= SDMMC_DCTRL_RWSTOP)
 Enable Start the SD I/O Read Wait operation.
 
#define __SDMMC_STOP_READWAIT_DISABLE(__INSTANCE__)   ((__INSTANCE__)->DCTRL &= ~SDMMC_DCTRL_RWSTOP)
 Disable Stop the SD I/O Read Wait operations.
 
#define __SDMMC_OPERATION_ENABLE(__INSTANCE__)   ((__INSTANCE__)->DCTRL |= SDMMC_DCTRL_SDIOEN)
 Enable the SD I/O Mode Operation.
 
#define __SDMMC_OPERATION_DISABLE(__INSTANCE__)   ((__INSTANCE__)->DCTRL &= ~SDMMC_DCTRL_SDIOEN)
 Disable the SD I/O Mode Operation.
 
#define __SDMMC_SUSPEND_CMD_ENABLE(__INSTANCE__)   ((__INSTANCE__)->CMD |= SDMMC_CMD_CMDSUSPEND)
 Enable the SD I/O Suspend command sending.
 
#define __SDMMC_SUSPEND_CMD_DISABLE(__INSTANCE__)   ((__INSTANCE__)->CMD &= ~SDMMC_CMD_CMDSUSPEND)
 Disable the SD I/O Suspend command sending.
 
#define __SDMMC_CMDTRANS_ENABLE(__INSTANCE__)   ((__INSTANCE__)->CMD |= SDMMC_CMD_CMDTRANS)
 Enable the CMDTRANS mode.
 
#define __SDMMC_CMDTRANS_DISABLE(__INSTANCE__)   ((__INSTANCE__)->CMD &= ~SDMMC_CMD_CMDTRANS)
 Disable the CMDTRANS mode.
 
#define __SDMMC_CMDSTOP_ENABLE(__INSTANCE__)   ((__INSTANCE__)->CMD |= SDMMC_CMD_CMDSTOP)
 Enable the CMDSTOP mode.
 
#define __SDMMC_CMDSTOP_DISABLE(__INSTANCE__)   ((__INSTANCE__)->CMD &= ~SDMMC_CMD_CMDSTOP)
 Disable the CMDSTOP mode.
 

Functions

HAL_StatusTypeDef SDMMC_Init (SDMMC_TypeDef *SDMMCx, SDMMC_InitTypeDef Init)
 
uint32_t SDMMC_ReadFIFO (SDMMC_TypeDef *SDMMCx)
 
HAL_StatusTypeDef SDMMC_WriteFIFO (SDMMC_TypeDef *SDMMCx, uint32_t *pWriteData)
 
HAL_StatusTypeDef SDMMC_PowerState_ON (SDMMC_TypeDef *SDMMCx)
 
HAL_StatusTypeDef SDMMC_PowerState_Cycle (SDMMC_TypeDef *SDMMCx)
 
HAL_StatusTypeDef SDMMC_PowerState_OFF (SDMMC_TypeDef *SDMMCx)
 
uint32_t SDMMC_GetPowerState (SDMMC_TypeDef *SDMMCx)
 
HAL_StatusTypeDef SDMMC_SendCommand (SDMMC_TypeDef *SDMMCx, SDMMC_CmdInitTypeDef *Command)
 
uint8_t SDMMC_GetCommandResponse (SDMMC_TypeDef *SDMMCx)
 
uint32_t SDMMC_GetResponse (SDMMC_TypeDef *SDMMCx, uint32_t Response)
 
HAL_StatusTypeDef SDMMC_ConfigData (SDMMC_TypeDef *SDMMCx, SDMMC_DataInitTypeDef *Data)
 
uint32_t SDMMC_GetDataCounter (SDMMC_TypeDef *SDMMCx)
 
uint32_t SDMMC_GetFIFOCount (SDMMC_TypeDef *SDMMCx)
 
HAL_StatusTypeDef SDMMC_SetSDMMCReadWaitMode (SDMMC_TypeDef *SDMMCx, uint32_t SDMMC_ReadWaitMode)
 
uint32_t SDMMC_CmdBlockLength (SDMMC_TypeDef *SDMMCx, uint32_t BlockSize)
 
uint32_t SDMMC_CmdReadSingleBlock (SDMMC_TypeDef *SDMMCx, uint32_t ReadAdd)
 
uint32_t SDMMC_CmdReadMultiBlock (SDMMC_TypeDef *SDMMCx, uint32_t ReadAdd)
 
uint32_t SDMMC_CmdWriteSingleBlock (SDMMC_TypeDef *SDMMCx, uint32_t WriteAdd)
 
uint32_t SDMMC_CmdWriteMultiBlock (SDMMC_TypeDef *SDMMCx, uint32_t WriteAdd)
 
uint32_t SDMMC_CmdEraseStartAdd (SDMMC_TypeDef *SDMMCx, uint32_t StartAdd)
 
uint32_t SDMMC_CmdSDEraseStartAdd (SDMMC_TypeDef *SDMMCx, uint32_t StartAdd)
 
uint32_t SDMMC_CmdEraseEndAdd (SDMMC_TypeDef *SDMMCx, uint32_t EndAdd)
 
uint32_t SDMMC_CmdSDEraseEndAdd (SDMMC_TypeDef *SDMMCx, uint32_t EndAdd)
 
uint32_t SDMMC_CmdErase (SDMMC_TypeDef *SDMMCx, uint32_t EraseType)
 
uint32_t SDMMC_CmdStopTransfer (SDMMC_TypeDef *SDMMCx)
 
uint32_t SDMMC_CmdSelDesel (SDMMC_TypeDef *SDMMCx, uint32_t Addr)
 
uint32_t SDMMC_CmdGoIdleState (SDMMC_TypeDef *SDMMCx)
 
uint32_t SDMMC_CmdOperCond (SDMMC_TypeDef *SDMMCx)
 
uint32_t SDMMC_CmdAppCommand (SDMMC_TypeDef *SDMMCx, uint32_t Argument)
 
uint32_t SDMMC_CmdAppOperCommand (SDMMC_TypeDef *SDMMCx, uint32_t Argument)
 
uint32_t SDMMC_CmdBusWidth (SDMMC_TypeDef *SDMMCx, uint32_t BusWidth)
 
uint32_t SDMMC_CmdSendSCR (SDMMC_TypeDef *SDMMCx)
 
uint32_t SDMMC_CmdSendCID (SDMMC_TypeDef *SDMMCx)
 
uint32_t SDMMC_CmdSendCSD (SDMMC_TypeDef *SDMMCx, uint32_t Argument)
 
uint32_t SDMMC_CmdSetRelAdd (SDMMC_TypeDef *SDMMCx, uint16_t *pRCA)
 
uint32_t SDMMC_CmdSetRelAddMmc (SDMMC_TypeDef *SDMMCx, uint16_t RCA)
 
uint32_t SDMMC_CmdSleepMmc (SDMMC_TypeDef *SDMMCx, uint32_t Argument)
 
uint32_t SDMMC_CmdSendStatus (SDMMC_TypeDef *SDMMCx, uint32_t Argument)
 
uint32_t SDMMC_CmdStatusRegister (SDMMC_TypeDef *SDMMCx)
 
uint32_t SDMMC_CmdVoltageSwitch (SDMMC_TypeDef *SDMMCx)
 
uint32_t SDMMC_CmdOpCondition (SDMMC_TypeDef *SDMMCx, uint32_t Argument)
 
uint32_t SDMMC_CmdSwitch (SDMMC_TypeDef *SDMMCx, uint32_t Argument)
 
uint32_t SDMMC_CmdSendEXTCSD (SDMMC_TypeDef *SDMMCx, uint32_t Argument)
 
uint32_t SDMMC_GetCmdResp1 (SDMMC_TypeDef *SDMMCx, uint8_t SD_CMD, uint32_t Timeout)
 
uint32_t SDMMC_GetCmdResp2 (SDMMC_TypeDef *SDMMCx)
 
uint32_t SDMMC_GetCmdResp3 (SDMMC_TypeDef *SDMMCx)
 
uint32_t SDMMC_GetCmdResp6 (SDMMC_TypeDef *SDMMCx, uint8_t SD_CMD, uint16_t *pRCA)
 
uint32_t SDMMC_GetCmdResp7 (SDMMC_TypeDef *SDMMCx)
 

Detailed Description

Header file of SDMMC HAL module.

Author
MCD Application Team
Attention

Copyright (c) 2017 STMicroelectronics. All rights reserved.

This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS.

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