Detailed Description

FMC Low Layer HAL module driver.

Author

MCD Application Team

     This file provides firmware functions to manage the following
     functionalities of the Flexible Memory Controller (FMC) peripheral memories:
      + Initialization/de-initialization functions
      + Peripheral Control functions
      + Peripheral State functions

Attention

This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS.

==============================================================================
                      ##### FMC peripheral features #####
==============================================================================
[..] The Flexible memory controller (FMC) includes following memory controllers:
     (+) The NOR/PSRAM memory controller
   (+) The NAND memory controller
     (+) The Synchronous DRAM (SDRAM) controller

[..] The FMC functional block makes the interface with synchronous and asynchronous static
     memories and SDRAM memories. Its main purposes are:
     (+) to translate AHB transactions into the appropriate external device protocol
     (+) to meet the access time requirements of the external memory devices

[..] All external memories share the addresses, data and control signals with the controller.
     Each external device is accessed by means of a unique Chip Select. The FMC performs
     only one access at a time to an external device.
     The main features of the FMC controller are the following:
      (+) Interface with static-memory mapped devices including:
         (++) Static random access memory (SRAM)
         (++) Read-only memory (ROM)
         (++) NOR Flash memory/OneNAND Flash memory
         (++) PSRAM (4 memory banks)
         (++) Two banks of NAND Flash memory with ECC hardware to check up to 8 Kbytes of
              data
      (+) Interface with synchronous DRAM (SDRAM) memories
      (+) Independent Chip Select control for each memory bank
      (+) Independent configuration for each memory bank