RTEMS 6.1-rc5
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stm32h7xx_hal_sdram.h
Go to the documentation of this file.
1
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_HAL_SDRAM_H
21#define STM32H7xx_HAL_SDRAM_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27
28/* Includes ------------------------------------------------------------------*/
29#include "stm32h7xx_ll_fmc.h"
30
39/* Exported typedef ----------------------------------------------------------*/
40
49typedef enum
50{
59
63#if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
64typedef struct __SDRAM_HandleTypeDef
65#else
66typedef struct
67#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
68{
69 FMC_SDRAM_TypeDef *Instance;
79#if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
80 void (* MspInitCallback)(struct __SDRAM_HandleTypeDef *hsdram);
81 void (* MspDeInitCallback)(struct __SDRAM_HandleTypeDef *hsdram);
82 void (* RefreshErrorCallback)(struct __SDRAM_HandleTypeDef *hsdram);
83 void (* DmaXferCpltCallback)(MDMA_HandleTypeDef *hmdma);
84 void (* DmaXferErrorCallback)(MDMA_HandleTypeDef *hmdma);
85#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
87
88#if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
92typedef enum
93{
94 HAL_SDRAM_MSP_INIT_CB_ID = 0x00U,
95 HAL_SDRAM_MSP_DEINIT_CB_ID = 0x01U,
96 HAL_SDRAM_REFRESH_ERR_CB_ID = 0x02U,
97 HAL_SDRAM_DMA_XFER_CPLT_CB_ID = 0x03U,
98 HAL_SDRAM_DMA_XFER_ERR_CB_ID = 0x04U
99} HAL_SDRAM_CallbackIDTypeDef;
100
104typedef void (*pSDRAM_CallbackTypeDef)(SDRAM_HandleTypeDef *hsdram);
105typedef void (*pSDRAM_DmaCallbackTypeDef)(MDMA_HandleTypeDef *hmdma);
106#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
111/* Exported constants --------------------------------------------------------*/
112/* Exported macro ------------------------------------------------------------*/
113
123#if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
124#define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) do { \
125 (__HANDLE__)->State = HAL_SDRAM_STATE_RESET; \
126 (__HANDLE__)->MspInitCallback = NULL; \
127 (__HANDLE__)->MspDeInitCallback = NULL; \
128 } while(0)
129#else
130#define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET)
131#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
136/* Exported functions --------------------------------------------------------*/
137
146/* Initialization/de-initialization functions *********************************/
147HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing);
148HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram);
149void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram);
150void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram);
151
152void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram);
153void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram);
154void HAL_SDRAM_DMA_XferCpltCallback(MDMA_HandleTypeDef *hmdma);
155void HAL_SDRAM_DMA_XferErrorCallback(MDMA_HandleTypeDef *hmdma);
156
164/* I/O operation functions ****************************************************/
165HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer,
166 uint32_t BufferSize);
167HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer,
168 uint32_t BufferSize);
169HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer,
170 uint32_t BufferSize);
171HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer,
172 uint32_t BufferSize);
173HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer,
174 uint32_t BufferSize);
175HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer,
176 uint32_t BufferSize);
177
178HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer,
179 uint32_t BufferSize);
180HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer,
181 uint32_t BufferSize);
182
183#if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
184/* SDRAM callback registering/unregistering */
185HAL_StatusTypeDef HAL_SDRAM_RegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId,
186 pSDRAM_CallbackTypeDef pCallback);
187HAL_StatusTypeDef HAL_SDRAM_UnRegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId);
188HAL_StatusTypeDef HAL_SDRAM_RegisterDmaCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId,
189 pSDRAM_DmaCallbackTypeDef pCallback);
190#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
191
199/* SDRAM Control functions *****************************************************/
200HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram);
201HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram);
202HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command,
203 uint32_t Timeout);
204HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate);
205HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber);
206uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram);
207
215/* SDRAM State functions ********************************************************/
216HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram);
234#ifdef __cplusplus
235}
236#endif
237
238#endif /* STM32H7xx_HAL_SDRAM_H */
#define __IO
Definition: core_cm4.h:239
HAL_SDRAM_StateTypeDef
HAL SDRAM State structure definition.
Definition: stm32h7xx_hal_sdram.h:50
@ HAL_SDRAM_STATE_ERROR
Definition: stm32h7xx_hal_sdram.h:54
@ HAL_SDRAM_STATE_READY
Definition: stm32h7xx_hal_sdram.h:52
@ HAL_SDRAM_STATE_WRITE_PROTECTED
Definition: stm32h7xx_hal_sdram.h:55
@ HAL_SDRAM_STATE_RESET
Definition: stm32h7xx_hal_sdram.h:51
@ HAL_SDRAM_STATE_PRECHARGED
Definition: stm32h7xx_hal_sdram.h:56
@ HAL_SDRAM_STATE_BUSY
Definition: stm32h7xx_hal_sdram.h:53
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32h7xx_hal_def.h:47
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32h7xx_hal_def.h:58
Header file of FMC HAL module.
SDRAM command parameters structure definition.
Definition: stm32h7xx_ll_fmc.h:432
FMC SDRAM Configuration Structure definition.
Definition: stm32h7xx_ll_fmc.h:360
FMC SDRAM Timing parameters structure definition.
Definition: stm32h7xx_ll_fmc.h:398
SDRAM handle Structure definition.
Definition: stm32h7xx_hal_sdram.h:68
FMC_SDRAM_TypeDef * Instance
Definition: stm32h7xx_hal_sdram.h:69
FMC_SDRAM_InitTypeDef Init
Definition: stm32h7xx_hal_sdram.h:71
HAL_LockTypeDef Lock
Definition: stm32h7xx_hal_sdram.h:75
__IO HAL_SDRAM_StateTypeDef State
Definition: stm32h7xx_hal_sdram.h:73
MDMA_HandleTypeDef * hmdma
Definition: stm32h7xx_hal_sdram.h:77
MDMA handle Structure definition.
Definition: stm32h7xx_hal_mdma.h:204