RTEMS 6.1-rc5
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stm32h7xx_hal_pssi.h
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1
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_HAL_PSSI_H
21#define STM32H7xx_HAL_PSSI_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx_hal_def.h"
29
33#if defined(PSSI)
34
35#ifndef USE_HAL_PSSI_REGISTER_CALLBACKS
36/* For backward compatibility, if USE_HAL_PSSI_REGISTER_CALLBACKS not defined, define it to 1*/
37#define USE_HAL_PSSI_REGISTER_CALLBACKS 0U
38#endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */
39
45/* Exported types ------------------------------------------------------------*/
55typedef struct
56{
57 uint32_t DataWidth; /* !< Configures the data width.
58 This parameter can be a value of @ref PSSI_DATA_WIDTH. */
59 uint32_t BusWidth; /* !< Configures the parallel bus width.
60 This parameter can be a value of @ref PSSI_BUS_WIDTH. */
61 uint32_t ControlSignal; /* !< Configures Data enable and Data ready.
62 This parameter can be a value of @ref ControlSignal_Configuration. */
63 uint32_t ClockPolarity; /* !< Configures the PSSI Input Clock polarity.
64 This parameter can be a value of @ref Clock_Polarity. */
65 uint32_t DataEnablePolarity; /* !< Configures the PSSI Data Enable polarity.
66 This parameter can be a value of @ref Data_Enable_Polarity. */
67 uint32_t ReadyPolarity; /* !< Configures the PSSI Ready polarity.
68 This parameter can be a value of @ref Ready_Polarity. */
69
70} PSSI_InitTypeDef;
71
72
76typedef enum
77{
78 HAL_PSSI_STATE_RESET = 0x00U, /* !< PSSI not yet initialized or disabled */
79 HAL_PSSI_STATE_READY = 0x01U, /* !< Peripheral initialized and ready for use */
80 HAL_PSSI_STATE_BUSY = 0x02U, /* !< An internal process is ongoing */
81 HAL_PSSI_STATE_BUSY_TX = 0x03U, /* !< Transmit process is ongoing */
82 HAL_PSSI_STATE_BUSY_RX = 0x04U, /* !< Receive process is ongoing */
83 HAL_PSSI_STATE_TIMEOUT = 0x05U, /* !< Timeout state */
84 HAL_PSSI_STATE_ERROR = 0x06U, /* !< PSSI state error */
85 HAL_PSSI_STATE_ABORT = 0x07U, /* !< PSSI process is aborted */
86
87} HAL_PSSI_StateTypeDef;
88
92#if (USE_HAL_PSSI_REGISTER_CALLBACKS == 1)
93typedef struct __PSSI_HandleTypeDef
94#else
95typedef struct
96#endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */
97{
98 PSSI_TypeDef *Instance;
99 PSSI_InitTypeDef Init;
100 uint32_t *pBuffPtr;
101 uint32_t XferCount;
102 uint32_t XferSize;
103#if defined(HAL_DMA_MODULE_ENABLED)
104 DMA_HandleTypeDef *hdmatx;
105 DMA_HandleTypeDef *hdmarx;
106#endif /*HAL_DMA_MODULE_ENABLED*/
107
108#if (USE_HAL_PSSI_REGISTER_CALLBACKS == 1)
109 void (* TxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi);
110 void (* RxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi);
111 void (* ErrorCallback)(struct __PSSI_HandleTypeDef *hpssi);
112 void (* AbortCpltCallback)(struct __PSSI_HandleTypeDef *hpssi);
114 void (* MspInitCallback)(struct __PSSI_HandleTypeDef *hpssi);
115 void (* MspDeInitCallback)(struct __PSSI_HandleTypeDef *hpssi);
116#endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */
117
118 HAL_LockTypeDef Lock;
119 __IO HAL_PSSI_StateTypeDef State;
120 __IO uint32_t ErrorCode;
122} PSSI_HandleTypeDef;
123
124#if (USE_HAL_PSSI_REGISTER_CALLBACKS == 1)
128typedef void (*pPSSI_CallbackTypeDef)(PSSI_HandleTypeDef *hpssi);
133typedef enum
134{
135 HAL_PSSI_TX_COMPLETE_CB_ID = 0x00U,
136 HAL_PSSI_RX_COMPLETE_CB_ID = 0x01U,
137 HAL_PSSI_ERROR_CB_ID = 0x03U,
138 HAL_PSSI_ABORT_CB_ID = 0x04U,
140 HAL_PSSI_MSPINIT_CB_ID = 0x05U,
141 HAL_PSSI_MSPDEINIT_CB_ID = 0x06U
143} HAL_PSSI_CallbackIDTypeDef;
144#endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */
145
150/* Exported constants --------------------------------------------------------*/
160#define HAL_PSSI_ERROR_NONE 0x00000000U
161#define HAL_PSSI_ERROR_NOT_SUPPORTED 0x00000001U
162#define HAL_PSSI_ERROR_UNDER_RUN 0x00000002U
163#define HAL_PSSI_ERROR_OVER_RUN 0x00000004U
164#define HAL_PSSI_ERROR_DMA 0x00000008U
165#define HAL_PSSI_ERROR_TIMEOUT 0x00000010U
166#if (USE_HAL_PSSI_REGISTER_CALLBACKS == 1)
167#define HAL_PSSI_ERROR_INVALID_CALLBACK 0x00000020U
168#endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */
169
179#define HAL_PSSI_8BITS 0x00000000U
180#define HAL_PSSI_16BITS 0x00000001U
181#define HAL_PSSI_32BITS 0x00000002U
191#define HAL_PSSI_8LINES 0x00000000U
192#define HAL_PSSI_16LINES PSSI_CR_EDM
200#define HAL_PSSI_UNIDIRECTIONAL 0x00000000U
201#define HAL_PSSI_BIDIRECTIONAL 0x00000001U
210#define HAL_PSSI_DE_RDY_DISABLE (0x0U << PSSI_CR_DERDYCFG_Pos)
211#define HAL_PSSI_RDY_ENABLE (0x1U << PSSI_CR_DERDYCFG_Pos)
212#define HAL_PSSI_DE_ENABLE (0x2U << PSSI_CR_DERDYCFG_Pos)
213#define HAL_PSSI_DE_RDY_ALT_ENABLE (0x3U << PSSI_CR_DERDYCFG_Pos)
214#define HAL_PSSI_MAP_RDY_BIDIR_ENABLE (0x4U << PSSI_CR_DERDYCFG_Pos)
215#define HAL_PSSI_RDY_MAP_ENABLE (0x5U << PSSI_CR_DERDYCFG_Pos)
216#define HAL_PSSI_DE_MAP_ENABLE (0x6U << PSSI_CR_DERDYCFG_Pos)
217#define HAL_PSSI_MAP_DE_BIDIR_ENABLE (0x7U << PSSI_CR_DERDYCFG_Pos)
228#define HAL_PSSI_DEPOL_ACTIVE_LOW 0x0U
229#define HAL_PSSI_DEPOL_ACTIVE_HIGH PSSI_CR_DEPOL
237#define HAL_PSSI_RDYPOL_ACTIVE_LOW 0x0U
238#define HAL_PSSI_RDYPOL_ACTIVE_HIGH PSSI_CR_RDYPOL
247#define HAL_PSSI_FALLING_EDGE 0x0U
248#define HAL_PSSI_RISING_EDGE 0x1U
259#define PSSI_MAX_NBYTE_SIZE 0x10000U /* 64 KB */
260#define PSSI_TIMEOUT_TRANSMIT 0x0000FFFFU
262#define PSSI_CR_OUTEN_INPUT 0x00000000U
263#define PSSI_CR_OUTEN_OUTPUT PSSI_CR_OUTEN
265#define PSSI_CR_DMA_ENABLE PSSI_CR_DMAEN
266#define PSSI_CR_DMA_DISABLE (~PSSI_CR_DMAEN)
268#define PSSI_CR_16BITS PSSI_CR_EDM
269#define PSSI_CR_8BITS (~PSSI_CR_EDM)
271#define PSSI_FLAG_RTT1B PSSI_SR_RTT1B
272#define PSSI_FLAG_RTT4B PSSI_SR_RTT4B
285#define PSSI_FLAG_OVR_RIS PSSI_RIS_OVR_RIS
286#define PSSI_FLAG_MASK PSSI_RIS_OVR_RIS_Msk
287#define PSSI_FLAG_OVR_MIS PSSI_MIS_OVR_MIS
297/* Exported macros ------------------------------------------------------------*/
307#if (USE_HAL_PSSI_REGISTER_CALLBACKS == 1)
308#define HAL_PSSI_RESET_HANDLE_STATE(__HANDLE__) do{ \
309 (__HANDLE__)->State = HAL_PSSI_STATE_RESET;\
310 (__HANDLE__)->MspInitCallback = NULL; \
311 (__HANDLE__)->MspDeInitCallback = NULL; \
312 }while(0)
313#else
314#define HAL_PSSI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_PSSI_STATE_RESET)
315#endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */
316
317
323#define HAL_PSSI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= PSSI_CR_ENABLE)
329#define HAL_PSSI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (~PSSI_CR_ENABLE))
330
331/* PSSI pripheral STATUS */
342#define HAL_PSSI_GET_STATUS(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR & (__FLAG__))
343
344
345
346/* Interrupt & Flag management */
355#define HAL_PSSI_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->RIS & (__FLAG__))
356
365#define HAL_PSSI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
366
375#define HAL_PSSI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
376
385#define HAL_PSSI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__))
386
395#define HAL_PSSI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__))
396
397
404#define IS_PSSI_CONTROL_SIGNAL(__CONTROL__) (((__CONTROL__) == HAL_PSSI_DE_RDY_DISABLE ) || \
405 ((__CONTROL__) == HAL_PSSI_RDY_ENABLE ) || \
406 ((__CONTROL__) == HAL_PSSI_DE_ENABLE ) || \
407 ((__CONTROL__) == HAL_PSSI_DE_RDY_ALT_ENABLE ) || \
408 ((__CONTROL__) == HAL_PSSI_MAP_RDY_BIDIR_ENABLE ) || \
409 ((__CONTROL__) == HAL_PSSI_RDY_MAP_ENABLE ) || \
410 ((__CONTROL__) == HAL_PSSI_DE_MAP_ENABLE ) || \
411 ((__CONTROL__) == HAL_PSSI_MAP_DE_BIDIR_ENABLE ))
412
413
414
421#define IS_PSSI_BUSWIDTH(__BUSWIDTH__) (((__BUSWIDTH__) == HAL_PSSI_8LINES ) || \
422 ((__BUSWIDTH__) == HAL_PSSI_16LINES ))
423
431#define IS_PSSI_CLOCK_POLARITY(__CLOCKPOL__) (((__CLOCKPOL__) == HAL_PSSI_FALLING_EDGE ) || \
432 ((__CLOCKPOL__) == HAL_PSSI_RISING_EDGE ))
433
434
441#define IS_PSSI_DE_POLARITY(__DEPOL__) (((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_LOW ) || \
442 ((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_HIGH ))
443
450#define IS_PSSI_RDY_POLARITY(__RDYPOL__) (((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_LOW ) || \
451 ((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_HIGH ))
452
458/* Exported functions --------------------------------------------------------*/
467/* Initialization and de-initialization functions *******************************/
468HAL_StatusTypeDef HAL_PSSI_Init(PSSI_HandleTypeDef *hpssi);
469HAL_StatusTypeDef HAL_PSSI_DeInit(PSSI_HandleTypeDef *hpssi);
470void HAL_PSSI_MspInit(PSSI_HandleTypeDef *hpssi);
471void HAL_PSSI_MspDeInit(PSSI_HandleTypeDef *hpssi);
472/* Callbacks Register/UnRegister functions ***********************************/
473#if (USE_HAL_PSSI_REGISTER_CALLBACKS == 1)
474HAL_StatusTypeDef HAL_PSSI_RegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID,
475 pPSSI_CallbackTypeDef pCallback);
476HAL_StatusTypeDef HAL_PSSI_UnRegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID);
477#endif /* USE_HAL_PSSI_REGISTER_CALLBACKS */
478
488/* IO operation functions *******************************************************/
489HAL_StatusTypeDef HAL_PSSI_Transmit(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout);
490HAL_StatusTypeDef HAL_PSSI_Receive(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout);
491#if defined(HAL_DMA_MODULE_ENABLED)
492HAL_StatusTypeDef HAL_PSSI_Transmit_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size);
493HAL_StatusTypeDef HAL_PSSI_Receive_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size);
494HAL_StatusTypeDef HAL_PSSI_Abort_DMA(PSSI_HandleTypeDef *hpssi);
495#endif /*HAL_DMA_MODULE_ENABLED*/
496
505/* Peripheral State functions ***************************************************/
506HAL_PSSI_StateTypeDef HAL_PSSI_GetState(const PSSI_HandleTypeDef *hpssi);
507uint32_t HAL_PSSI_GetError(const PSSI_HandleTypeDef *hpssi);
508
517void HAL_PSSI_IRQHandler(PSSI_HandleTypeDef *hpssi);
518void HAL_PSSI_TxCpltCallback(PSSI_HandleTypeDef *hpssi);
519void HAL_PSSI_RxCpltCallback(PSSI_HandleTypeDef *hpssi);
520void HAL_PSSI_ErrorCallback(PSSI_HandleTypeDef *hpssi);
521void HAL_PSSI_AbortCpltCallback(PSSI_HandleTypeDef *hpssi);
522
533/* Private constants ---------------------------------------------------------*/
534
535
536/* Private macros ------------------------------------------------------------*/
537
538
542#endif /* PSSI */
543
549#ifdef __cplusplus
550}
551#endif
552
553#endif /* STM32H7xx_HAL_PSSI_H */
554
__IO
#define __IO
Definition: core_cm4.h:239
stm32h7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32h7xx_hal_def.h:47
HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32h7xx_hal_def.h:58
PSSI_TypeDef
PSSI.
Definition: stm32h723xx.h:580
__DMA_HandleTypeDef
DMA handle Structure definition.
Definition: stm32h7xx_hal_dma.h:138
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