html/doxygen/stm32h7xx__hal__hrtim_8h_source.html

/* Define to prevent recursive inclusion -------------------------------------*/

#ifndef STM32H7xx_HAL_HRTIM_H

#define STM32H7xx_HAL_HRTIM_H


#ifdef __cplusplus

 extern "C" {

#endif


/* Includes ------------------------------------------------------------------*/

#include "stm32h7xx_hal_def.h"


#if defined(HRTIM1)

/* Exported types ------------------------------------------------------------*/

#define MAX_HRTIM_TIMER 6U

typedef struct

{

  uint32_t HRTIMInterruptResquests;

  uint32_t SyncOptions;

  uint32_t SyncInputSource;

  uint32_t SyncOutputSource;

  uint32_t SyncOutputPolarity;

} HRTIM_InitTypeDef;


typedef enum

{

  HAL_HRTIM_STATE_RESET            = 0x00U,

  HAL_HRTIM_STATE_READY            = 0x01U,

  HAL_HRTIM_STATE_BUSY             = 0x02U,

  HAL_HRTIM_STATE_TIMEOUT          = 0x06U,

  HAL_HRTIM_STATE_ERROR            = 0x07U,

#if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)

  HAL_HRTIM_STATE_INVALID_CALLBACK = 0x08U

#endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */

} HAL_HRTIM_StateTypeDef;


typedef struct

{

  uint32_t CaptureTrigger1;

  uint32_t CaptureTrigger2;

  uint32_t InterruptRequests;

  uint32_t DMARequests;

  uint32_t DMASrcAddress;

  uint32_t DMADstAddress;

  uint32_t DMASize;

} HRTIM_TimerParamTypeDef;


#if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)

typedef struct __HRTIM_HandleTypeDef

#else

typedef struct

#endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */

{

  HRTIM_TypeDef *              Instance;

  HRTIM_InitTypeDef            Init;

  HRTIM_TimerParamTypeDef      TimerParam[MAX_HRTIM_TIMER];

  HAL_LockTypeDef              Lock;

  __IO HAL_HRTIM_StateTypeDef  State;

  DMA_HandleTypeDef *          hdmaMaster;

  DMA_HandleTypeDef *          hdmaTimerA;

  DMA_HandleTypeDef *          hdmaTimerB;

  DMA_HandleTypeDef *          hdmaTimerC;

  DMA_HandleTypeDef *          hdmaTimerD;

  DMA_HandleTypeDef *          hdmaTimerE;

#if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)

  void (* Fault1Callback)(struct __HRTIM_HandleTypeDef *hhrtim);

  void (* Fault2Callback)(struct __HRTIM_HandleTypeDef *hhrtim);

  void (* Fault3Callback)(struct __HRTIM_HandleTypeDef *hhrtim);

  void (* Fault4Callback)(struct __HRTIM_HandleTypeDef *hhrtim);

  void (* Fault5Callback)(struct __HRTIM_HandleTypeDef *hhrtim);

  void (* SystemFaultCallback)(struct __HRTIM_HandleTypeDef *hhrtim);

  void (* BurstModePeriodCallback)(struct __HRTIM_HandleTypeDef *hhrtim);

  void (* SynchronizationEventCallback)(struct __HRTIM_HandleTypeDef *hhrtim);

  void (* ErrorCallback)(struct __HRTIM_HandleTypeDef *hhrtim);

  void (* RegistersUpdateCallback)(struct __HRTIM_HandleTypeDef *hhrtim, uint32_t TimerIdx);

  void (* RepetitionEventCallback)(struct __HRTIM_HandleTypeDef *hhrtim, uint32_t TimerIdx);

  void (* Compare1EventCallback)(struct __HRTIM_HandleTypeDef *hhrtim, uint32_t TimerIdx);

  void (* Compare2EventCallback)(struct __HRTIM_HandleTypeDef *hhrtim, uint32_t TimerIdx);

  void (* Compare3EventCallback)(struct __HRTIM_HandleTypeDef *hhrtim, uint32_t TimerIdx);

  void (* Compare4EventCallback)(struct __HRTIM_HandleTypeDef *hhrtim, uint32_t TimerIdx);

  void (* Capture1EventCallback)(struct __HRTIM_HandleTypeDef *hhrtim, uint32_t TimerIdx);

  void (* Capture2EventCallback)(struct __HRTIM_HandleTypeDef *hhrtim, uint32_t TimerIdx);

  void (* DelayedProtectionCallback)(struct __HRTIM_HandleTypeDef *hhrtim, uint32_t TimerIdx);

  void (* CounterResetCallback)(struct __HRTIM_HandleTypeDef *hhrtim, uint32_t TimerIdx);

  void (* Output1SetCallback)(struct __HRTIM_HandleTypeDef *hhrtim, uint32_t TimerIdx);

  void (* Output1ResetCallback)(struct __HRTIM_HandleTypeDef *hhrtim, uint32_t TimerIdx);

  void (* Output2SetCallback)(struct __HRTIM_HandleTypeDef *hhrtim, uint32_t TimerIdx);

  void (* Output2ResetCallback)(struct __HRTIM_HandleTypeDef *hhrtim, uint32_t TimerIdx);

  void (* BurstDMATransferCallback)(struct __HRTIM_HandleTypeDef *hhrtim, uint32_t TimerIdx);

  void (* MspInitCallback)(struct __HRTIM_HandleTypeDef *hhrtim);

  void (* MspDeInitCallback)(struct __HRTIM_HandleTypeDef *hhrtim);

#endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */

} HRTIM_HandleTypeDef;


typedef struct

{

  uint32_t Period;

  uint32_t RepetitionCounter;

  uint32_t PrescalerRatio;

  uint32_t Mode;

} HRTIM_TimeBaseCfgTypeDef;


typedef struct

{

  uint32_t Mode;

  uint32_t Pulse;

  uint32_t Polarity;

  uint32_t IdleLevel;

} HRTIM_SimpleOCChannelCfgTypeDef;


typedef struct

{

  uint32_t Pulse;

  uint32_t Polarity;

  uint32_t IdleLevel;

} HRTIM_SimplePWMChannelCfgTypeDef;


typedef struct

{

  uint32_t Event;

  uint32_t EventPolarity;

  uint32_t EventSensitivity;

  uint32_t EventFilter;

} HRTIM_SimpleCaptureChannelCfgTypeDef;


typedef struct

{

  uint32_t Pulse;

  uint32_t OutputPolarity;

  uint32_t OutputIdleLevel;

  uint32_t Event;

  uint32_t EventPolarity;

  uint32_t EventSensitivity;

  uint32_t EventFilter;

} HRTIM_SimpleOnePulseChannelCfgTypeDef;


typedef struct

{

  uint32_t InterruptRequests;

  uint32_t DMARequests;

  uint32_t DMASrcAddress;

  uint32_t DMADstAddress;

  uint32_t DMASize;

  uint32_t HalfModeEnable;

  uint32_t StartOnSync;

  uint32_t ResetOnSync;

  uint32_t DACSynchro;

  uint32_t PreloadEnable;

  uint32_t UpdateGating;

  uint32_t BurstMode;

  uint32_t RepetitionUpdate;

  uint32_t PushPull;

  uint32_t FaultEnable;

  uint32_t FaultLock;

  uint32_t DeadTimeInsertion;

  uint32_t DelayedProtectionMode;

  uint32_t UpdateTrigger;

  uint32_t ResetTrigger;

  uint32_t ResetUpdate;

} HRTIM_TimerCfgTypeDef;


typedef struct

{

  uint32_t CompareValue;

  uint32_t AutoDelayedMode;

  uint32_t AutoDelayedTimeout;

} HRTIM_CompareCfgTypeDef;


typedef struct

{

  uint32_t Trigger;

} HRTIM_CaptureCfgTypeDef;


typedef struct

{

  uint32_t Polarity;

  uint32_t SetSource;

  uint32_t ResetSource;

  uint32_t IdleMode;

  uint32_t IdleLevel;

  uint32_t FaultLevel;

  uint32_t ChopperModeEnable;

  uint32_t BurstModeEntryDelayed;

} HRTIM_OutputCfgTypeDef;


typedef struct

{

  uint32_t Filter;

  uint32_t Latch;

} HRTIM_TimerEventFilteringCfgTypeDef;


typedef struct

{

  uint32_t Prescaler;

  uint32_t RisingValue;

  uint32_t RisingSign;

  uint32_t RisingLock;

  uint32_t RisingSignLock;

  uint32_t FallingValue;

  uint32_t FallingSign;

  uint32_t FallingLock;

  uint32_t FallingSignLock;

} HRTIM_DeadTimeCfgTypeDef;


typedef struct

{

  uint32_t CarrierFreq;

  uint32_t DutyCycle;

  uint32_t StartPulse;

} HRTIM_ChopperModeCfgTypeDef;


typedef struct

{

  uint32_t Source;

  uint32_t Polarity;

  uint32_t Sensitivity;

  uint32_t Filter;

  uint32_t FastMode;

} HRTIM_EventCfgTypeDef;


typedef struct

{

  uint32_t Source;

  uint32_t Polarity;

  uint32_t Filter;

  uint32_t Lock;

} HRTIM_FaultCfgTypeDef;


typedef struct

{

  uint32_t Mode;

  uint32_t ClockSource;

  uint32_t Prescaler;

  uint32_t PreloadEnable;

  uint32_t Trigger;

  uint32_t IdleDuration;

  uint32_t Period;

} HRTIM_BurstModeCfgTypeDef;


typedef struct

{

  uint32_t UpdateSource;

  uint32_t Trigger;

} HRTIM_ADCTriggerCfgTypeDef;


#if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)

typedef enum {

  HAL_HRTIM_FAULT1CALLBACK_CB_ID               = 0x00U,

  HAL_HRTIM_FAULT2CALLBACK_CB_ID               = 0x01U,

  HAL_HRTIM_FAULT3CALLBACK_CB_ID               = 0x02U,

  HAL_HRTIM_FAULT4CALLBACK_CB_ID               = 0x03U,

  HAL_HRTIM_FAULT5CALLBACK_CB_ID               = 0x04U,

  HAL_HRTIM_SYSTEMFAULTCALLBACK_CB_ID          = 0x05U,

  HAL_HRTIM_BURSTMODEPERIODCALLBACK_CB_ID      = 0x07U,

  HAL_HRTIM_SYNCHRONIZATIONEVENTCALLBACK_CB_ID = 0x08U,

  HAL_HRTIM_ERRORCALLBACK_CB_ID                = 0x09U,

  HAL_HRTIM_REGISTERSUPDATECALLBACK_CB_ID      = 0x10U,

  HAL_HRTIM_REPETITIONEVENTCALLBACK_CB_ID      = 0x11U,

  HAL_HRTIM_COMPARE1EVENTCALLBACK_CB_ID        = 0x12U,

  HAL_HRTIM_COMPARE2EVENTCALLBACK_CB_ID        = 0x13U,

  HAL_HRTIM_COMPARE3EVENTCALLBACK_CB_ID        = 0x14U,

  HAL_HRTIM_COMPARE4EVENTCALLBACK_CB_ID        = 0x15U,

  HAL_HRTIM_CAPTURE1EVENTCALLBACK_CB_ID        = 0x16U,

  HAL_HRTIM_CAPTURE2EVENTCALLBACK_CB_ID        = 0x17U,

  HAL_HRTIM_DELAYEDPROTECTIONCALLBACK_CB_ID    = 0x18U,

  HAL_HRTIM_COUNTERRESETCALLBACK_CB_ID         = 0x19U,

  HAL_HRTIM_OUTPUT1SETCALLBACK_CB_ID           = 0x1AU,

  HAL_HRTIM_OUTPUT1RESETCALLBACK_CB_ID         = 0x1BU,

  HAL_HRTIM_OUTPUT2SETCALLBACK_CB_ID           = 0x1CU,

  HAL_HRTIM_OUTPUT2RESETCALLBACK_CB_ID         = 0x1DU,

  HAL_HRTIM_BURSTDMATRANSFERCALLBACK_CB_ID     = 0x1EU,

  HAL_HRTIM_MSPINIT_CB_ID                      = 0x20U,

  HAL_HRTIM_MSPDEINIT_CB_ID                    = 0x21U,

}HAL_HRTIM_CallbackIDTypeDef;


typedef void (* pHRTIM_CallbackTypeDef)(HRTIM_HandleTypeDef *hhrtim);

typedef void (* pHRTIM_TIMxCallbackTypeDef)(HRTIM_HandleTypeDef *hhrtim,

                                            uint32_t TimerIdx);

#endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */


/* Exported constants --------------------------------------------------------*/

#define HRTIM_TIMERINDEX_TIMER_A 0x0U

#define HRTIM_TIMERINDEX_TIMER_B 0x1U

#define HRTIM_TIMERINDEX_TIMER_C 0x2U

#define HRTIM_TIMERINDEX_TIMER_D 0x3U

#define HRTIM_TIMERINDEX_TIMER_E 0x4U

#define HRTIM_TIMERINDEX_MASTER  0x5U

#define HRTIM_TIMERINDEX_COMMON  0xFFU

#define HRTIM_TIMERID_MASTER  (HRTIM_MCR_MCEN)

#define HRTIM_TIMERID_TIMER_A (HRTIM_MCR_TACEN)

#define HRTIM_TIMERID_TIMER_B (HRTIM_MCR_TBCEN)

#define HRTIM_TIMERID_TIMER_C (HRTIM_MCR_TCCEN)

#define HRTIM_TIMERID_TIMER_D (HRTIM_MCR_TDCEN)

#define HRTIM_TIMERID_TIMER_E (HRTIM_MCR_TECEN)

#define HRTIM_COMPAREUNIT_1 0x00000001U

#define HRTIM_COMPAREUNIT_2 0x00000002U

#define HRTIM_COMPAREUNIT_3 0x00000004U

#define HRTIM_COMPAREUNIT_4 0x00000008U

#define HRTIM_CAPTUREUNIT_1 0x00000001U

#define HRTIM_CAPTUREUNIT_2 0x00000002U

#define HRTIM_OUTPUT_TA1  0x00000001U

#define HRTIM_OUTPUT_TA2  0x00000002U

#define HRTIM_OUTPUT_TB1  0x00000004U

#define HRTIM_OUTPUT_TB2  0x00000008U

#define HRTIM_OUTPUT_TC1  0x00000010U

#define HRTIM_OUTPUT_TC2  0x00000020U

#define HRTIM_OUTPUT_TD1  0x00000040U

#define HRTIM_OUTPUT_TD2  0x00000080U

#define HRTIM_OUTPUT_TE1  0x00000100U

#define HRTIM_OUTPUT_TE2  0x00000200U

#define HRTIM_ADCTRIGGER_1  0x00000001U

#define HRTIM_ADCTRIGGER_2  0x00000002U

#define HRTIM_ADCTRIGGER_3  0x00000004U

#define HRTIM_ADCTRIGGER_4  0x00000008U

#define IS_HRTIM_ADCTRIGGER(ADCTRIGGER)\

    (((ADCTRIGGER) == HRTIM_ADCTRIGGER_1)   || \

     ((ADCTRIGGER) == HRTIM_ADCTRIGGER_2)   || \

     ((ADCTRIGGER) == HRTIM_ADCTRIGGER_3)   || \

     ((ADCTRIGGER) == HRTIM_ADCTRIGGER_4))

#define HRTIM_EVENT_NONE    (0x00000000U)

#define HRTIM_EVENT_1       (0x00000001U)

#define HRTIM_EVENT_2       (0x00000002U)

#define HRTIM_EVENT_3       (0x00000003U)

#define HRTIM_EVENT_4       (0x00000004U)

#define HRTIM_EVENT_5       (0x00000005U)

#define HRTIM_EVENT_6       (0x00000006U)

#define HRTIM_EVENT_7       (0x00000007U)

#define HRTIM_EVENT_8       (0x00000008U)

#define HRTIM_EVENT_9       (0x00000009U)

#define HRTIM_EVENT_10      (0x0000000AU)

#define HRTIM_FAULT_1      (0x01U)

#define HRTIM_FAULT_2      (0x02U)

#define HRTIM_FAULT_3      (0x04U)

#define HRTIM_FAULT_4      (0x08U)

#define HRTIM_FAULT_5      (0x10U)

#define HRTIM_PRESCALERRATIO_DIV1     (0x00000005U)

#define HRTIM_PRESCALERRATIO_DIV2     (0x00000006U)

#define HRTIM_PRESCALERRATIO_DIV4     (0x00000007U)

#define HRTIM_MODE_CONTINUOUS               (0x00000008U)

#define HRTIM_MODE_SINGLESHOT               (0x00000000U)

#define HRTIM_MODE_SINGLESHOT_RETRIGGERABLE (0x00000010U)

#define HRTIM_HALFMODE_DISABLED (0x00000000U)

#define HRTIM_HALFMODE_ENABLED  (0x00000020U)

#define HRTIM_SYNCSTART_DISABLED (0x00000000U)

#define HRTIM_SYNCSTART_ENABLED  (HRTIM_MCR_SYNCSTRTM)

#define HRTIM_SYNCRESET_DISABLED (0x00000000U)

#define HRTIM_SYNCRESET_ENABLED  (HRTIM_MCR_SYNCRSTM)

#define HRTIM_DACSYNC_NONE          0x00000000U

#define HRTIM_DACSYNC_DACTRIGOUT_1  (HRTIM_MCR_DACSYNC_0)

#define HRTIM_DACSYNC_DACTRIGOUT_2  (HRTIM_MCR_DACSYNC_1)

#define HRTIM_DACSYNC_DACTRIGOUT_3  (HRTIM_MCR_DACSYNC_1 | HRTIM_MCR_DACSYNC_0)

#define HRTIM_PRELOAD_DISABLED (0x00000000U)

#define HRTIM_PRELOAD_ENABLED  (HRTIM_MCR_PREEN)

#define HRTIM_UPDATEGATING_INDEPENDENT     0x00000000U

#define HRTIM_UPDATEGATING_DMABURST        (HRTIM_TIMCR_UPDGAT_0)

#define HRTIM_UPDATEGATING_DMABURST_UPDATE (HRTIM_TIMCR_UPDGAT_1)

#define HRTIM_UPDATEGATING_UPDEN1          (HRTIM_TIMCR_UPDGAT_1 | HRTIM_TIMCR_UPDGAT_0)

#define HRTIM_UPDATEGATING_UPDEN2          (HRTIM_TIMCR_UPDGAT_2)

#define HRTIM_UPDATEGATING_UPDEN3          (HRTIM_TIMCR_UPDGAT_2 | HRTIM_TIMCR_UPDGAT_0)

#define HRTIM_UPDATEGATING_UPDEN1_UPDATE   (HRTIM_TIMCR_UPDGAT_2 | HRTIM_TIMCR_UPDGAT_1)

#define HRTIM_UPDATEGATING_UPDEN2_UPDATE   (HRTIM_TIMCR_UPDGAT_2 | HRTIM_TIMCR_UPDGAT_1 | HRTIM_TIMCR_UPDGAT_0)

#define HRTIM_UPDATEGATING_UPDEN3_UPDATE   (HRTIM_TIMCR_UPDGAT_3)

#define HRTIM_TIMERBURSTMODE_MAINTAINCLOCK 0x00000000U

#define HRTIM_TIMERBURSTMODE_RESETCOUNTER  (HRTIM_BMCR_MTBM)

#define HRTIM_UPDATEONREPETITION_DISABLED  0x00000000U

#define HRTIM_UPDATEONREPETITION_ENABLED   (HRTIM_MCR_MREPU)

#define HRTIM_TIMPUSHPULLMODE_DISABLED     0x00000000U

#define HRTIM_TIMPUSHPULLMODE_ENABLED      (HRTIM_TIMCR_PSHPLL)

#define HRTIM_TIMFAULTENABLE_NONE     0x00000000U

#define HRTIM_TIMFAULTENABLE_FAULT1   (HRTIM_FLTR_FLT1EN)

#define HRTIM_TIMFAULTENABLE_FAULT2   (HRTIM_FLTR_FLT2EN)

#define HRTIM_TIMFAULTENABLE_FAULT3   (HRTIM_FLTR_FLT3EN)

#define HRTIM_TIMFAULTENABLE_FAULT4   (HRTIM_FLTR_FLT4EN)

#define HRTIM_TIMFAULTENABLE_FAULT5   (HRTIM_FLTR_FLT5EN)

#define HRTIM_TIMFAULTLOCK_READWRITE (0x00000000U)

#define HRTIM_TIMFAULTLOCK_READONLY  (HRTIM_FLTR_FLTLCK)

#define HRTIM_TIMDEADTIMEINSERTION_DISABLED   (0x00000000U)

#define HRTIM_TIMDEADTIMEINSERTION_ENABLED    HRTIM_OUTR_DTEN

#define HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DISABLED          (0x00000000U)

#define HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_EEV6  (HRTIM_OUTR_DLYPRTEN)

#define HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_EEV6  (HRTIM_OUTR_DLYPRT_0 | HRTIM_OUTR_DLYPRTEN)

#define HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV6  (HRTIM_OUTR_DLYPRT_1 | HRTIM_OUTR_DLYPRTEN)

#define HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6     (HRTIM_OUTR_DLYPRT_1 | HRTIM_OUTR_DLYPRT_0 | HRTIM_OUTR_DLYPRTEN)

#define HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_DEEV7 (HRTIM_OUTR_DLYPRT_2 | HRTIM_OUTR_DLYPRTEN)

#define HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_DEEV7 (HRTIM_OUTR_DLYPRT_2 | HRTIM_OUTR_DLYPRT_0 | HRTIM_OUTR_DLYPRTEN)

#define HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV7  (HRTIM_OUTR_DLYPRT_2 | HRTIM_OUTR_DLYPRT_1 | HRTIM_OUTR_DLYPRTEN)

#define HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7     (HRTIM_OUTR_DLYPRT_2 | HRTIM_OUTR_DLYPRT_1 | HRTIM_OUTR_DLYPRT_0 | HRTIM_OUTR_DLYPRTEN)

#define HRTIM_TIMER_D_E_DELAYEDPROTECTION_DISABLED            (0x00000000U)

#define HRTIM_TIMER_D_E_DELAYEDPROTECTION_DELAYEDOUT1_EEV8    (HRTIM_OUTR_DLYPRTEN)

#define HRTIM_TIMER_D_E_DELAYEDPROTECTION_DELAYEDOUT2_EEV8    (HRTIM_OUTR_DLYPRT_0 | HRTIM_OUTR_DLYPRTEN)

#define HRTIM_TIMER_D_E_DELAYEDPROTECTION_DELAYEDBOTH_EEV8    (HRTIM_OUTR_DLYPRT_1 | HRTIM_OUTR_DLYPRTEN)

#define HRTIM_TIMER_D_E_DELAYEDPROTECTION_BALANCED_EEV8       (HRTIM_OUTR_DLYPRT_1 | HRTIM_OUTR_DLYPRT_0 | HRTIM_OUTR_DLYPRTEN)

#define HRTIM_TIMER_D_E_DELAYEDPROTECTION_DELAYEDOUT1_DEEV9   (HRTIM_OUTR_DLYPRT_2 | HRTIM_OUTR_DLYPRTEN)

#define HRTIM_TIMER_D_E_DELAYEDPROTECTION_DELAYEDOUT2_DEEV9   (HRTIM_OUTR_DLYPRT_2 | HRTIM_OUTR_DLYPRT_0 | HRTIM_OUTR_DLYPRTEN)

#define HRTIM_TIMER_D_E_DELAYEDPROTECTION_DELAYEDBOTH_EEV9    (HRTIM_OUTR_DLYPRT_2 | HRTIM_OUTR_DLYPRT_1 | HRTIM_OUTR_DLYPRTEN)

#define HRTIM_TIMER_D_E_DELAYEDPROTECTION_BALANCED_EEV9       (HRTIM_OUTR_DLYPRT_2 | HRTIM_OUTR_DLYPRT_1 | HRTIM_OUTR_DLYPRT_0 | HRTIM_OUTR_DLYPRTEN)

#define HRTIM_TIMUPDATETRIGGER_NONE     0x00000000U

#define HRTIM_TIMUPDATETRIGGER_MASTER   (HRTIM_TIMCR_MSTU)

#define HRTIM_TIMUPDATETRIGGER_TIMER_A  (HRTIM_TIMCR_TAU)

#define HRTIM_TIMUPDATETRIGGER_TIMER_B  (HRTIM_TIMCR_TBU)

#define HRTIM_TIMUPDATETRIGGER_TIMER_C  (HRTIM_TIMCR_TCU)

#define HRTIM_TIMUPDATETRIGGER_TIMER_D  (HRTIM_TIMCR_TDU)

#define HRTIM_TIMUPDATETRIGGER_TIMER_E  (HRTIM_TIMCR_TEU)

#define HRTIM_TIMRESETTRIGGER_NONE        0x00000000U

#define HRTIM_TIMRESETTRIGGER_UPDATE      (HRTIM_RSTR_UPDATE)

#define HRTIM_TIMRESETTRIGGER_CMP2        (HRTIM_RSTR_CMP2)

#define HRTIM_TIMRESETTRIGGER_CMP4        (HRTIM_RSTR_CMP4)

#define HRTIM_TIMRESETTRIGGER_MASTER_PER  (HRTIM_RSTR_MSTPER)

#define HRTIM_TIMRESETTRIGGER_MASTER_CMP1 (HRTIM_RSTR_MSTCMP1)

#define HRTIM_TIMRESETTRIGGER_MASTER_CMP2 (HRTIM_RSTR_MSTCMP2)

#define HRTIM_TIMRESETTRIGGER_MASTER_CMP3 (HRTIM_RSTR_MSTCMP3)

#define HRTIM_TIMRESETTRIGGER_MASTER_CMP4 (HRTIM_RSTR_MSTCMP4)

#define HRTIM_TIMRESETTRIGGER_EEV_1       (HRTIM_RSTR_EXTEVNT1)

#define HRTIM_TIMRESETTRIGGER_EEV_2       (HRTIM_RSTR_EXTEVNT2)

#define HRTIM_TIMRESETTRIGGER_EEV_3       (HRTIM_RSTR_EXTEVNT3)

#define HRTIM_TIMRESETTRIGGER_EEV_4       (HRTIM_RSTR_EXTEVNT4)

#define HRTIM_TIMRESETTRIGGER_EEV_5       (HRTIM_RSTR_EXTEVNT5)

#define HRTIM_TIMRESETTRIGGER_EEV_6       (HRTIM_RSTR_EXTEVNT6)

#define HRTIM_TIMRESETTRIGGER_EEV_7       (HRTIM_RSTR_EXTEVNT7)

#define HRTIM_TIMRESETTRIGGER_EEV_8       (HRTIM_RSTR_EXTEVNT8)

#define HRTIM_TIMRESETTRIGGER_EEV_9       (HRTIM_RSTR_EXTEVNT9)

#define HRTIM_TIMRESETTRIGGER_EEV_10      (HRTIM_RSTR_EXTEVNT10)

#define HRTIM_TIMRESETTRIGGER_OTHER1_CMP1 (HRTIM_RSTR_TIMBCMP1)

#define HRTIM_TIMRESETTRIGGER_OTHER1_CMP2 (HRTIM_RSTR_TIMBCMP2)

#define HRTIM_TIMRESETTRIGGER_OTHER1_CMP4 (HRTIM_RSTR_TIMBCMP4)

#define HRTIM_TIMRESETTRIGGER_OTHER2_CMP1 (HRTIM_RSTR_TIMCCMP1)

#define HRTIM_TIMRESETTRIGGER_OTHER2_CMP2 (HRTIM_RSTR_TIMCCMP2)

#define HRTIM_TIMRESETTRIGGER_OTHER2_CMP4 (HRTIM_RSTR_TIMCCMP4)

#define HRTIM_TIMRESETTRIGGER_OTHER3_CMP1 (HRTIM_RSTR_TIMDCMP1)

#define HRTIM_TIMRESETTRIGGER_OTHER3_CMP2 (HRTIM_RSTR_TIMDCMP2)

#define HRTIM_TIMRESETTRIGGER_OTHER3_CMP4 (HRTIM_RSTR_TIMDCMP4)

#define HRTIM_TIMRESETTRIGGER_OTHER4_CMP1 (HRTIM_RSTR_TIMECMP1)

#define HRTIM_TIMRESETTRIGGER_OTHER4_CMP2 (HRTIM_RSTR_TIMECMP2)

#define HRTIM_TIMRESETTRIGGER_OTHER4_CMP4 (HRTIM_RSTR_TIMECMP4)

#define HRTIM_TIMUPDATEONRESET_DISABLED 0x00000000U

#define HRTIM_TIMUPDATEONRESET_ENABLED (HRTIM_TIMCR_TRSTU)

#define HRTIM_AUTODELAYEDMODE_REGULAR                 (0x00000000U)

#define HRTIM_AUTODELAYEDMODE_AUTODELAYED_NOTIMEOUT   (HRTIM_TIMCR_DELCMP2_0)

#define HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1 (HRTIM_TIMCR_DELCMP2_1)

#define HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3 (HRTIM_TIMCR_DELCMP2_1 | HRTIM_TIMCR_DELCMP2_0)

#define HRTIM_BASICOCMODE_TOGGLE    (0x00000001U)

#define HRTIM_BASICOCMODE_INACTIVE  (0x00000002U)

#define HRTIM_BASICOCMODE_ACTIVE    (0x00000003U)

#define IS_HRTIM_BASICOCMODE(BASICOCMODE)\

              (((BASICOCMODE) == HRTIM_BASICOCMODE_TOGGLE)   || \

               ((BASICOCMODE) == HRTIM_BASICOCMODE_INACTIVE) || \

               ((BASICOCMODE) == HRTIM_BASICOCMODE_ACTIVE))

#define HRTIM_OUTPUTPOLARITY_HIGH    (0x00000000U)

#define HRTIM_OUTPUTPOLARITY_LOW     (HRTIM_OUTR_POL1)

#define HRTIM_OUTPUTSET_NONE       0x00000000U

#define HRTIM_OUTPUTSET_RESYNC     (HRTIM_SET1R_RESYNC)

#define HRTIM_OUTPUTSET_TIMPER     (HRTIM_SET1R_PER)

#define HRTIM_OUTPUTSET_TIMCMP1    (HRTIM_SET1R_CMP1)

#define HRTIM_OUTPUTSET_TIMCMP2    (HRTIM_SET1R_CMP2)

#define HRTIM_OUTPUTSET_TIMCMP3    (HRTIM_SET1R_CMP3)

#define HRTIM_OUTPUTSET_TIMCMP4    (HRTIM_SET1R_CMP4)

#define HRTIM_OUTPUTSET_MASTERPER  (HRTIM_SET1R_MSTPER)

#define HRTIM_OUTPUTSET_MASTERCMP1 (HRTIM_SET1R_MSTCMP1)

#define HRTIM_OUTPUTSET_MASTERCMP2 (HRTIM_SET1R_MSTCMP2)

#define HRTIM_OUTPUTSET_MASTERCMP3 (HRTIM_SET1R_MSTCMP3)

#define HRTIM_OUTPUTSET_MASTERCMP4 (HRTIM_SET1R_MSTCMP4)

#define HRTIM_OUTPUTSET_TIMEV_1    (HRTIM_SET1R_TIMEVNT1)

#define HRTIM_OUTPUTSET_TIMEV_2    (HRTIM_SET1R_TIMEVNT2)

#define HRTIM_OUTPUTSET_TIMEV_3    (HRTIM_SET1R_TIMEVNT3)

#define HRTIM_OUTPUTSET_TIMEV_4    (HRTIM_SET1R_TIMEVNT4)

#define HRTIM_OUTPUTSET_TIMEV_5    (HRTIM_SET1R_TIMEVNT5)

#define HRTIM_OUTPUTSET_TIMEV_6    (HRTIM_SET1R_TIMEVNT6)

#define HRTIM_OUTPUTSET_TIMEV_7    (HRTIM_SET1R_TIMEVNT7)

#define HRTIM_OUTPUTSET_TIMEV_8    (HRTIM_SET1R_TIMEVNT8)

#define HRTIM_OUTPUTSET_TIMEV_9    (HRTIM_SET1R_TIMEVNT9)

#define HRTIM_OUTPUTSET_EEV_1      (HRTIM_SET1R_EXTVNT1)

#define HRTIM_OUTPUTSET_EEV_2      (HRTIM_SET1R_EXTVNT2)

#define HRTIM_OUTPUTSET_EEV_3      (HRTIM_SET1R_EXTVNT3)

#define HRTIM_OUTPUTSET_EEV_4      (HRTIM_SET1R_EXTVNT4)

#define HRTIM_OUTPUTSET_EEV_5      (HRTIM_SET1R_EXTVNT5)

#define HRTIM_OUTPUTSET_EEV_6      (HRTIM_SET1R_EXTVNT6)

#define HRTIM_OUTPUTSET_EEV_7      (HRTIM_SET1R_EXTVNT7)

#define HRTIM_OUTPUTSET_EEV_8      (HRTIM_SET1R_EXTVNT8)

#define HRTIM_OUTPUTSET_EEV_9      (HRTIM_SET1R_EXTVNT9)

#define HRTIM_OUTPUTSET_EEV_10     (HRTIM_SET1R_EXTVNT10)

#define HRTIM_OUTPUTSET_UPDATE     (HRTIM_SET1R_UPDATE)

#define HRTIM_OUTPUTRESET_NONE       0x00000000U

#define HRTIM_OUTPUTRESET_RESYNC     (HRTIM_RST1R_RESYNC)

#define HRTIM_OUTPUTRESET_TIMPER     (HRTIM_RST1R_PER)

#define HRTIM_OUTPUTRESET_TIMCMP1    (HRTIM_RST1R_CMP1)

#define HRTIM_OUTPUTRESET_TIMCMP2    (HRTIM_RST1R_CMP2)

#define HRTIM_OUTPUTRESET_TIMCMP3    (HRTIM_RST1R_CMP3)

#define HRTIM_OUTPUTRESET_TIMCMP4    (HRTIM_RST1R_CMP4)

#define HRTIM_OUTPUTRESET_MASTERPER  (HRTIM_RST1R_MSTPER)

#define HRTIM_OUTPUTRESET_MASTERCMP1 (HRTIM_RST1R_MSTCMP1)

#define HRTIM_OUTPUTRESET_MASTERCMP2 (HRTIM_RST1R_MSTCMP2)

#define HRTIM_OUTPUTRESET_MASTERCMP3 (HRTIM_RST1R_MSTCMP3)

#define HRTIM_OUTPUTRESET_MASTERCMP4 (HRTIM_RST1R_MSTCMP4)

#define HRTIM_OUTPUTRESET_TIMEV_1    (HRTIM_RST1R_TIMEVNT1)

#define HRTIM_OUTPUTRESET_TIMEV_2    (HRTIM_RST1R_TIMEVNT2)

#define HRTIM_OUTPUTRESET_TIMEV_3    (HRTIM_RST1R_TIMEVNT3)

#define HRTIM_OUTPUTRESET_TIMEV_4    (HRTIM_RST1R_TIMEVNT4)

#define HRTIM_OUTPUTRESET_TIMEV_5    (HRTIM_RST1R_TIMEVNT5)

#define HRTIM_OUTPUTRESET_TIMEV_6    (HRTIM_RST1R_TIMEVNT6)

#define HRTIM_OUTPUTRESET_TIMEV_7    (HRTIM_RST1R_TIMEVNT7)

#define HRTIM_OUTPUTRESET_TIMEV_8    (HRTIM_RST1R_TIMEVNT8)

#define HRTIM_OUTPUTRESET_TIMEV_9    (HRTIM_RST1R_TIMEVNT9)

#define HRTIM_OUTPUTRESET_EEV_1      (HRTIM_RST1R_EXTVNT1)

#define HRTIM_OUTPUTRESET_EEV_2      (HRTIM_RST1R_EXTVNT2)

#define HRTIM_OUTPUTRESET_EEV_3      (HRTIM_RST1R_EXTVNT3)

#define HRTIM_OUTPUTRESET_EEV_4      (HRTIM_RST1R_EXTVNT4)

#define HRTIM_OUTPUTRESET_EEV_5      (HRTIM_RST1R_EXTVNT5)

#define HRTIM_OUTPUTRESET_EEV_6      (HRTIM_RST1R_EXTVNT6)

#define HRTIM_OUTPUTRESET_EEV_7      (HRTIM_RST1R_EXTVNT7)

#define HRTIM_OUTPUTRESET_EEV_8      (HRTIM_RST1R_EXTVNT8)

#define HRTIM_OUTPUTRESET_EEV_9      (HRTIM_RST1R_EXTVNT9)

#define HRTIM_OUTPUTRESET_EEV_10     (HRTIM_RST1R_EXTVNT10)

#define HRTIM_OUTPUTRESET_UPDATE     (HRTIM_RST1R_UPDATE)

#define HRTIM_OUTPUTIDLEMODE_NONE     0x00000000U

#define HRTIM_OUTPUTIDLEMODE_IDLE     (HRTIM_OUTR_IDLM1)

#define HRTIM_OUTPUTIDLELEVEL_INACTIVE   0x00000000U

#define HRTIM_OUTPUTIDLELEVEL_ACTIVE     (HRTIM_OUTR_IDLES1)

#define HRTIM_OUTPUTFAULTLEVEL_NONE      0x00000000U

#define HRTIM_OUTPUTFAULTLEVEL_ACTIVE    (HRTIM_OUTR_FAULT1_0)

#define HRTIM_OUTPUTFAULTLEVEL_INACTIVE  (HRTIM_OUTR_FAULT1_1)

#define HRTIM_OUTPUTFAULTLEVEL_HIGHZ     (HRTIM_OUTR_FAULT1_1 | HRTIM_OUTR_FAULT1_0)

#define HRTIM_OUTPUTCHOPPERMODE_DISABLED   0x00000000U

#define HRTIM_OUTPUTCHOPPERMODE_ENABLED    (HRTIM_OUTR_CHP1)

#define HRTIM_OUTPUTBURSTMODEENTRY_REGULAR   0x00000000U

#define HRTIM_OUTPUTBURSTMODEENTRY_DELAYED   (HRTIM_OUTR_DIDL1)

#define HRTIM_CAPTURETRIGGER_NONE         0x00000000U

#define HRTIM_CAPTURETRIGGER_UPDATE       (HRTIM_CPT1CR_UPDCPT)

#define HRTIM_CAPTURETRIGGER_EEV_1        (HRTIM_CPT1CR_EXEV1CPT)

#define HRTIM_CAPTURETRIGGER_EEV_2        (HRTIM_CPT1CR_EXEV2CPT)

#define HRTIM_CAPTURETRIGGER_EEV_3        (HRTIM_CPT1CR_EXEV3CPT)

#define HRTIM_CAPTURETRIGGER_EEV_4        (HRTIM_CPT1CR_EXEV4CPT)

#define HRTIM_CAPTURETRIGGER_EEV_5        (HRTIM_CPT1CR_EXEV5CPT)

#define HRTIM_CAPTURETRIGGER_EEV_6        (HRTIM_CPT1CR_EXEV6CPT)

#define HRTIM_CAPTURETRIGGER_EEV_7        (HRTIM_CPT1CR_EXEV7CPT)

#define HRTIM_CAPTURETRIGGER_EEV_8        (HRTIM_CPT1CR_EXEV8CPT)

#define HRTIM_CAPTURETRIGGER_EEV_9        (HRTIM_CPT1CR_EXEV9CPT)

#define HRTIM_CAPTURETRIGGER_EEV_10       (HRTIM_CPT1CR_EXEV10CPT)

#define HRTIM_CAPTURETRIGGER_TA1_SET      (HRTIM_CPT1CR_TA1SET)

#define HRTIM_CAPTURETRIGGER_TA1_RESET    (HRTIM_CPT1CR_TA1RST)

#define HRTIM_CAPTURETRIGGER_TIMERA_CMP1  (HRTIM_CPT1CR_TIMACMP1)

#define HRTIM_CAPTURETRIGGER_TIMERA_CMP2  (HRTIM_CPT1CR_TIMACMP2)

#define HRTIM_CAPTURETRIGGER_TB1_SET      (HRTIM_CPT1CR_TB1SET)

#define HRTIM_CAPTURETRIGGER_TB1_RESET    (HRTIM_CPT1CR_TB1RST)

#define HRTIM_CAPTURETRIGGER_TIMERB_CMP1  (HRTIM_CPT1CR_TIMBCMP1)

#define HRTIM_CAPTURETRIGGER_TIMERB_CMP2  (HRTIM_CPT1CR_TIMBCMP2)

#define HRTIM_CAPTURETRIGGER_TC1_SET      (HRTIM_CPT1CR_TC1SET)

#define HRTIM_CAPTURETRIGGER_TC1_RESET    (HRTIM_CPT1CR_TC1RST)

#define HRTIM_CAPTURETRIGGER_TIMERC_CMP1  (HRTIM_CPT1CR_TIMCCMP1)

#define HRTIM_CAPTURETRIGGER_TIMERC_CMP2  (HRTIM_CPT1CR_TIMCCMP2)

#define HRTIM_CAPTURETRIGGER_TD1_SET      (HRTIM_CPT1CR_TD1SET)

#define HRTIM_CAPTURETRIGGER_TD1_RESET    (HRTIM_CPT1CR_TD1RST)

#define HRTIM_CAPTURETRIGGER_TIMERD_CMP1  (HRTIM_CPT1CR_TIMDCMP1)

#define HRTIM_CAPTURETRIGGER_TIMERD_CMP2  (HRTIM_CPT1CR_TIMDCMP2)

#define HRTIM_CAPTURETRIGGER_TE1_SET      (HRTIM_CPT1CR_TE1SET)

#define HRTIM_CAPTURETRIGGER_TE1_RESET    (HRTIM_CPT1CR_TE1RST)

#define HRTIM_CAPTURETRIGGER_TIMERE_CMP1  (HRTIM_CPT1CR_TIMECMP1)

#define HRTIM_CAPTURETRIGGER_TIMERE_CMP2  (HRTIM_CPT1CR_TIMECMP2)

#define HRTIM_TIMEVENTFILTER_NONE             (0x00000000U)

#define HRTIM_TIMEVENTFILTER_BLANKINGCMP1     (HRTIM_EEFR1_EE1FLTR_0)

#define HRTIM_TIMEVENTFILTER_BLANKINGCMP2     (HRTIM_EEFR1_EE1FLTR_1)

#define HRTIM_TIMEVENTFILTER_BLANKINGCMP3     (HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0)

#define HRTIM_TIMEVENTFILTER_BLANKINGCMP4     (HRTIM_EEFR1_EE1FLTR_2)

#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR1    (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_0)

#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR2    (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1)

#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR3    (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0)

#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR4    (HRTIM_EEFR1_EE1FLTR_3)

#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR5    (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_0)

#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR6    (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_1)

#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR7    (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0)

#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR8    (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2)

#define HRTIM_TIMEVENTFILTER_WINDOWINGCMP2    (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_0)

#define HRTIM_TIMEVENTFILTER_WINDOWINGCMP3    (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1)

#define HRTIM_TIMEVENTFILTER_WINDOWINGTIM     (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0)

#define HRTIM_TIMEVENTLATCH_DISABLED    (0x00000000U)

#define HRTIM_TIMEVENTLATCH_ENABLED     HRTIM_EEFR1_EE1LTCH

#define HRTIM_TIMDEADTIME_PRESCALERRATIO_DIV1    (HRTIM_DTR_DTPRSC_1 | HRTIM_DTR_DTPRSC_0)

#define HRTIM_TIMDEADTIME_PRESCALERRATIO_DIV2    (HRTIM_DTR_DTPRSC_2)

#define HRTIM_TIMDEADTIME_PRESCALERRATIO_DIV4    (HRTIM_DTR_DTPRSC_2 | HRTIM_DTR_DTPRSC_0)

#define HRTIM_TIMDEADTIME_PRESCALERRATIO_DIV8    (HRTIM_DTR_DTPRSC_2 | HRTIM_DTR_DTPRSC_1)

#define HRTIM_TIMDEADTIME_PRESCALERRATIO_DIV16   (HRTIM_DTR_DTPRSC_2 | HRTIM_DTR_DTPRSC_1 | HRTIM_DTR_DTPRSC_0)

#define HRTIM_TIMDEADTIME_RISINGSIGN_POSITIVE    (0x00000000U)

#define HRTIM_TIMDEADTIME_RISINGSIGN_NEGATIVE    (HRTIM_DTR_SDTR)

#define HRTIM_TIMDEADTIME_RISINGLOCK_WRITE    (0x00000000U)

#define HRTIM_TIMDEADTIME_RISINGLOCK_READONLY (HRTIM_DTR_DTRLK)

#define HRTIM_TIMDEADTIME_RISINGSIGNLOCK_WRITE    (0x00000000U)

#define HRTIM_TIMDEADTIME_RISINGSIGNLOCK_READONLY (HRTIM_DTR_DTRSLK)

#define HRTIM_TIMDEADTIME_FALLINGSIGN_POSITIVE    (0x00000000U)

#define HRTIM_TIMDEADTIME_FALLINGSIGN_NEGATIVE    (HRTIM_DTR_SDTF)

#define HRTIM_TIMDEADTIME_FALLINGLOCK_WRITE    (0x00000000U)

#define HRTIM_TIMDEADTIME_FALLINGLOCK_READONLY (HRTIM_DTR_DTFLK)

#define HRTIM_TIMDEADTIME_FALLINGSIGNLOCK_WRITE    (0x00000000U)

#define HRTIM_TIMDEADTIME_FALLINGSIGNLOCK_READONLY (HRTIM_DTR_DTFSLK)

#define HRTIM_CHOPPER_PRESCALERRATIO_DIV16  (0x000000U)

#define HRTIM_CHOPPER_PRESCALERRATIO_DIV32  (HRTIM_CHPR_CARFRQ_0)

#define HRTIM_CHOPPER_PRESCALERRATIO_DIV48  (HRTIM_CHPR_CARFRQ_1)

#define HRTIM_CHOPPER_PRESCALERRATIO_DIV64  (HRTIM_CHPR_CARFRQ_1 | HRTIM_CHPR_CARFRQ_0)

#define HRTIM_CHOPPER_PRESCALERRATIO_DIV80  (HRTIM_CHPR_CARFRQ_2)

#define HRTIM_CHOPPER_PRESCALERRATIO_DIV96  (HRTIM_CHPR_CARFRQ_2 | HRTIM_CHPR_CARFRQ_0)

#define HRTIM_CHOPPER_PRESCALERRATIO_DIV112 (HRTIM_CHPR_CARFRQ_2 | HRTIM_CHPR_CARFRQ_1)

#define HRTIM_CHOPPER_PRESCALERRATIO_DIV128 (HRTIM_CHPR_CARFRQ_2 | HRTIM_CHPR_CARFRQ_1 | HRTIM_CHPR_CARFRQ_0)

#define HRTIM_CHOPPER_PRESCALERRATIO_DIV144 (HRTIM_CHPR_CARFRQ_3)

#define HRTIM_CHOPPER_PRESCALERRATIO_DIV160 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_0)

#define HRTIM_CHOPPER_PRESCALERRATIO_DIV176 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_1)

#define HRTIM_CHOPPER_PRESCALERRATIO_DIV192 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_1 | HRTIM_CHPR_CARFRQ_0)

#define HRTIM_CHOPPER_PRESCALERRATIO_DIV208 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_2)

#define HRTIM_CHOPPER_PRESCALERRATIO_DIV224 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_2 | HRTIM_CHPR_CARFRQ_0)

#define HRTIM_CHOPPER_PRESCALERRATIO_DIV240 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_2 | HRTIM_CHPR_CARFRQ_1)

#define HRTIM_CHOPPER_PRESCALERRATIO_DIV256 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_2 | HRTIM_CHPR_CARFRQ_1 | HRTIM_CHPR_CARFRQ_0)

#define HRTIM_CHOPPER_DUTYCYCLE_0    (0x000000U)

#define HRTIM_CHOPPER_DUTYCYCLE_125  (HRTIM_CHPR_CARDTY_0)

#define HRTIM_CHOPPER_DUTYCYCLE_250  (HRTIM_CHPR_CARDTY_1)

#define HRTIM_CHOPPER_DUTYCYCLE_375  (HRTIM_CHPR_CARDTY_1 | HRTIM_CHPR_CARDTY_0)

#define HRTIM_CHOPPER_DUTYCYCLE_500  (HRTIM_CHPR_CARDTY_2)

#define HRTIM_CHOPPER_DUTYCYCLE_625  (HRTIM_CHPR_CARDTY_2 | HRTIM_CHPR_CARDTY_0)

#define HRTIM_CHOPPER_DUTYCYCLE_750  (HRTIM_CHPR_CARDTY_2 | HRTIM_CHPR_CARDTY_1)

#define HRTIM_CHOPPER_DUTYCYCLE_875  (HRTIM_CHPR_CARDTY_2 | HRTIM_CHPR_CARDTY_1 | HRTIM_CHPR_CARDTY_0)

#define HRTIM_CHOPPER_PULSEWIDTH_16   (0x000000U)

#define HRTIM_CHOPPER_PULSEWIDTH_32   (HRTIM_CHPR_STRPW_0)

#define HRTIM_CHOPPER_PULSEWIDTH_48   (HRTIM_CHPR_STRPW_1)

#define HRTIM_CHOPPER_PULSEWIDTH_64   (HRTIM_CHPR_STRPW_1 | HRTIM_CHPR_STRPW_0)

#define HRTIM_CHOPPER_PULSEWIDTH_80   (HRTIM_CHPR_STRPW_2)

#define HRTIM_CHOPPER_PULSEWIDTH_96   (HRTIM_CHPR_STRPW_2 | HRTIM_CHPR_STRPW_0)

#define HRTIM_CHOPPER_PULSEWIDTH_112  (HRTIM_CHPR_STRPW_2 | HRTIM_CHPR_STRPW_1)

#define HRTIM_CHOPPER_PULSEWIDTH_128  (HRTIM_CHPR_STRPW_2 | HRTIM_CHPR_STRPW_1 | HRTIM_CHPR_STRPW_0)

#define HRTIM_CHOPPER_PULSEWIDTH_144  (HRTIM_CHPR_STRPW_3)

#define HRTIM_CHOPPER_PULSEWIDTH_160  (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_0)

#define HRTIM_CHOPPER_PULSEWIDTH_176  (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_1)

#define HRTIM_CHOPPER_PULSEWIDTH_192  (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_1 | HRTIM_CHPR_STRPW_0)

#define HRTIM_CHOPPER_PULSEWIDTH_208  (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_2)

#define HRTIM_CHOPPER_PULSEWIDTH_224  (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_2 | HRTIM_CHPR_STRPW_0)

#define HRTIM_CHOPPER_PULSEWIDTH_240  (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_2 | HRTIM_CHPR_STRPW_1)

#define HRTIM_CHOPPER_PULSEWIDTH_256  (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_2 | HRTIM_CHPR_STRPW_1 | HRTIM_CHPR_STRPW_0)

#define HRTIM_SYNCOPTION_NONE   0x00000000U

#define HRTIM_SYNCOPTION_MASTER 0x00000001U

#define HRTIM_SYNCOPTION_SLAVE  0x00000002U

#define HRTIM_SYNCINPUTSOURCE_NONE           0x00000000U

#define HRTIM_SYNCINPUTSOURCE_INTERNALEVENT  HRTIM_MCR_SYNC_IN_1

#define HRTIM_SYNCINPUTSOURCE_EXTERNALEVENT  (HRTIM_MCR_SYNC_IN_1 | HRTIM_MCR_SYNC_IN_0)

#define HRTIM_SYNCOUTPUTSOURCE_MASTER_START 0x00000000U

#define HRTIM_SYNCOUTPUTSOURCE_MASTER_CMP1  (HRTIM_MCR_SYNC_SRC_0)

#define HRTIM_SYNCOUTPUTSOURCE_TIMA_START   (HRTIM_MCR_SYNC_SRC_1)

#define HRTIM_SYNCOUTPUTSOURCE_TIMA_CMP1    (HRTIM_MCR_SYNC_SRC_1 | HRTIM_MCR_SYNC_SRC_0)

#define HRTIM_SYNCOUTPUTPOLARITY_NONE      0x00000000U

#define HRTIM_SYNCOUTPUTPOLARITY_POSITIVE  (HRTIM_MCR_SYNC_OUT_1)

#define HRTIM_SYNCOUTPUTPOLARITY_NEGATIVE  (HRTIM_MCR_SYNC_OUT_1 | HRTIM_MCR_SYNC_OUT_0)

#define HRTIM_EVENTSRC_1         (0x00000000U)

#define HRTIM_EVENTSRC_2         (HRTIM_EECR1_EE1SRC_0)

#define HRTIM_EVENTSRC_3         (HRTIM_EECR1_EE1SRC_1)

#define HRTIM_EVENTSRC_4         (HRTIM_EECR1_EE1SRC_1 | HRTIM_EECR1_EE1SRC_0)

#define HRTIM_EVENTPOLARITY_HIGH    (0x00000000U)

#define HRTIM_EVENTPOLARITY_LOW     (HRTIM_EECR1_EE1POL)

#define HRTIM_EVENTSENSITIVITY_LEVEL          (0x00000000U)

#define HRTIM_EVENTSENSITIVITY_RISINGEDGE     (HRTIM_EECR1_EE1SNS_0)

#define HRTIM_EVENTSENSITIVITY_FALLINGEDGE    (HRTIM_EECR1_EE1SNS_1)

#define HRTIM_EVENTSENSITIVITY_BOTHEDGES      (HRTIM_EECR1_EE1SNS_1 | HRTIM_EECR1_EE1SNS_0)

#define HRTIM_EVENTFASTMODE_DISABLE    (0x00000000U)

#define HRTIM_EVENTFASTMODE_ENABLE     (HRTIM_EECR1_EE1FAST)

#define HRTIM_EVENTFILTER_NONE      (0x00000000U)

#define HRTIM_EVENTFILTER_1         (HRTIM_EECR3_EE6F_0)

#define HRTIM_EVENTFILTER_2         (HRTIM_EECR3_EE6F_1)

#define HRTIM_EVENTFILTER_3         (HRTIM_EECR3_EE6F_1 | HRTIM_EECR3_EE6F_0)

#define HRTIM_EVENTFILTER_4         (HRTIM_EECR3_EE6F_2)

#define HRTIM_EVENTFILTER_5         (HRTIM_EECR3_EE6F_2 | HRTIM_EECR3_EE6F_0)

#define HRTIM_EVENTFILTER_6         (HRTIM_EECR3_EE6F_2 | HRTIM_EECR3_EE6F_1)

#define HRTIM_EVENTFILTER_7         (HRTIM_EECR3_EE6F_2 | HRTIM_EECR3_EE6F_1 | HRTIM_EECR3_EE6F_0)

#define HRTIM_EVENTFILTER_8         (HRTIM_EECR3_EE6F_3)

#define HRTIM_EVENTFILTER_9         (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_0)

#define HRTIM_EVENTFILTER_10        (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_1)

#define HRTIM_EVENTFILTER_11        (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_1 | HRTIM_EECR3_EE6F_0)

#define HRTIM_EVENTFILTER_12        (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_2)

#define HRTIM_EVENTFILTER_13        (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_2  | HRTIM_EECR3_EE6F_0)

#define HRTIM_EVENTFILTER_14        (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_2  | HRTIM_EECR3_EE6F_1)

#define HRTIM_EVENTFILTER_15        (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_2  | HRTIM_EECR3_EE6F_1 | HRTIM_EECR3_EE6F_0)

#define HRTIM_EVENTPRESCALER_DIV1    (0x00000000U)

#define HRTIM_EVENTPRESCALER_DIV2    (HRTIM_EECR3_EEVSD_0)

#define HRTIM_EVENTPRESCALER_DIV4    (HRTIM_EECR3_EEVSD_1)

#define HRTIM_EVENTPRESCALER_DIV8    (HRTIM_EECR3_EEVSD_1 | HRTIM_EECR3_EEVSD_0)

#define HRTIM_FAULTSOURCE_DIGITALINPUT      (0x00000000U)

#define HRTIM_FAULTSOURCE_INTERNAL          (HRTIM_FLTINR1_FLT1SRC)

#define HRTIM_FAULTPOLARITY_LOW     (0x00000000U)

#define HRTIM_FAULTPOLARITY_HIGH    (HRTIM_FLTINR1_FLT1P)

#define HRTIM_FAULTFILTER_NONE      (0x00000000U)

#define HRTIM_FAULTFILTER_1         (HRTIM_FLTINR1_FLT1F_0)

#define HRTIM_FAULTFILTER_2         (HRTIM_FLTINR1_FLT1F_1)

#define HRTIM_FAULTFILTER_3         (HRTIM_FLTINR1_FLT1F_1 | HRTIM_FLTINR1_FLT1F_0)

#define HRTIM_FAULTFILTER_4         (HRTIM_FLTINR1_FLT1F_2)

#define HRTIM_FAULTFILTER_5         (HRTIM_FLTINR1_FLT1F_2 | HRTIM_FLTINR1_FLT1F_0)

#define HRTIM_FAULTFILTER_6         (HRTIM_FLTINR1_FLT1F_2 | HRTIM_FLTINR1_FLT1F_1)

#define HRTIM_FAULTFILTER_7         (HRTIM_FLTINR1_FLT1F_2 | HRTIM_FLTINR1_FLT1F_1 | HRTIM_FLTINR1_FLT1F_0)

#define HRTIM_FAULTFILTER_8         (HRTIM_FLTINR1_FLT1F_3)

#define HRTIM_FAULTFILTER_9         (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_0)

#define HRTIM_FAULTFILTER_10        (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_1)

#define HRTIM_FAULTFILTER_11        (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_1 | HRTIM_FLTINR1_FLT1F_0)

#define HRTIM_FAULTFILTER_12        (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_2)

#define HRTIM_FAULTFILTER_13        (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_2 | HRTIM_FLTINR1_FLT1F_0)

#define HRTIM_FAULTFILTER_14        (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_2 | HRTIM_FLTINR1_FLT1F_1)

#define HRTIM_FAULTFILTER_15        (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_2 | HRTIM_FLTINR1_FLT1F_1 | HRTIM_FLTINR1_FLT1F_0)

#define HRTIM_FAULTLOCK_READWRITE       (0x00000000U)

#define HRTIM_FAULTLOCK_READONLY        (HRTIM_FLTINR1_FLT1LCK)

#define HRTIM_FAULTPRESCALER_DIV1    (0x00000000U)

#define HRTIM_FAULTPRESCALER_DIV2    (HRTIM_FLTINR2_FLTSD_0)

#define HRTIM_FAULTPRESCALER_DIV4    (HRTIM_FLTINR2_FLTSD_1)

#define HRTIM_FAULTPRESCALER_DIV8    (HRTIM_FLTINR2_FLTSD_1 | HRTIM_FLTINR2_FLTSD_0)

#define HRTIM_BURSTMODE_SINGLESHOT (0x00000000U)

#define HRTIM_BURSTMODE_CONTINOUS   (HRTIM_BMCR_BMOM)

#define HRTIM_BURSTMODECLOCKSOURCE_MASTER     (0x00000000U)

#define HRTIM_BURSTMODECLOCKSOURCE_TIMER_A    (HRTIM_BMCR_BMCLK_0)

#define HRTIM_BURSTMODECLOCKSOURCE_TIMER_B    (HRTIM_BMCR_BMCLK_1)

#define HRTIM_BURSTMODECLOCKSOURCE_TIMER_C    (HRTIM_BMCR_BMCLK_1 | HRTIM_BMCR_BMCLK_0)

#define HRTIM_BURSTMODECLOCKSOURCE_TIMER_D    (HRTIM_BMCR_BMCLK_2)

#define HRTIM_BURSTMODECLOCKSOURCE_TIMER_E    (HRTIM_BMCR_BMCLK_2 | HRTIM_BMCR_BMCLK_0)

#define HRTIM_BURSTMODECLOCKSOURCE_TIM16_OC   (HRTIM_BMCR_BMCLK_2 | HRTIM_BMCR_BMCLK_1)

#define HRTIM_BURSTMODECLOCKSOURCE_TIM17_OC   (HRTIM_BMCR_BMCLK_2 | HRTIM_BMCR_BMCLK_1 | HRTIM_BMCR_BMCLK_0)

#define HRTIM_BURSTMODECLOCKSOURCE_TIM7_TRGO  (HRTIM_BMCR_BMCLK_3)

#define HRTIM_BURSTMODECLOCKSOURCE_FHRTIM     (HRTIM_BMCR_BMCLK_3 | HRTIM_BMCR_BMCLK_1)

#define HRTIM_BURSTMODEPRESCALER_DIV1     (0x00000000U)

#define HRTIM_BURSTMODEPRESCALER_DIV2     (HRTIM_BMCR_BMPRSC_0)

#define HRTIM_BURSTMODEPRESCALER_DIV4     (HRTIM_BMCR_BMPRSC_1)

#define HRTIM_BURSTMODEPRESCALER_DIV8     (HRTIM_BMCR_BMPRSC_1 | HRTIM_BMCR_BMPRSC_0)

#define HRTIM_BURSTMODEPRESCALER_DIV16    (HRTIM_BMCR_BMPRSC_2)

#define HRTIM_BURSTMODEPRESCALER_DIV32    (HRTIM_BMCR_BMPRSC_2 | HRTIM_BMCR_BMPRSC_0)

#define HRTIM_BURSTMODEPRESCALER_DIV64    (HRTIM_BMCR_BMPRSC_2 | HRTIM_BMCR_BMPRSC_1)

#define HRTIM_BURSTMODEPRESCALER_DIV128   (HRTIM_BMCR_BMPRSC_2 | HRTIM_BMCR_BMPRSC_1 | HRTIM_BMCR_BMPRSC_0)

#define HRTIM_BURSTMODEPRESCALER_DIV256   (HRTIM_BMCR_BMPRSC_3)

#define HRTIM_BURSTMODEPRESCALER_DIV512   (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_0)

#define HRTIM_BURSTMODEPRESCALER_DIV1024  (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_1)

#define HRTIM_BURSTMODEPRESCALER_DIV2048  (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_1 | HRTIM_BMCR_BMPRSC_0)

#define HRTIM_BURSTMODEPRESCALER_DIV4096  (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_2)

#define HRTIM_BURSTMODEPRESCALER_DIV8192  (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_2 | HRTIM_BMCR_BMPRSC_0)

#define HRTIM_BURSTMODEPRESCALER_DIV16384 (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_2 | HRTIM_BMCR_BMPRSC_1)

#define HRTIM_BURSTMODEPRESCALER_DIV32768 (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_2 | HRTIM_BMCR_BMPRSC_1 | HRTIM_BMCR_BMPRSC_0)

#define HRIM_BURSTMODEPRELOAD_DISABLED (0x00000000U)

#define HRIM_BURSTMODEPRELOAD_ENABLED  (HRTIM_BMCR_BMPREN)

#define HRTIM_BURSTMODETRIGGER_NONE               0x00000000U

#define HRTIM_BURSTMODETRIGGER_MASTER_RESET       (HRTIM_BMTRGR_MSTRST)

#define HRTIM_BURSTMODETRIGGER_MASTER_REPETITION  (HRTIM_BMTRGR_MSTREP)

#define HRTIM_BURSTMODETRIGGER_MASTER_CMP1        (HRTIM_BMTRGR_MSTCMP1)

#define HRTIM_BURSTMODETRIGGER_MASTER_CMP2        (HRTIM_BMTRGR_MSTCMP2)

#define HRTIM_BURSTMODETRIGGER_MASTER_CMP3        (HRTIM_BMTRGR_MSTCMP3)

#define HRTIM_BURSTMODETRIGGER_MASTER_CMP4        (HRTIM_BMTRGR_MSTCMP4)

#define HRTIM_BURSTMODETRIGGER_TIMERA_RESET       (HRTIM_BMTRGR_TARST)

#define HRTIM_BURSTMODETRIGGER_TIMERA_REPETITION  (HRTIM_BMTRGR_TAREP)

#define HRTIM_BURSTMODETRIGGER_TIMERA_CMP1        (HRTIM_BMTRGR_TACMP1)

#define HRTIM_BURSTMODETRIGGER_TIMERA_CMP2        (HRTIM_BMTRGR_TACMP2)

#define HRTIM_BURSTMODETRIGGER_TIMERB_RESET       (HRTIM_BMTRGR_TBRST)

#define HRTIM_BURSTMODETRIGGER_TIMERB_REPETITION  (HRTIM_BMTRGR_TBREP)

#define HRTIM_BURSTMODETRIGGER_TIMERB_CMP1        (HRTIM_BMTRGR_TBCMP1)

#define HRTIM_BURSTMODETRIGGER_TIMERB_CMP2        (HRTIM_BMTRGR_TBCMP2)

#define HRTIM_BURSTMODETRIGGER_TIMERC_RESET       (HRTIM_BMTRGR_TCRST)

#define HRTIM_BURSTMODETRIGGER_TIMERC_REPETITION  (HRTIM_BMTRGR_TCREP)

#define HRTIM_BURSTMODETRIGGER_TIMERC_CMP1        (HRTIM_BMTRGR_TCCMP1)

#define HRTIM_BURSTMODETRIGGER_TIMERC_CMP2        (HRTIM_BMTRGR_TCCMP2)

#define HRTIM_BURSTMODETRIGGER_TIMERD_RESET       (HRTIM_BMTRGR_TDRST)

#define HRTIM_BURSTMODETRIGGER_TIMERD_REPETITION  (HRTIM_BMTRGR_TDREP)

#define HRTIM_BURSTMODETRIGGER_TIMERD_CMP1        (HRTIM_BMTRGR_TDCMP1)

#define HRTIM_BURSTMODETRIGGER_TIMERD_CMP2        (HRTIM_BMTRGR_TDCMP2)

#define HRTIM_BURSTMODETRIGGER_TIMERE_RESET       (HRTIM_BMTRGR_TERST)

#define HRTIM_BURSTMODETRIGGER_TIMERE_REPETITION  (HRTIM_BMTRGR_TEREP)

#define HRTIM_BURSTMODETRIGGER_TIMERE_CMP1        (HRTIM_BMTRGR_TECMP1)

#define HRTIM_BURSTMODETRIGGER_TIMERE_CMP2        (HRTIM_BMTRGR_TECMP2)

#define HRTIM_BURSTMODETRIGGER_TIMERA_EVENT7      (HRTIM_BMTRGR_TAEEV7)

#define HRTIM_BURSTMODETRIGGER_TIMERD_EVENT8      (HRTIM_BMTRGR_TDEEV8)

#define HRTIM_BURSTMODETRIGGER_EVENT_7            (HRTIM_BMTRGR_EEV7)

#define HRTIM_BURSTMODETRIGGER_EVENT_8            (HRTIM_BMTRGR_EEV8)

#define HRTIM_BURSTMODETRIGGER_EVENT_ONCHIP       (HRTIM_BMTRGR_OCHPEV)

#define HRTIM_ADCTRIGGERUPDATE_MASTER  0x00000000U

#define HRTIM_ADCTRIGGERUPDATE_TIMER_A (HRTIM_CR1_ADC1USRC_0)

#define HRTIM_ADCTRIGGERUPDATE_TIMER_B (HRTIM_CR1_ADC1USRC_1)

#define HRTIM_ADCTRIGGERUPDATE_TIMER_C (HRTIM_CR1_ADC1USRC_1 | HRTIM_CR1_ADC1USRC_0)

#define HRTIM_ADCTRIGGERUPDATE_TIMER_D (HRTIM_CR1_ADC1USRC_2)

#define HRTIM_ADCTRIGGERUPDATE_TIMER_E (HRTIM_CR1_ADC1USRC_2 | HRTIM_CR1_ADC1USRC_0)

#define HRTIM_ADCTRIGGEREVENT13_NONE           0x00000000U

#define HRTIM_ADCTRIGGEREVENT13_MASTER_CMP1    (HRTIM_ADC1R_AD1MC1)

#define HRTIM_ADCTRIGGEREVENT13_MASTER_CMP2    (HRTIM_ADC1R_AD1MC2)

#define HRTIM_ADCTRIGGEREVENT13_MASTER_CMP3    (HRTIM_ADC1R_AD1MC3)

#define HRTIM_ADCTRIGGEREVENT13_MASTER_CMP4    (HRTIM_ADC1R_AD1MC4)

#define HRTIM_ADCTRIGGEREVENT13_MASTER_PERIOD  (HRTIM_ADC1R_AD1MPER)

#define HRTIM_ADCTRIGGEREVENT13_EVENT_1        (HRTIM_ADC1R_AD1EEV1)

#define HRTIM_ADCTRIGGEREVENT13_EVENT_2        (HRTIM_ADC1R_AD1EEV2)

#define HRTIM_ADCTRIGGEREVENT13_EVENT_3        (HRTIM_ADC1R_AD1EEV3)

#define HRTIM_ADCTRIGGEREVENT13_EVENT_4        (HRTIM_ADC1R_AD1EEV4)

#define HRTIM_ADCTRIGGEREVENT13_EVENT_5        (HRTIM_ADC1R_AD1EEV5)

#define HRTIM_ADCTRIGGEREVENT13_TIMERA_CMP2    (HRTIM_ADC1R_AD1TAC2)

#define HRTIM_ADCTRIGGEREVENT13_TIMERA_CMP3    (HRTIM_ADC1R_AD1TAC3)

#define HRTIM_ADCTRIGGEREVENT13_TIMERA_CMP4    (HRTIM_ADC1R_AD1TAC4)

#define HRTIM_ADCTRIGGEREVENT13_TIMERA_PERIOD  (HRTIM_ADC1R_AD1TAPER)

#define HRTIM_ADCTRIGGEREVENT13_TIMERA_RESET   (HRTIM_ADC1R_AD1TARST)

#define HRTIM_ADCTRIGGEREVENT13_TIMERB_CMP2    (HRTIM_ADC1R_AD1TBC2)

#define HRTIM_ADCTRIGGEREVENT13_TIMERB_CMP3    (HRTIM_ADC1R_AD1TBC3)

#define HRTIM_ADCTRIGGEREVENT13_TIMERB_CMP4    (HRTIM_ADC1R_AD1TBC4)

#define HRTIM_ADCTRIGGEREVENT13_TIMERB_PERIOD  (HRTIM_ADC1R_AD1TBPER)

#define HRTIM_ADCTRIGGEREVENT13_TIMERB_RESET   (HRTIM_ADC1R_AD1TBRST)

#define HRTIM_ADCTRIGGEREVENT13_TIMERC_CMP2    (HRTIM_ADC1R_AD1TCC2)

#define HRTIM_ADCTRIGGEREVENT13_TIMERC_CMP3    (HRTIM_ADC1R_AD1TCC3)

#define HRTIM_ADCTRIGGEREVENT13_TIMERC_CMP4    (HRTIM_ADC1R_AD1TCC4)

#define HRTIM_ADCTRIGGEREVENT13_TIMERC_PERIOD  (HRTIM_ADC1R_AD1TCPER)

#define HRTIM_ADCTRIGGEREVENT13_TIMERD_CMP2    (HRTIM_ADC1R_AD1TDC2)

#define HRTIM_ADCTRIGGEREVENT13_TIMERD_CMP3    (HRTIM_ADC1R_AD1TDC3)

#define HRTIM_ADCTRIGGEREVENT13_TIMERD_CMP4    (HRTIM_ADC1R_AD1TDC4)

#define HRTIM_ADCTRIGGEREVENT13_TIMERD_PERIOD  (HRTIM_ADC1R_AD1TDPER)

#define HRTIM_ADCTRIGGEREVENT13_TIMERE_CMP2    (HRTIM_ADC1R_AD1TEC2)

#define HRTIM_ADCTRIGGEREVENT13_TIMERE_CMP3    (HRTIM_ADC1R_AD1TEC3)

#define HRTIM_ADCTRIGGEREVENT13_TIMERE_CMP4    (HRTIM_ADC1R_AD1TEC4)

#define HRTIM_ADCTRIGGEREVENT13_TIMERE_PERIOD  (HRTIM_ADC1R_AD1TEPER)

#define HRTIM_ADCTRIGGEREVENT24_NONE           0x00000000U

#define HRTIM_ADCTRIGGEREVENT24_MASTER_CMP1    (HRTIM_ADC2R_AD2MC1)

#define HRTIM_ADCTRIGGEREVENT24_MASTER_CMP2    (HRTIM_ADC2R_AD2MC2)

#define HRTIM_ADCTRIGGEREVENT24_MASTER_CMP3    (HRTIM_ADC2R_AD2MC3)

#define HRTIM_ADCTRIGGEREVENT24_MASTER_CMP4    (HRTIM_ADC2R_AD2MC4)

#define HRTIM_ADCTRIGGEREVENT24_MASTER_PERIOD  (HRTIM_ADC2R_AD2MPER)

#define HRTIM_ADCTRIGGEREVENT24_EVENT_6        (HRTIM_ADC2R_AD2EEV6)

#define HRTIM_ADCTRIGGEREVENT24_EVENT_7        (HRTIM_ADC2R_AD2EEV7)

#define HRTIM_ADCTRIGGEREVENT24_EVENT_8        (HRTIM_ADC2R_AD2EEV8)

#define HRTIM_ADCTRIGGEREVENT24_EVENT_9        (HRTIM_ADC2R_AD2EEV9)

#define HRTIM_ADCTRIGGEREVENT24_EVENT_10       (HRTIM_ADC2R_AD2EEV10)

#define HRTIM_ADCTRIGGEREVENT24_TIMERA_CMP2    (HRTIM_ADC2R_AD2TAC2)

#define HRTIM_ADCTRIGGEREVENT24_TIMERA_CMP3    (HRTIM_ADC2R_AD2TAC3)

#define HRTIM_ADCTRIGGEREVENT24_TIMERA_CMP4    (HRTIM_ADC2R_AD2TAC4)

#define HRTIM_ADCTRIGGEREVENT24_TIMERA_PERIOD  (HRTIM_ADC2R_AD2TAPER)

#define HRTIM_ADCTRIGGEREVENT24_TIMERB_CMP2    (HRTIM_ADC2R_AD2TBC2)

#define HRTIM_ADCTRIGGEREVENT24_TIMERB_CMP3    (HRTIM_ADC2R_AD2TBC3)

#define HRTIM_ADCTRIGGEREVENT24_TIMERB_CMP4    (HRTIM_ADC2R_AD2TBC4)

#define HRTIM_ADCTRIGGEREVENT24_TIMERB_PERIOD  (HRTIM_ADC2R_AD2TBPER)

#define HRTIM_ADCTRIGGEREVENT24_TIMERC_CMP2    (HRTIM_ADC2R_AD2TCC2)

#define HRTIM_ADCTRIGGEREVENT24_TIMERC_CMP3    (HRTIM_ADC2R_AD2TCC3)

#define HRTIM_ADCTRIGGEREVENT24_TIMERC_CMP4    (HRTIM_ADC2R_AD2TCC4)

#define HRTIM_ADCTRIGGEREVENT24_TIMERC_PERIOD  (HRTIM_ADC2R_AD2TCPER)

#define HRTIM_ADCTRIGGEREVENT24_TIMERC_RESET   (HRTIM_ADC2R_AD2TCRST)

#define HRTIM_ADCTRIGGEREVENT24_TIMERD_CMP2    (HRTIM_ADC2R_AD2TDC2)

#define HRTIM_ADCTRIGGEREVENT24_TIMERD_CMP3    (HRTIM_ADC2R_AD2TDC3)

#define HRTIM_ADCTRIGGEREVENT24_TIMERD_CMP4    (HRTIM_ADC2R_AD2TDC4)

#define HRTIM_ADCTRIGGEREVENT24_TIMERD_PERIOD  (HRTIM_ADC2R_AD2TDPER)

#define HRTIM_ADCTRIGGEREVENT24_TIMERD_RESET   (HRTIM_ADC2R_AD2TDRST)

#define HRTIM_ADCTRIGGEREVENT24_TIMERE_CMP2    (HRTIM_ADC2R_AD2TEC2)

#define HRTIM_ADCTRIGGEREVENT24_TIMERE_CMP3    (HRTIM_ADC2R_AD2TEC3)

#define HRTIM_ADCTRIGGEREVENT24_TIMERE_CMP4    (HRTIM_ADC2R_AD2TEC4)

#define HRTIM_ADCTRIGGEREVENT24_TIMERE_RESET   (HRTIM_ADC2R_AD2TERST)

#define HRTIM_BURSTDMA_NONE  0x00000000U

#define HRTIM_BURSTDMA_CR    (HRTIM_BDTUPR_TIMCR)

#define HRTIM_BURSTDMA_ICR   (HRTIM_BDTUPR_TIMICR)

#define HRTIM_BURSTDMA_DIER  (HRTIM_BDTUPR_TIMDIER)

#define HRTIM_BURSTDMA_CNT   (HRTIM_BDTUPR_TIMCNT)

#define HRTIM_BURSTDMA_PER   (HRTIM_BDTUPR_TIMPER)

#define HRTIM_BURSTDMA_REP   (HRTIM_BDTUPR_TIMREP)

#define HRTIM_BURSTDMA_CMP1  (HRTIM_BDTUPR_TIMCMP1)

#define HRTIM_BURSTDMA_CMP2  (HRTIM_BDTUPR_TIMCMP2)

#define HRTIM_BURSTDMA_CMP3  (HRTIM_BDTUPR_TIMCMP3)

#define HRTIM_BURSTDMA_CMP4  (HRTIM_BDTUPR_TIMCMP4)

#define HRTIM_BURSTDMA_DTR   (HRTIM_BDTUPR_TIMDTR)

#define HRTIM_BURSTDMA_SET1R (HRTIM_BDTUPR_TIMSET1R)

#define HRTIM_BURSTDMA_RST1R (HRTIM_BDTUPR_TIMRST1R)

#define HRTIM_BURSTDMA_SET2R (HRTIM_BDTUPR_TIMSET2R)

#define HRTIM_BURSTDMA_RST2R (HRTIM_BDTUPR_TIMRST2R)

#define HRTIM_BURSTDMA_EEFR1 (HRTIM_BDTUPR_TIMEEFR1)

#define HRTIM_BURSTDMA_EEFR2 (HRTIM_BDTUPR_TIMEEFR2)

#define HRTIM_BURSTDMA_RSTR  (HRTIM_BDTUPR_TIMRSTR)

#define HRTIM_BURSTDMA_CHPR  (HRTIM_BDTUPR_TIMCHPR)

#define HRTIM_BURSTDMA_OUTR  (HRTIM_BDTUPR_TIMOUTR)

#define HRTIM_BURSTDMA_FLTR  (HRTIM_BDTUPR_TIMFLTR)

#define HRTIM_BURSTMODECTL_DISABLED 0x00000000U

#define HRTIM_BURSTMODECTL_ENABLED  (HRTIM_BMCR_BME)

#define HRTIM_FAULTMODECTL_DISABLED 0x00000000U

#define HRTIM_FAULTMODECTL_ENABLED  0x00000001U

#define HRTIM_TIMERUPDATE_MASTER    (HRTIM_CR2_MSWU)

#define HRTIM_TIMERUPDATE_A         (HRTIM_CR2_TASWU)

#define HRTIM_TIMERUPDATE_B         (HRTIM_CR2_TBSWU)

#define HRTIM_TIMERUPDATE_C         (HRTIM_CR2_TCSWU)

#define HRTIM_TIMERUPDATE_D         (HRTIM_CR2_TDSWU)

#define HRTIM_TIMERUPDATE_E         (HRTIM_CR2_TESWU)

#define HRTIM_TIMERRESET_MASTER    (HRTIM_CR2_MRST)

#define HRTIM_TIMERRESET_TIMER_A   (HRTIM_CR2_TARST)

#define HRTIM_TIMERRESET_TIMER_B   (HRTIM_CR2_TBRST)

#define HRTIM_TIMERRESET_TIMER_C   (HRTIM_CR2_TCRST)

#define HRTIM_TIMERRESET_TIMER_D   (HRTIM_CR2_TDRST)

#define HRTIM_TIMERRESET_TIMER_E   (HRTIM_CR2_TERST)

#define HRTIM_OUTPUTLEVEL_ACTIVE     (0x00000001U)

#define HRTIM_OUTPUTLEVEL_INACTIVE   (0x00000002U)

#define IS_HRTIM_OUTPUTLEVEL(OUTPUTLEVEL)\

    (((OUTPUTLEVEL) == HRTIM_OUTPUTLEVEL_ACTIVE)  || \

     ((OUTPUTLEVEL) == HRTIM_OUTPUTLEVEL_INACTIVE))

#define HRTIM_OUTPUTSTATE_IDLE     (0x00000001U)

#define HRTIM_OUTPUTSTATE_RUN      (0x00000002U)

#define HRTIM_OUTPUTSTATE_FAULT    (0x00000003U)

#define HRTIM_BURSTMODESTATUS_NORMAL   0x00000000U

#define HRTIM_BURSTMODESTATUS_ONGOING (HRTIM_BMCR_BMSTAT)

#define HRTIM_PUSHPULL_CURRENTSTATUS_OUTPUT1    0x00000000U

#define HRTIM_PUSHPULL_CURRENTSTATUS_OUTPUT2   (HRTIM_TIMISR_CPPSTAT)

#define HRTIM_PUSHPULL_IDLESTATUS_OUTPUT1    0x00000000U

#define HRTIM_PUSHPULL_IDLESTATUS_OUTPUT2   (HRTIM_TIMISR_IPPSTAT)

#define HRTIM_IT_NONE           0x00000000U

#define HRTIM_IT_FLT1           HRTIM_IER_FLT1

#define HRTIM_IT_FLT2           HRTIM_IER_FLT2

#define HRTIM_IT_FLT3           HRTIM_IER_FLT3

#define HRTIM_IT_FLT4           HRTIM_IER_FLT4

#define HRTIM_IT_FLT5           HRTIM_IER_FLT5

#define HRTIM_IT_SYSFLT         HRTIM_IER_SYSFLT

#define HRTIM_IT_BMPER          HRTIM_IER_BMPER

#define HRTIM_MASTER_IT_NONE         0x00000000U

#define HRTIM_MASTER_IT_MCMP1        HRTIM_MDIER_MCMP1IE

#define HRTIM_MASTER_IT_MCMP2        HRTIM_MDIER_MCMP2IE

#define HRTIM_MASTER_IT_MCMP3        HRTIM_MDIER_MCMP3IE

#define HRTIM_MASTER_IT_MCMP4        HRTIM_MDIER_MCMP4IE

#define HRTIM_MASTER_IT_MREP         HRTIM_MDIER_MREPIE

#define HRTIM_MASTER_IT_SYNC         HRTIM_MDIER_SYNCIE

#define HRTIM_MASTER_IT_MUPD         HRTIM_MDIER_MUPDIE

#define HRTIM_TIM_IT_NONE       0x00000000U

#define HRTIM_TIM_IT_CMP1       HRTIM_TIMDIER_CMP1IE

#define HRTIM_TIM_IT_CMP2       HRTIM_TIMDIER_CMP2IE

#define HRTIM_TIM_IT_CMP3       HRTIM_TIMDIER_CMP3IE

#define HRTIM_TIM_IT_CMP4       HRTIM_TIMDIER_CMP4IE

#define HRTIM_TIM_IT_REP        HRTIM_TIMDIER_REPIE

#define HRTIM_TIM_IT_UPD        HRTIM_TIMDIER_UPDIE

#define HRTIM_TIM_IT_CPT1       HRTIM_TIMDIER_CPT1IE

#define HRTIM_TIM_IT_CPT2       HRTIM_TIMDIER_CPT2IE

#define HRTIM_TIM_IT_SET1       HRTIM_TIMDIER_SET1IE

#define HRTIM_TIM_IT_RST1       HRTIM_TIMDIER_RST1IE

#define HRTIM_TIM_IT_SET2       HRTIM_TIMDIER_SET2IE

#define HRTIM_TIM_IT_RST2       HRTIM_TIMDIER_RST2IE

#define HRTIM_TIM_IT_RST        HRTIM_TIMDIER_RSTIE

#define HRTIM_TIM_IT_DLYPRT     HRTIM_TIMDIER_DLYPRTIE

#define HRTIM_FLAG_FLT1           HRTIM_ISR_FLT1

#define HRTIM_FLAG_FLT2           HRTIM_ISR_FLT2

#define HRTIM_FLAG_FLT3           HRTIM_ISR_FLT3

#define HRTIM_FLAG_FLT4           HRTIM_ISR_FLT4

#define HRTIM_FLAG_FLT5           HRTIM_ISR_FLT5

#define HRTIM_FLAG_SYSFLT         HRTIM_ISR_SYSFLT

#define HRTIM_FLAG_BMPER          HRTIM_ISR_BMPER

#define HRTIM_MASTER_FLAG_MCMP1        HRTIM_MISR_MCMP1

#define HRTIM_MASTER_FLAG_MCMP2        HRTIM_MISR_MCMP2

#define HRTIM_MASTER_FLAG_MCMP3        HRTIM_MISR_MCMP3

#define HRTIM_MASTER_FLAG_MCMP4        HRTIM_MISR_MCMP4

#define HRTIM_MASTER_FLAG_MREP         HRTIM_MISR_MREP

#define HRTIM_MASTER_FLAG_SYNC         HRTIM_MISR_SYNC

#define HRTIM_MASTER_FLAG_MUPD         HRTIM_MISR_MUPD

#define HRTIM_TIM_FLAG_CMP1       HRTIM_TIMISR_CMP1

#define HRTIM_TIM_FLAG_CMP2       HRTIM_TIMISR_CMP2

#define HRTIM_TIM_FLAG_CMP3       HRTIM_TIMISR_CMP3

#define HRTIM_TIM_FLAG_CMP4       HRTIM_TIMISR_CMP4

#define HRTIM_TIM_FLAG_REP        HRTIM_TIMISR_REP

#define HRTIM_TIM_FLAG_UPD        HRTIM_TIMISR_UPD

#define HRTIM_TIM_FLAG_CPT1       HRTIM_TIMISR_CPT1

#define HRTIM_TIM_FLAG_CPT2       HRTIM_TIMISR_CPT2

#define HRTIM_TIM_FLAG_SET1       HRTIM_TIMISR_SET1

#define HRTIM_TIM_FLAG_RST1       HRTIM_TIMISR_RST1

#define HRTIM_TIM_FLAG_SET2       HRTIM_TIMISR_SET2

#define HRTIM_TIM_FLAG_RST2       HRTIM_TIMISR_RST2

#define HRTIM_TIM_FLAG_RST        HRTIM_TIMISR_RST

#define HRTIM_TIM_FLAG_DLYPRT     HRTIM_TIMISR_DLYPRT

#define HRTIM_MASTER_DMA_NONE         0x00000000U

#define HRTIM_MASTER_DMA_MCMP1        HRTIM_MDIER_MCMP1DE

#define HRTIM_MASTER_DMA_MCMP2        HRTIM_MDIER_MCMP2DE

#define HRTIM_MASTER_DMA_MCMP3        HRTIM_MDIER_MCMP3DE

#define HRTIM_MASTER_DMA_MCMP4        HRTIM_MDIER_MCMP4DE

#define HRTIM_MASTER_DMA_MREP         HRTIM_MDIER_MREPDE

#define HRTIM_MASTER_DMA_SYNC         HRTIM_MDIER_SYNCDE

#define HRTIM_MASTER_DMA_MUPD         HRTIM_MDIER_MUPDDE

#define HRTIM_TIM_DMA_NONE       0x00000000U

#define HRTIM_TIM_DMA_CMP1       HRTIM_TIMDIER_CMP1DE

#define HRTIM_TIM_DMA_CMP2       HRTIM_TIMDIER_CMP2DE

#define HRTIM_TIM_DMA_CMP3       HRTIM_TIMDIER_CMP3DE

#define HRTIM_TIM_DMA_CMP4       HRTIM_TIMDIER_CMP4DE

#define HRTIM_TIM_DMA_REP        HRTIM_TIMDIER_REPDE

#define HRTIM_TIM_DMA_UPD        HRTIM_TIMDIER_UPDDE

#define HRTIM_TIM_DMA_CPT1       HRTIM_TIMDIER_CPT1DE

#define HRTIM_TIM_DMA_CPT2       HRTIM_TIMDIER_CPT2DE

#define HRTIM_TIM_DMA_SET1       HRTIM_TIMDIER_SET1DE

#define HRTIM_TIM_DMA_RST1       HRTIM_TIMDIER_RST1DE

#define HRTIM_TIM_DMA_SET2       HRTIM_TIMDIER_SET2DE

#define HRTIM_TIM_DMA_RST2       HRTIM_TIMDIER_RST2DE

#define HRTIM_TIM_DMA_RST        HRTIM_TIMDIER_RSTDE

#define HRTIM_TIM_DMA_DLYPRT     HRTIM_TIMDIER_DLYPRTDE

  /* Private macros --------------------------------------------------------*/

#define IS_HRTIM_TIMERINDEX(TIMERINDEX)\

    (((TIMERINDEX) == HRTIM_TIMERINDEX_MASTER)   || \

     ((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_A)  || \

     ((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_B)  || \

     ((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_C)  || \

     ((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_D)  || \

     ((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_E))


#define IS_HRTIM_TIMING_UNIT(TIMERINDEX)\

     (((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_A)  || \

      ((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_B)  || \

      ((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_C)  || \

      ((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_D)  || \

      ((TIMERINDEX) == HRTIM_TIMERINDEX_TIMER_E))


#define IS_HRTIM_TIMERID(TIMERID) (((TIMERID) & 0xFFC0FFFFU) == 0x00000000U)


#define IS_HRTIM_COMPAREUNIT(COMPAREUNIT)\

    (((COMPAREUNIT) == HRTIM_COMPAREUNIT_1)  || \

     ((COMPAREUNIT) == HRTIM_COMPAREUNIT_2)  || \

     ((COMPAREUNIT) == HRTIM_COMPAREUNIT_3)  || \

     ((COMPAREUNIT) == HRTIM_COMPAREUNIT_4))


#define IS_HRTIM_CAPTUREUNIT(CAPTUREUNIT)\

    (((CAPTUREUNIT) == HRTIM_CAPTUREUNIT_1)   || \

     ((CAPTUREUNIT) == HRTIM_CAPTUREUNIT_2))


#define IS_HRTIM_OUTPUT(OUTPUT) (((OUTPUT) & 0xFFFFFC00U) == 0x00000000U)


#define IS_HRTIM_TIMER_OUTPUT(TIMER, OUTPUT)\

    ((((TIMER) == HRTIM_TIMERINDEX_TIMER_A) &&   \

     (((OUTPUT) == HRTIM_OUTPUT_TA1) ||          \

      ((OUTPUT) == HRTIM_OUTPUT_TA2)))           \

    ||                                           \

    (((TIMER) == HRTIM_TIMERINDEX_TIMER_B) &&    \

     (((OUTPUT) == HRTIM_OUTPUT_TB1) ||          \

      ((OUTPUT) == HRTIM_OUTPUT_TB2)))           \

    ||                                           \

    (((TIMER) == HRTIM_TIMERINDEX_TIMER_C) &&    \

     (((OUTPUT) == HRTIM_OUTPUT_TC1) ||          \

      ((OUTPUT) == HRTIM_OUTPUT_TC2)))           \

    ||                                           \

    (((TIMER) == HRTIM_TIMERINDEX_TIMER_D) &&    \

     (((OUTPUT) == HRTIM_OUTPUT_TD1) ||          \

      ((OUTPUT) == HRTIM_OUTPUT_TD2)))           \

    ||                                           \

    (((TIMER) == HRTIM_TIMERINDEX_TIMER_E) &&    \

     (((OUTPUT) == HRTIM_OUTPUT_TE1) ||          \

      ((OUTPUT) == HRTIM_OUTPUT_TE2))))


#define IS_HRTIM_EVENT(EVENT)\

      (((EVENT) == HRTIM_EVENT_NONE)|| \

       ((EVENT) == HRTIM_EVENT_1)   || \

       ((EVENT) == HRTIM_EVENT_2)   || \

       ((EVENT) == HRTIM_EVENT_3)   || \

       ((EVENT) == HRTIM_EVENT_4)   || \

       ((EVENT) == HRTIM_EVENT_5)   || \

       ((EVENT) == HRTIM_EVENT_6)   || \

       ((EVENT) == HRTIM_EVENT_7)   || \

       ((EVENT) == HRTIM_EVENT_8)   || \

       ((EVENT) == HRTIM_EVENT_9)   || \

       ((EVENT) == HRTIM_EVENT_10))


#define IS_HRTIM_FAULT(FAULT)\

      (((FAULT) == HRTIM_FAULT_1)   || \

       ((FAULT) == HRTIM_FAULT_2)   || \

       ((FAULT) == HRTIM_FAULT_3)   || \

       ((FAULT) == HRTIM_FAULT_4)   || \

       ((FAULT) == HRTIM_FAULT_5))


#define IS_HRTIM_PRESCALERRATIO(PRESCALERRATIO)\

        (((PRESCALERRATIO) == HRTIM_PRESCALERRATIO_DIV1) || \

         ((PRESCALERRATIO) == HRTIM_PRESCALERRATIO_DIV2)  || \

         ((PRESCALERRATIO) == HRTIM_PRESCALERRATIO_DIV4))


#define IS_HRTIM_MODE(MODE)\

          (((MODE) == HRTIM_MODE_CONTINUOUS)  ||  \

           ((MODE) == HRTIM_MODE_SINGLESHOT) || \

           ((MODE) == HRTIM_MODE_SINGLESHOT_RETRIGGERABLE))


#define IS_HRTIM_MODE_ONEPULSE(MODE)\

          (((MODE) == HRTIM_MODE_SINGLESHOT) || \

           ((MODE) == HRTIM_MODE_SINGLESHOT_RETRIGGERABLE))


#define IS_HRTIM_HALFMODE(HALFMODE)\

            (((HALFMODE) == HRTIM_HALFMODE_DISABLED)  ||  \

             ((HALFMODE) == HRTIM_HALFMODE_ENABLED))


#define IS_HRTIM_SYNCSTART(SYNCSTART)\

              (((SYNCSTART) == HRTIM_SYNCSTART_DISABLED)  ||  \

               ((SYNCSTART) == HRTIM_SYNCSTART_ENABLED))


#define IS_HRTIM_SYNCRESET(SYNCRESET)\

                (((SYNCRESET) == HRTIM_SYNCRESET_DISABLED)  ||  \

                 ((SYNCRESET) == HRTIM_SYNCRESET_ENABLED))


#define IS_HRTIM_DACSYNC(DACSYNC)\

                (((DACSYNC) == HRTIM_DACSYNC_NONE)          ||  \

                 ((DACSYNC) == HRTIM_DACSYNC_DACTRIGOUT_1)  ||  \

                 ((DACSYNC) == HRTIM_DACSYNC_DACTRIGOUT_2)  ||  \

                 ((DACSYNC) == HRTIM_DACSYNC_DACTRIGOUT_3))


#define IS_HRTIM_PRELOAD(PRELOAD)\

                (((PRELOAD) == HRTIM_PRELOAD_DISABLED)  ||  \

                 ((PRELOAD) == HRTIM_PRELOAD_ENABLED))


#define IS_HRTIM_UPDATEGATING_MASTER(UPDATEGATING)\

                (((UPDATEGATING) == HRTIM_UPDATEGATING_INDEPENDENT)      ||  \

                 ((UPDATEGATING) == HRTIM_UPDATEGATING_DMABURST)         ||  \

                 ((UPDATEGATING) == HRTIM_UPDATEGATING_DMABURST_UPDATE))


#define IS_HRTIM_UPDATEGATING_TIM(UPDATEGATING)\

                (((UPDATEGATING) == HRTIM_UPDATEGATING_INDEPENDENT)      ||  \

                 ((UPDATEGATING) == HRTIM_UPDATEGATING_DMABURST)         ||  \

                 ((UPDATEGATING) == HRTIM_UPDATEGATING_DMABURST_UPDATE)  ||  \

                 ((UPDATEGATING) == HRTIM_UPDATEGATING_UPDEN1)           ||  \

                 ((UPDATEGATING) == HRTIM_UPDATEGATING_UPDEN2)           ||  \

                 ((UPDATEGATING) == HRTIM_UPDATEGATING_UPDEN3)           ||  \

                 ((UPDATEGATING) == HRTIM_UPDATEGATING_UPDEN1_UPDATE)    ||  \

                 ((UPDATEGATING) == HRTIM_UPDATEGATING_UPDEN2_UPDATE)    ||  \

                 ((UPDATEGATING) == HRTIM_UPDATEGATING_UPDEN3_UPDATE))


#define IS_HRTIM_TIMERBURSTMODE(MODE)                               \

                (((MODE) == HRTIM_TIMERBURSTMODE_MAINTAINCLOCK)  || \

                 ((MODE) == HRTIM_TIMERBURSTMODE_RESETCOUNTER))

#define IS_HRTIM_UPDATEONREPETITION(UPDATEONREPETITION)                               \

                (((UPDATEONREPETITION) == HRTIM_UPDATEONREPETITION_DISABLED)  || \

                 ((UPDATEONREPETITION) == HRTIM_UPDATEONREPETITION_ENABLED))


#define IS_HRTIM_TIMPUSHPULLMODE(TIMPUSHPULLMODE)\

                  (((TIMPUSHPULLMODE) == HRTIM_TIMPUSHPULLMODE_DISABLED) || \

                   ((TIMPUSHPULLMODE) == HRTIM_TIMPUSHPULLMODE_ENABLED))

#define IS_HRTIM_TIMFAULTENABLE(TIMFAULTENABLE) (((TIMFAULTENABLE) & 0xFFFFFFE0U) == 0x00000000U)


#define IS_HRTIM_TIMFAULTLOCK(TIMFAULTLOCK)\

      (((TIMFAULTLOCK) == HRTIM_TIMFAULTLOCK_READWRITE) || \

       ((TIMFAULTLOCK) == HRTIM_TIMFAULTLOCK_READONLY))


#define IS_HRTIM_TIMDEADTIMEINSERTION(TIMPUSHPULLMODE, TIMDEADTIMEINSERTION)\

    ((((TIMPUSHPULLMODE) == HRTIM_TIMPUSHPULLMODE_DISABLED) &&               \

        ((((TIMDEADTIMEINSERTION) == HRTIM_TIMDEADTIMEINSERTION_DISABLED) || \

          ((TIMDEADTIMEINSERTION) == HRTIM_TIMDEADTIMEINSERTION_ENABLED))))  \

      ||                                                                     \

        (((TIMPUSHPULLMODE) == HRTIM_TIMPUSHPULLMODE_ENABLED) &&             \

         ((TIMDEADTIMEINSERTION) == HRTIM_TIMDEADTIMEINSERTION_DISABLED)))


#define IS_HRTIM_TIMDELAYEDPROTECTION(TIMPUSHPULLMODE, TIMDELAYEDPROTECTION)\

          ((((TIMDELAYEDPROTECTION) == HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DISABLED)          || \

            ((TIMDELAYEDPROTECTION) == HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_EEV6)  || \

            ((TIMDELAYEDPROTECTION) == HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_EEV6)  || \

            ((TIMDELAYEDPROTECTION) == HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV6)  || \

            ((TIMDELAYEDPROTECTION) == HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_DEEV7) || \

            ((TIMDELAYEDPROTECTION) == HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_DEEV7) || \

            ((TIMDELAYEDPROTECTION) == HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV7))    \

            ||                                                                           \

            (((TIMPUSHPULLMODE) ==  HRTIM_TIMPUSHPULLMODE_ENABLED) &&                    \

             (((TIMDELAYEDPROTECTION) == HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6)     || \

             ((TIMDELAYEDPROTECTION) == HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7))))


#define IS_HRTIM_TIMUPDATETRIGGER(TIMUPDATETRIGGER) (((TIMUPDATETRIGGER) & 0xFE07FFFFU) == 0x00000000U)


#define IS_HRTIM_TIMRESETTRIGGER(TIMRESETTRIGGER) (((TIMRESETTRIGGER) & 0x80000001U) == 0x00000000U)


#define IS_HRTIM_TIMUPDATEONRESET(TIMUPDATEONRESET)                       \

              (((TIMUPDATEONRESET) == HRTIM_TIMUPDATEONRESET_DISABLED) || \

               ((TIMUPDATEONRESET) == HRTIM_TIMUPDATEONRESET_ENABLED))


#define IS_HRTIM_AUTODELAYEDMODE(AUTODELAYEDMODE)\

              (((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_REGULAR)                  || \

               ((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_NOTIMEOUT)    || \

               ((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1)  || \

               ((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3))


/* Auto delayed mode is only available for compare units 2 and 4U */

#define IS_HRTIM_COMPAREUNIT_AUTODELAYEDMODE(COMPAREUNIT, AUTODELAYEDMODE)     \

    ((((COMPAREUNIT) == HRTIM_COMPAREUNIT_2) &&                                 \

     (((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_REGULAR)                 ||  \

      ((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_NOTIMEOUT)   ||  \

      ((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1) ||  \

      ((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3)))   \

    ||                                                                         \

    (((COMPAREUNIT) == HRTIM_COMPAREUNIT_4) &&                                 \

     (((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_REGULAR)                 ||  \

      ((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_NOTIMEOUT)   ||  \

      ((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1) ||  \

      ((AUTODELAYEDMODE) == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3))))


#define IS_HRTIM_OUTPUTPOLARITY(OUTPUTPOLARITY)\

              (((OUTPUTPOLARITY) == HRTIM_OUTPUTPOLARITY_HIGH) || \

               ((OUTPUTPOLARITY) == HRTIM_OUTPUTPOLARITY_LOW))


#define IS_HRTIM_OUTPUTPULSE(OUTPUTPULSE) ((OUTPUTPULSE) <= 0x0000FFFFU)


#define IS_HRTIM_OUTPUTSET(OUTPUTSET)\

              (((OUTPUTSET) == HRTIM_OUTPUTSET_NONE)       || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_RESYNC)     || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_TIMPER)     || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_TIMCMP1)    || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_TIMCMP2)    || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_TIMCMP3)    || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_TIMCMP4)    || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_MASTERPER)  || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_MASTERCMP1) || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_MASTERCMP2) || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_MASTERCMP3) || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_MASTERCMP4) || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_1)    || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_2)    || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_3)    || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_4)    || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_5)    || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_6)    || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_7)    || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_8)    || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_TIMEV_9)    || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_1)      || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_2)      || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_3)      || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_4)      || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_5)      || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_6)      || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_7)      || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_8)      || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_9)      || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_EEV_10)     || \

               ((OUTPUTSET) == HRTIM_OUTPUTSET_UPDATE))


#define IS_HRTIM_OUTPUTRESET(OUTPUTRESET)\

              (((OUTPUTRESET) == HRTIM_OUTPUTRESET_NONE)       || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_RESYNC)     || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMPER)     || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMCMP1)    || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMCMP2)    || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMCMP3)    || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMCMP4)    || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_MASTERPER)  || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_MASTERCMP1) || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_MASTERCMP2) || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_MASTERCMP3) || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_MASTERCMP4) || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_1)    || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_2)    || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_3)    || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_4)    || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_5)    || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_6)    || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_7)    || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_8)    || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_TIMEV_9)    || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_1)      || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_2)      || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_3)      || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_4)      || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_5)      || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_6)      || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_7)      || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_8)      || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_9)      || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_EEV_10)     || \

               ((OUTPUTRESET) == HRTIM_OUTPUTRESET_UPDATE))


#define IS_HRTIM_OUTPUTIDLEMODE(OUTPUTIDLEMODE)\

              (((OUTPUTIDLEMODE) == HRTIM_OUTPUTIDLEMODE_NONE) || \

               ((OUTPUTIDLEMODE) == HRTIM_OUTPUTIDLEMODE_IDLE))


#define IS_HRTIM_OUTPUTIDLELEVEL(OUTPUTIDLELEVEL)\

              (((OUTPUTIDLELEVEL) == HRTIM_OUTPUTIDLELEVEL_INACTIVE) || \

               ((OUTPUTIDLELEVEL) == HRTIM_OUTPUTIDLELEVEL_ACTIVE))


#define IS_HRTIM_OUTPUTFAULTLEVEL(OUTPUTFAULTLEVEL)\

              (((OUTPUTFAULTLEVEL) == HRTIM_OUTPUTFAULTLEVEL_NONE)     || \

               ((OUTPUTFAULTLEVEL) == HRTIM_OUTPUTFAULTLEVEL_ACTIVE)   || \

               ((OUTPUTFAULTLEVEL) == HRTIM_OUTPUTFAULTLEVEL_INACTIVE) || \

               ((OUTPUTFAULTLEVEL) == HRTIM_OUTPUTFAULTLEVEL_HIGHZ))


#define IS_HRTIM_OUTPUTCHOPPERMODE(OUTPUTCHOPPERMODE)\

              (((OUTPUTCHOPPERMODE) == HRTIM_OUTPUTCHOPPERMODE_DISABLED)  || \

               ((OUTPUTCHOPPERMODE) == HRTIM_OUTPUTCHOPPERMODE_ENABLED))


#define IS_HRTIM_OUTPUTBURSTMODEENTRY(OUTPUTBURSTMODEENTRY)\

              (((OUTPUTBURSTMODEENTRY) == HRTIM_OUTPUTBURSTMODEENTRY_REGULAR)  || \

               ((OUTPUTBURSTMODEENTRY) == HRTIM_OUTPUTBURSTMODEENTRY_DELAYED))


#define IS_HRTIM_TIMER_CAPTURETRIGGER(TIMER, CAPTURETRIGGER)    \

   (((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_NONE)          || \

   ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_UPDATE)         || \

   ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_1)          || \

   ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_2)          || \

   ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_3)          || \

   ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_4)          || \

   ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_5)          || \

   ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_6)          || \

   ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_7)          || \

   ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_8)          || \

   ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_9)          || \

   ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_EEV_10)            \

   ||                                                           \

   (((TIMER) == HRTIM_TIMERINDEX_TIMER_A) &&                    \

     (((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TB1_SET)     || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TB1_RESET)   || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERB_CMP1) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERB_CMP2) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TC1_SET)     || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TC1_RESET)   || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERC_CMP1) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERC_CMP2) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TD1_SET)     || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TD1_RESET)   || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERD_CMP1) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERD_CMP2) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TE1_SET)     || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TE1_RESET)   || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERE_CMP1) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERE_CMP2)))  \

    ||                                                          \

   (((TIMER) == HRTIM_TIMERINDEX_TIMER_B) &&                    \

     (((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TA1_SET)     || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TA1_RESET)   || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERA_CMP1) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERA_CMP2) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TC1_SET)     || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TC1_RESET)   || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERC_CMP1) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERC_CMP2) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TD1_SET)     || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TD1_RESET)   || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERD_CMP1) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERD_CMP2) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TE1_SET)     || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TE1_RESET)   || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERE_CMP1) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERE_CMP2)))  \

    ||                                                          \

   (((TIMER) == HRTIM_TIMERINDEX_TIMER_C) &&                    \

     (((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TA1_SET)     || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TA1_RESET)   || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERA_CMP1) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERA_CMP2) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TB1_SET)     || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TB1_RESET)   || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERB_CMP1) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERB_CMP2) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TD1_SET)     || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TD1_RESET)   || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERD_CMP1) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERD_CMP2) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TE1_SET)     || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TE1_RESET)   || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERE_CMP1) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERE_CMP2)))  \

    ||                                                          \

   (((TIMER) == HRTIM_TIMERINDEX_TIMER_D) &&                    \

     (((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TA1_SET)     || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TA1_RESET)   || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERA_CMP1) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERA_CMP2) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TB1_SET)     || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TB1_RESET)   || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERB_CMP1) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERB_CMP2) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TC1_SET)     || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TC1_RESET)   || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERC_CMP1) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERC_CMP2) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TE1_SET)     || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TE1_RESET)   || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERE_CMP1) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERE_CMP2)))  \

    ||                                                          \

   (((TIMER) == HRTIM_TIMERINDEX_TIMER_E) &&                    \

     (((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TA1_SET)     || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TA1_RESET)   || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERA_CMP1) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERA_CMP2) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TB1_SET)     || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TB1_RESET)   || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERB_CMP1) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERB_CMP2) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TC1_SET)     || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TC1_RESET)   || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERC_CMP1) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERC_CMP2) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TD1_SET)     || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TD1_RESET)   || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERD_CMP1) || \

      ((CAPTURETRIGGER) == HRTIM_CAPTURETRIGGER_TIMERD_CMP2))))


#define IS_HRTIM_TIMEVENTFILTER(TIMEVENTFILTER)\

                (((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_NONE)           || \

                 ((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGCMP1)   || \

                 ((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGCMP2)   || \

                 ((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGCMP3)   || \

                 ((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGCMP4)   || \

                 ((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR1)  || \

                 ((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR2)  || \

                 ((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR3)  || \

                 ((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR4)  || \

                 ((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR5)  || \

                 ((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR6)  || \

                 ((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR7)  || \

                 ((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_BLANKINGFLTR8)  || \

                 ((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_WINDOWINGCMP2)  || \

                 ((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_WINDOWINGCMP3)  || \

                 ((TIMEVENTFILTER) == HRTIM_TIMEVENTFILTER_WINDOWINGTIM))


#define IS_HRTIM_TIMEVENTLATCH(TIMEVENTLATCH)\

              (((TIMEVENTLATCH) == HRTIM_TIMEVENTLATCH_DISABLED) || \

               ((TIMEVENTLATCH) == HRTIM_TIMEVENTLATCH_ENABLED))


#define IS_HRTIM_TIMDEADTIME_PRESCALERRATIO(PRESCALERRATIO)\

                (((PRESCALERRATIO) == HRTIM_TIMDEADTIME_PRESCALERRATIO_DIV1) || \

                 ((PRESCALERRATIO) == HRTIM_TIMDEADTIME_PRESCALERRATIO_DIV2) || \

                 ((PRESCALERRATIO) == HRTIM_TIMDEADTIME_PRESCALERRATIO_DIV4) || \

                 ((PRESCALERRATIO) == HRTIM_TIMDEADTIME_PRESCALERRATIO_DIV8) || \

                 ((PRESCALERRATIO) == HRTIM_TIMDEADTIME_PRESCALERRATIO_DIV16))


#define IS_HRTIM_TIMDEADTIME_RISINGSIGN(RISINGSIGN)\

                (((RISINGSIGN) == HRTIM_TIMDEADTIME_RISINGSIGN_POSITIVE)    || \

                 ((RISINGSIGN) == HRTIM_TIMDEADTIME_RISINGSIGN_NEGATIVE))


#define IS_HRTIM_TIMDEADTIME_RISINGLOCK(RISINGLOCK)\

                    (((RISINGLOCK) == HRTIM_TIMDEADTIME_RISINGLOCK_WRITE)    || \

                     ((RISINGLOCK) == HRTIM_TIMDEADTIME_RISINGLOCK_READONLY))


#define IS_HRTIM_TIMDEADTIME_RISINGSIGNLOCK(RISINGSIGNLOCK)\

                  (((RISINGSIGNLOCK) == HRTIM_TIMDEADTIME_RISINGSIGNLOCK_WRITE)    || \

                   ((RISINGSIGNLOCK) == HRTIM_TIMDEADTIME_RISINGSIGNLOCK_READONLY))


#define IS_HRTIM_TIMDEADTIME_FALLINGSIGN(FALLINGSIGN)\

                      (((FALLINGSIGN) == HRTIM_TIMDEADTIME_FALLINGSIGN_POSITIVE)    || \

                       ((FALLINGSIGN) == HRTIM_TIMDEADTIME_FALLINGSIGN_NEGATIVE))


#define IS_HRTIM_TIMDEADTIME_FALLINGLOCK(FALLINGLOCK)\

                          (((FALLINGLOCK) == HRTIM_TIMDEADTIME_FALLINGLOCK_WRITE)    || \

                           ((FALLINGLOCK) == HRTIM_TIMDEADTIME_FALLINGLOCK_READONLY))


#define IS_HRTIM_TIMDEADTIME_FALLINGSIGNLOCK(FALLINGSIGNLOCK)\

                        (((FALLINGSIGNLOCK) == HRTIM_TIMDEADTIME_FALLINGSIGNLOCK_WRITE)    || \

                         ((FALLINGSIGNLOCK) == HRTIM_TIMDEADTIME_FALLINGSIGNLOCK_READONLY))


#define IS_HRTIM_CHOPPER_PRESCALERRATIO(PRESCALERRATIO)\

                        (((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV16)    || \

                         ((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV32)    || \

                         ((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV48)    || \

                         ((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV64)    || \

                         ((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV80)    || \

                         ((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV96)    || \

                         ((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV112)   || \

                         ((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV128)   || \

                         ((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV144)   || \

                         ((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV160)   || \

                         ((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV176)   || \

                         ((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV192)   || \

                         ((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV208)   || \

                         ((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV224)   || \

                         ((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV240)   || \

                         ((PRESCALERRATIO) == HRTIM_CHOPPER_PRESCALERRATIO_DIV256))


#define IS_HRTIM_CHOPPER_DUTYCYCLE(DUTYCYCLE)\

                        (((DUTYCYCLE) == HRTIM_CHOPPER_DUTYCYCLE_0)    || \

                         ((DUTYCYCLE) == HRTIM_CHOPPER_DUTYCYCLE_125)  || \

                         ((DUTYCYCLE) == HRTIM_CHOPPER_DUTYCYCLE_250)  || \

                         ((DUTYCYCLE) == HRTIM_CHOPPER_DUTYCYCLE_375)  || \

                         ((DUTYCYCLE) == HRTIM_CHOPPER_DUTYCYCLE_500)  || \

                         ((DUTYCYCLE) == HRTIM_CHOPPER_DUTYCYCLE_625)  || \

                         ((DUTYCYCLE) == HRTIM_CHOPPER_DUTYCYCLE_750)  || \

                         ((DUTYCYCLE) == HRTIM_CHOPPER_DUTYCYCLE_875))


#define IS_HRTIM_CHOPPER_PULSEWIDTH(PULSEWIDTH)\

                        (((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_16)   || \

                         ((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_32)   || \

                         ((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_48)   || \

                         ((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_64)   || \

                         ((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_80)   || \

                         ((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_96)   || \

                         ((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_112)  || \

                         ((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_128)  || \

                         ((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_144)  || \

                         ((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_160)  || \

                         ((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_176)  || \

                         ((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_192)  || \

                         ((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_208)  || \

                         ((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_224)  || \

                         ((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_240)  || \

                         ((PULSEWIDTH) == HRTIM_CHOPPER_PULSEWIDTH_256))


#define IS_HRTIM_SYNCINPUTSOURCE(SYNCINPUTSOURCE)\

              (((SYNCINPUTSOURCE) == HRTIM_SYNCINPUTSOURCE_NONE)             || \

               ((SYNCINPUTSOURCE) == HRTIM_SYNCINPUTSOURCE_INTERNALEVENT)    || \

               ((SYNCINPUTSOURCE) == HRTIM_SYNCINPUTSOURCE_EXTERNALEVENT))


#define IS_HRTIM_SYNCOUTPUTSOURCE(SYNCOUTPUTSOURCE)\

              (((SYNCOUTPUTSOURCE) == HRTIM_SYNCOUTPUTSOURCE_MASTER_START)  || \

               ((SYNCOUTPUTSOURCE) == HRTIM_SYNCOUTPUTSOURCE_MASTER_CMP1)   || \

               ((SYNCOUTPUTSOURCE) == HRTIM_SYNCOUTPUTSOURCE_TIMA_START)    || \

               ((SYNCOUTPUTSOURCE) == HRTIM_SYNCOUTPUTSOURCE_TIMA_CMP1))


#define IS_HRTIM_SYNCOUTPUTPOLARITY(SYNCOUTPUTPOLARITY)\

              (((SYNCOUTPUTPOLARITY) == HRTIM_SYNCOUTPUTPOLARITY_NONE)  || \

               ((SYNCOUTPUTPOLARITY) == HRTIM_SYNCOUTPUTPOLARITY_POSITIVE)  || \

               ((SYNCOUTPUTPOLARITY) == HRTIM_SYNCOUTPUTPOLARITY_NEGATIVE))


#define IS_HRTIM_EVENTSRC(EVENTSRC)\

                (((EVENTSRC) == HRTIM_EVENTSRC_1)   || \

                 ((EVENTSRC) == HRTIM_EVENTSRC_2)   || \

                 ((EVENTSRC) == HRTIM_EVENTSRC_3)   || \

                 ((EVENTSRC) == HRTIM_EVENTSRC_4))


#define IS_HRTIM_EVENTPOLARITY(EVENTSENSITIVITY, EVENTPOLARITY)\

    ((((EVENTSENSITIVITY) == HRTIM_EVENTSENSITIVITY_LEVEL)  &&      \

       (((EVENTPOLARITY) == HRTIM_EVENTPOLARITY_HIGH)  ||           \

        ((EVENTPOLARITY) == HRTIM_EVENTPOLARITY_LOW)))              \

      ||                                                            \

      (((EVENTSENSITIVITY) == HRTIM_EVENTSENSITIVITY_RISINGEDGE) || \

       ((EVENTSENSITIVITY) == HRTIM_EVENTSENSITIVITY_FALLINGEDGE)|| \

       ((EVENTSENSITIVITY) == HRTIM_EVENTSENSITIVITY_BOTHEDGES)))


#define IS_HRTIM_EVENTSENSITIVITY(EVENTSENSITIVITY)\

                    (((EVENTSENSITIVITY) == HRTIM_EVENTSENSITIVITY_LEVEL)       || \

                     ((EVENTSENSITIVITY) == HRTIM_EVENTSENSITIVITY_RISINGEDGE)  || \

                     ((EVENTSENSITIVITY) == HRTIM_EVENTSENSITIVITY_FALLINGEDGE) || \

                     ((EVENTSENSITIVITY) == HRTIM_EVENTSENSITIVITY_BOTHEDGES))


#define IS_HRTIM_EVENTFASTMODE(EVENT, FASTMODE)\

    (((((EVENT) == HRTIM_EVENT_1) ||                 \

       ((EVENT) == HRTIM_EVENT_2) ||                 \

       ((EVENT) == HRTIM_EVENT_3) ||                 \

       ((EVENT) == HRTIM_EVENT_4) ||                 \

       ((EVENT) == HRTIM_EVENT_5)) &&                \

      (((FASTMODE) == HRTIM_EVENTFASTMODE_ENABLE) || \

       ((FASTMODE) == HRTIM_EVENTFASTMODE_DISABLE))) \

    ||                                               \

    (((EVENT) == HRTIM_EVENT_6) ||                   \

     ((EVENT) == HRTIM_EVENT_7) ||                   \

     ((EVENT) == HRTIM_EVENT_8) ||                   \

     ((EVENT) == HRTIM_EVENT_9) ||                   \

     ((EVENT) == HRTIM_EVENT_10)))


#define IS_HRTIM_EVENTFILTER(EVENT, FILTER)\

      ((((EVENT) == HRTIM_EVENT_1) ||            \

        ((EVENT) == HRTIM_EVENT_2) ||            \

        ((EVENT) == HRTIM_EVENT_3) ||            \

        ((EVENT) == HRTIM_EVENT_4) ||            \

        ((EVENT) == HRTIM_EVENT_5))              \

       ||                                        \

      ((((EVENT) == HRTIM_EVENT_6) ||            \

        ((EVENT) == HRTIM_EVENT_7) ||            \

        ((EVENT) == HRTIM_EVENT_8) ||            \

        ((EVENT) == HRTIM_EVENT_9) ||            \

        ((EVENT) == HRTIM_EVENT_10)) &&          \

        (((FILTER) == HRTIM_EVENTFILTER_NONE) || \

        ((FILTER) == HRTIM_EVENTFILTER_1)     || \

        ((FILTER) == HRTIM_EVENTFILTER_2)     || \

        ((FILTER) == HRTIM_EVENTFILTER_3)     || \

        ((FILTER) == HRTIM_EVENTFILTER_4)     || \

        ((FILTER) == HRTIM_EVENTFILTER_5)     || \

        ((FILTER) == HRTIM_EVENTFILTER_6)     || \

        ((FILTER) == HRTIM_EVENTFILTER_7)     || \

        ((FILTER) == HRTIM_EVENTFILTER_8)     || \

        ((FILTER) == HRTIM_EVENTFILTER_9)     || \

        ((FILTER) == HRTIM_EVENTFILTER_10)    || \

        ((FILTER) == HRTIM_EVENTFILTER_11)    || \

        ((FILTER) == HRTIM_EVENTFILTER_12)    || \

        ((FILTER) == HRTIM_EVENTFILTER_13)    || \

        ((FILTER) == HRTIM_EVENTFILTER_14)    || \

        ((FILTER) == HRTIM_EVENTFILTER_15))))


#define IS_HRTIM_EVENTPRESCALER(EVENTPRESCALER)\

             (((EVENTPRESCALER) == HRTIM_EVENTPRESCALER_DIV1)  || \

              ((EVENTPRESCALER) == HRTIM_EVENTPRESCALER_DIV2)   || \

              ((EVENTPRESCALER) == HRTIM_EVENTPRESCALER_DIV4)   || \

              ((EVENTPRESCALER) == HRTIM_EVENTPRESCALER_DIV8))


#define IS_HRTIM_FAULTSOURCE(FAULTSOURCE)\

              (((FAULTSOURCE) == HRTIM_FAULTSOURCE_DIGITALINPUT) || \

              ((FAULTSOURCE) == HRTIM_FAULTSOURCE_INTERNAL))


#define IS_HRTIM_FAULTPOLARITY(HRTIM_FAULTPOLARITY)\

              (((HRTIM_FAULTPOLARITY) == HRTIM_FAULTPOLARITY_LOW) || \

               ((HRTIM_FAULTPOLARITY) == HRTIM_FAULTPOLARITY_HIGH))


#define IS_HRTIM_FAULTMODECTL(FAULTMODECTL)\

    (((FAULTMODECTL) == HRTIM_FAULTMODECTL_DISABLED)  || \

     ((FAULTMODECTL) == HRTIM_FAULTMODECTL_ENABLED))


#define IS_HRTIM_FAULTFILTER(FAULTFILTER)\

                (((FAULTFILTER) == HRTIM_FAULTFILTER_NONE) || \

                 ((FAULTFILTER) == HRTIM_FAULTFILTER_1)    || \

                 ((FAULTFILTER) == HRTIM_FAULTFILTER_2)    || \

                 ((FAULTFILTER) == HRTIM_FAULTFILTER_3)    || \

                 ((FAULTFILTER) == HRTIM_FAULTFILTER_4)    || \

                 ((FAULTFILTER) == HRTIM_FAULTFILTER_5)    || \

                 ((FAULTFILTER) == HRTIM_FAULTFILTER_6)    || \

                 ((FAULTFILTER) == HRTIM_FAULTFILTER_7)    || \

                 ((FAULTFILTER) == HRTIM_FAULTFILTER_8)    || \

                 ((FAULTFILTER) == HRTIM_FAULTFILTER_9)    || \

                 ((FAULTFILTER) == HRTIM_FAULTFILTER_10)   || \

                 ((FAULTFILTER) == HRTIM_FAULTFILTER_11)   || \

                 ((FAULTFILTER) == HRTIM_FAULTFILTER_12)   || \

                 ((FAULTFILTER) == HRTIM_FAULTFILTER_13)   || \

                 ((FAULTFILTER) == HRTIM_FAULTFILTER_14)   || \

                 ((FAULTFILTER) == HRTIM_FAULTFILTER_15))


#define IS_HRTIM_FAULTLOCK(FAULTLOCK)\

              (((FAULTLOCK) == HRTIM_FAULTLOCK_READWRITE) || \

               ((FAULTLOCK) == HRTIM_FAULTLOCK_READONLY))


#define IS_HRTIM_FAULTPRESCALER(FAULTPRESCALER)\

             (((FAULTPRESCALER) == HRTIM_FAULTPRESCALER_DIV1)  || \

              ((FAULTPRESCALER) == HRTIM_FAULTPRESCALER_DIV2)   || \

              ((FAULTPRESCALER) == HRTIM_FAULTPRESCALER_DIV4)   || \

              ((FAULTPRESCALER) == HRTIM_FAULTPRESCALER_DIV8))


#define IS_HRTIM_BURSTMODE(BURSTMODE)\

              (((BURSTMODE) == HRTIM_BURSTMODE_SINGLESHOT)  || \

               ((BURSTMODE) == HRTIM_BURSTMODE_CONTINOUS))


#define IS_HRTIM_BURSTMODECLOCKSOURCE(BURSTMODECLOCKSOURCE)\

              (((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_MASTER)      || \

               ((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIMER_A)     || \

               ((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIMER_B)     || \

               ((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIMER_C)     || \

               ((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIMER_D)     || \

               ((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIMER_E)     || \

               ((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIM16_OC)    || \

               ((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIM17_OC)    || \

               ((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_TIM7_TRGO)   || \

               ((BURSTMODECLOCKSOURCE) == HRTIM_BURSTMODECLOCKSOURCE_FHRTIM))


#define IS_HRTIM_HRTIM_BURSTMODEPRESCALER(BURSTMODEPRESCALER)\

              (((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV1)     || \

               ((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV2)     || \

               ((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV4)     || \

               ((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV8)     || \

               ((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV16)    || \

               ((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV32)    || \

               ((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV64)    || \

               ((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV128)   || \

               ((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV256)   || \

               ((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV512)   || \

               ((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV1024)  || \

               ((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV2048)  || \

               ((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV4096)  || \

               ((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV8192)  || \

               ((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV16384) || \

               ((BURSTMODEPRESCALER) == HRTIM_BURSTMODEPRESCALER_DIV32768))


#define IS_HRTIM_BURSTMODEPRELOAD(BURSTMODEPRELOAD)\

              (((BURSTMODEPRELOAD) == HRIM_BURSTMODEPRELOAD_DISABLED)  || \

               ((BURSTMODEPRELOAD) == HRIM_BURSTMODEPRELOAD_ENABLED))


#define IS_HRTIM_BURSTMODETRIGGER(BURSTMODETRIGGER)\

              (((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_NONE)               || \

               ((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_MASTER_RESET)       || \

               ((BURSTMODETRIGGER) == HRTIM_BURSTMODETRIGGER_MASTER_REPETITION)  || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_MASTER_CMP1)       || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_MASTER_CMP2)       || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_MASTER_CMP3)       || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_MASTER_CMP4)       || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERA_RESET)      || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERA_REPETITION) || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERA_CMP1)       || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERA_CMP2)       || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERB_RESET)      || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERB_REPETITION) || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERB_CMP1)       || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERB_CMP2)       || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERC_RESET)      || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERC_REPETITION) || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERC_CMP1)       || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERC_CMP2)       || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERD_RESET)      || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERD_REPETITION) || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERD_CMP1)       || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERD_CMP2)       || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERE_RESET)      || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERE_REPETITION) || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERE_CMP1)       || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERE_CMP2)       || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERA_EVENT7)     || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_TIMERD_EVENT8)     || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_EVENT_7)           || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_EVENT_8)           || \

               ((BURSTMODETRIGGER) ==  HRTIM_BURSTMODETRIGGER_EVENT_ONCHIP))


#define IS_HRTIM_ADCTRIGGERUPDATE(ADCTRIGGERUPDATE)\

             (((ADCTRIGGERUPDATE) == HRTIM_ADCTRIGGERUPDATE_MASTER)   || \

              ((ADCTRIGGERUPDATE) == HRTIM_ADCTRIGGERUPDATE_TIMER_A)  || \

              ((ADCTRIGGERUPDATE) == HRTIM_ADCTRIGGERUPDATE_TIMER_B)  || \

              ((ADCTRIGGERUPDATE) == HRTIM_ADCTRIGGERUPDATE_TIMER_C)  || \

              ((ADCTRIGGERUPDATE) == HRTIM_ADCTRIGGERUPDATE_TIMER_D)  || \

              ((ADCTRIGGERUPDATE) == HRTIM_ADCTRIGGERUPDATE_TIMER_E))


#define IS_HRTIM_CALIBRATIONRATE(CALIBRATIONRATE)\

    (((CALIBRATIONRATE) == HRTIM_SINGLE_CALIBRATION)   || \

     ((CALIBRATIONRATE) == HRTIM_CALIBRATIONRATE_7300) || \

     ((CALIBRATIONRATE) == HRTIM_CALIBRATIONRATE_910)  || \

     ((CALIBRATIONRATE) == HRTIM_CALIBRATIONRATE_114)  || \

     ((CALIBRATIONRATE) == HRTIM_CALIBRATIONRATE_14))


#define IS_HRTIM_TIMER_BURSTDMA(TIMER, BURSTDMA)                                            \

    ((((TIMER) == HRTIM_TIMERINDEX_MASTER)  && (((BURSTDMA) & 0xFFFFC000U) == 0x00000000U)) \

  || (((TIMER) == HRTIM_TIMERINDEX_TIMER_A) && (((BURSTDMA) & 0xFFE00000U) == 0x00000000U)) \

  || (((TIMER) == HRTIM_TIMERINDEX_TIMER_B) && (((BURSTDMA) & 0xFFE00000U) == 0x00000000U)) \

  || (((TIMER) == HRTIM_TIMERINDEX_TIMER_C) && (((BURSTDMA) & 0xFFE00000U) == 0x00000000U)) \

  || (((TIMER) == HRTIM_TIMERINDEX_TIMER_D) && (((BURSTDMA) & 0xFFE00000U) == 0x00000000U)) \

  || (((TIMER) == HRTIM_TIMERINDEX_TIMER_E) && (((BURSTDMA) & 0xFFE00000U) == 0x00000000U)))


#define IS_HRTIM_BURSTMODECTL(BURSTMODECTL)\

    (((BURSTMODECTL) == HRTIM_BURSTMODECTL_DISABLED)  || \

     ((BURSTMODECTL) == HRTIM_BURSTMODECTL_ENABLED))


#define IS_HRTIM_TIMERUPDATE(TIMERUPDATE) (((TIMERUPDATE) & 0xFFFFFFC0U) == 0x00000000U)


#define IS_HRTIM_TIMERRESET(TIMERRESET) (((TIMERRESET) & 0xFFFFC0FFU) == 0x00000000U)


#define IS_HRTIM_IT(IT) (((IT) & 0xFFFCFFC0U) == 0x00000000U)


#define IS_HRTIM_MASTER_IT(MASTER_IT) (((MASTER_IT) & 0xFFFFFF80U) == 0x00000000U)


#define IS_HRTIM_TIM_IT(TIM_IT) (((TIM_IT) & 0xFFFF8020U) == 0x00000000U)


#define IS_HRTIM_MASTER_DMA(MASTER_DMA) (((MASTER_DMA) & 0xFF80FFFFU) == 0x00000000U)


#define IS_HRTIM_TIM_DMA(TIM_DMA) (((TIM_DMA) & 0x8020FFFFU) == 0x00000000U)

/* Exported macros -----------------------------------------------------------*/

#if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)

#define __HAL_HRTIM_RESET_HANDLE_STATE(__HANDLE__)                do{                                                       \

                                                                    (__HANDLE__)->State             = HAL_HRTIM_STATE_RESET; \

                                                                    (__HANDLE__)->MspInitCallback   = NULL;                  \

                                                                    (__HANDLE__)->MspDeInitCallback = NULL;                 \

                                                                  } while(0)

#else

#define __HAL_HRTIM_RESET_HANDLE_STATE(__HANDLE__)                ((__HANDLE__)->State = HAL_HRTIM_STATE_RESET)

#endif


#define __HAL_HRTIM_ENABLE(__HANDLE__, __TIMERS__)   ((__HANDLE__)->Instance->sMasterRegs.MCR |= (__TIMERS__))


/* The counter of a timing unit is disabled only if all the timer outputs */

/* are disabled and no capture is configured                              */

#define HRTIM_TAOEN_MASK (HRTIM_OENR_TA2OEN | HRTIM_OENR_TA1OEN)

#define HRTIM_TBOEN_MASK (HRTIM_OENR_TB2OEN | HRTIM_OENR_TB1OEN)

#define HRTIM_TCOEN_MASK (HRTIM_OENR_TC2OEN | HRTIM_OENR_TC1OEN)

#define HRTIM_TDOEN_MASK (HRTIM_OENR_TD2OEN | HRTIM_OENR_TD1OEN)

#define HRTIM_TEOEN_MASK (HRTIM_OENR_TE2OEN | HRTIM_OENR_TE1OEN)

#define __HAL_HRTIM_DISABLE(__HANDLE__, __TIMERS__)\

  do {\

    if (((__TIMERS__) & HRTIM_TIMERID_MASTER) == HRTIM_TIMERID_MASTER)\

      {\

        ((__HANDLE__)->Instance->sMasterRegs.MCR &= ~HRTIM_TIMERID_MASTER);\

      }\

    if (((__TIMERS__) & HRTIM_TIMERID_TIMER_A) == HRTIM_TIMERID_TIMER_A)\

      {\

        if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TAOEN_MASK) == (uint32_t)RESET)\

          {\

            ((__HANDLE__)->Instance->sMasterRegs.MCR &= ~HRTIM_TIMERID_TIMER_A);\

          }\

      }\

    if (((__TIMERS__) & HRTIM_TIMERID_TIMER_B) == HRTIM_TIMERID_TIMER_B)\

      {\

        if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TBOEN_MASK) == (uint32_t)RESET)\

          {\

            ((__HANDLE__)->Instance->sMasterRegs.MCR &= ~HRTIM_TIMERID_TIMER_B);\

          }\

      }\

    if (((__TIMERS__) & HRTIM_TIMERID_TIMER_C) == HRTIM_TIMERID_TIMER_C)\

      {\

        if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TCOEN_MASK) == (uint32_t)RESET)\

          {\

            ((__HANDLE__)->Instance->sMasterRegs.MCR &= ~HRTIM_TIMERID_TIMER_C);\

          }\

      }\

    if (((__TIMERS__) & HRTIM_TIMERID_TIMER_D) == HRTIM_TIMERID_TIMER_D)\

      {\

        if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TDOEN_MASK) == (uint32_t)RESET)\

          {\

            ((__HANDLE__)->Instance->sMasterRegs.MCR &= ~HRTIM_TIMERID_TIMER_D);\

          }\

      }\

    if (((__TIMERS__) & HRTIM_TIMERID_TIMER_E) == HRTIM_TIMERID_TIMER_E)\

      {\

        if (((__HANDLE__)->Instance->sCommonRegs.OENR & HRTIM_TEOEN_MASK) == (uint32_t)RESET)\

          {\

            ((__HANDLE__)->Instance->sMasterRegs.MCR &= ~HRTIM_TIMERID_TIMER_E);\

          }\

      }\

  } while(0U)


#define __HAL_HRTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->sCommonRegs.IER |= (__INTERRUPT__))

#define __HAL_HRTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sCommonRegs.IER &= ~(__INTERRUPT__))


#define __HAL_HRTIM_MASTER_ENABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->sMasterRegs.MDIER |= (__INTERRUPT__))

#define __HAL_HRTIM_MASTER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->sMasterRegs.MDIER &= ~(__INTERRUPT__))


#define __HAL_HRTIM_TIMER_ENABLE_IT(__HANDLE__, __TIMER__, __INTERRUPT__)   ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxDIER |= (__INTERRUPT__))

#define __HAL_HRTIM_TIMER_DISABLE_IT(__HANDLE__, __TIMER__, __INTERRUPT__) ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxDIER &= ~(__INTERRUPT__))


#define __HAL_HRTIM_GET_ITSTATUS(__HANDLE__, __INTERRUPT__)     ((((__HANDLE__)->Instance->sCommonRegs.IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)


#define __HAL_HRTIM_MASTER_GET_ITSTATUS(__HANDLE__, __INTERRUPT__)     ((((__HANDLE__)->Instance->sMasterRegs.MDIER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)


#define __HAL_HRTIM_TIMER_GET_ITSTATUS(__HANDLE__, __TIMER__, __INTERRUPT__)     ((((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxDIER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)


#define __HAL_HRTIM_CLEAR_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->sCommonRegs.ICR = (__INTERRUPT__))


#define __HAL_HRTIM_MASTER_CLEAR_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->sMasterRegs.MICR = (__INTERRUPT__))


#define __HAL_HRTIM_TIMER_CLEAR_IT(__HANDLE__, __TIMER__, __INTERRUPT__)   ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxICR = (__INTERRUPT__))


/* DMA HANDLING */

#define __HAL_HRTIM_MASTER_ENABLE_DMA(__HANDLE__, __DMA__)   ((__HANDLE__)->Instance->sMasterRegs.MDIER |= (__DMA__))

#define __HAL_HRTIM_MASTER_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->sMasterRegs.MDIER &= ~(__DMA__))


#define __HAL_HRTIM_TIMER_ENABLE_DMA(__HANDLE__, __TIMER__, __DMA__)   ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxDIER |= (__DMA__))

#define __HAL_HRTIM_TIMER_DISABLE_DMA(__HANDLE__, __TIMER__, __DMA__) ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxDIER &= ~(__DMA__))


#define __HAL_HRTIM_GET_FLAG(__HANDLE__, __FLAG__)        (((__HANDLE__)->Instance->sCommonRegs.ISR & (__FLAG__)) == (__FLAG__))

#define __HAL_HRTIM_CLEAR_FLAG(__HANDLE__, __FLAG__)      ((__HANDLE__)->Instance->sCommonRegs.ICR = (__FLAG__))


#define __HAL_HRTIM_MASTER_GET_FLAG(__HANDLE__, __FLAG__)        (((__HANDLE__)->Instance->sMasterRegs.MISR & (__FLAG__)) == (__FLAG__))

#define __HAL_HRTIM_MASTER_CLEAR_FLAG(__HANDLE__, __FLAG__)      ((__HANDLE__)->Instance->sMasterRegs.MICR = (__FLAG__))


#define __HAL_HRTIM_TIMER_GET_FLAG(__HANDLE__,  __TIMER__, __FLAG__)        (((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxISR & (__FLAG__)) == (__FLAG__))

#define __HAL_HRTIM_TIMER_CLEAR_FLAG(__HANDLE__,  __TIMER__, __FLAG__)      ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxICR = (__FLAG__))


#define __HAL_HRTIM_SETCOUNTER(__HANDLE__, __TIMER__, __COUNTER__) \

  (((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? ((__HANDLE__)->Instance->sMasterRegs.MCNTR = (__COUNTER__)) :\

   ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CNTxR = (__COUNTER__)))


#define __HAL_HRTIM_GETCOUNTER(__HANDLE__, __TIMER__) \

  (((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? ((__HANDLE__)->Instance->sMasterRegs.MCNTR) :\

   ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CNTxR))


#define __HAL_HRTIM_SETPERIOD(__HANDLE__, __TIMER__, __PERIOD__) \

  (((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? ((__HANDLE__)->Instance->sMasterRegs.MPER = (__PERIOD__)) :\

   ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].PERxR = (__PERIOD__)))


#define __HAL_HRTIM_GETPERIOD(__HANDLE__, __TIMER__) \

  (((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? ((__HANDLE__)->Instance->sMasterRegs.MPER) :\

   ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].PERxR))


#define __HAL_HRTIM_SETCLOCKPRESCALER(__HANDLE__, __TIMER__, __PRESCALER__) \

  (((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? (MODIFY_REG((__HANDLE__)->Instance->sMasterRegs.MCR, HRTIM_MCR_CK_PSC, (__PRESCALER__))) :\

   (MODIFY_REG((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxCR, HRTIM_TIMCR_CK_PSC, (__PRESCALER__))))


#define __HAL_HRTIM_GETCLOCKPRESCALER(__HANDLE__, __TIMER__) \

  (((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? ((__HANDLE__)->Instance->sMasterRegs.MCR & HRTIM_MCR_CK_PSC) :\

   ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].TIMxCR  & HRTIM_TIMCR_CK_PSC))


#define __HAL_HRTIM_SETCOMPARE(__HANDLE__, __TIMER__, __COMPAREUNIT__, __COMPARE__) \

      (((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? \

        (((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_1) ? ((__HANDLE__)->Instance->sMasterRegs.MCMP1R = (__COMPARE__)) :\

         ((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_2) ? ((__HANDLE__)->Instance->sMasterRegs.MCMP2R = (__COMPARE__)) :\

         ((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_3) ? ((__HANDLE__)->Instance->sMasterRegs.MCMP3R = (__COMPARE__)) :\

         ((__HANDLE__)->Instance->sMasterRegs.MCMP4R = (__COMPARE__))) \

         : \

        (((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_1) ? ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP1xR = (__COMPARE__)) :\

         ((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_2) ? ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP2xR = (__COMPARE__)) :\

         ((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_3) ? ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP3xR = (__COMPARE__)) :\

         ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP4xR = (__COMPARE__))))


#define __HAL_HRTIM_GETCOMPARE(__HANDLE__, __TIMER__, __COMPAREUNIT__) \

      (((__TIMER__) == HRTIM_TIMERINDEX_MASTER) ? \

        (((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_1) ? ((__HANDLE__)->Instance->sMasterRegs.MCMP1R) :\

         ((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_2) ? ((__HANDLE__)->Instance->sMasterRegs.MCMP2R) :\

         ((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_3) ? ((__HANDLE__)->Instance->sMasterRegs.MCMP3R) :\

         ((__HANDLE__)->Instance->sMasterRegs.MCMP4R)) \

         : \

        (((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_1) ? ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP1xR) :\

         ((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_2) ? ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP2xR) :\

         ((__COMPAREUNIT__) == HRTIM_COMPAREUNIT_3) ? ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP3xR) :\

         ((__HANDLE__)->Instance->sTimerxRegs[(__TIMER__)].CMP4xR)))


/* Exported functions --------------------------------------------------------*/

/* Initialization and Configuration functions  ********************************/

HAL_StatusTypeDef HAL_HRTIM_Init(HRTIM_HandleTypeDef *hhrtim);


HAL_StatusTypeDef HAL_HRTIM_DeInit (HRTIM_HandleTypeDef *hhrtim);


void HAL_HRTIM_MspInit(HRTIM_HandleTypeDef *hhrtim);


void HAL_HRTIM_MspDeInit(HRTIM_HandleTypeDef *hhrtim);


HAL_StatusTypeDef HAL_HRTIM_TimeBaseConfig(HRTIM_HandleTypeDef *hhrtim,

                                           uint32_t TimerIdx,

                                           const HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg);

/* Simple time base related functions  *****************************************/

HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart(HRTIM_HandleTypeDef *hhrtim,

                                           uint32_t TimerIdx);


HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop(HRTIM_HandleTypeDef *hhrtim,

                                          uint32_t TimerIdx);


HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart_IT(HRTIM_HandleTypeDef *hhrtim,

                                              uint32_t TimerIdx);


HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop_IT(HRTIM_HandleTypeDef *hhrtim,

                                             uint32_t TimerIdx);


HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart_DMA(HRTIM_HandleTypeDef *hhrtim,

                                               uint32_t TimerIdx,

                                               uint32_t SrcAddr,

                                               uint32_t DestAddr,

                                               uint32_t Length);


HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop_DMA(HRTIM_HandleTypeDef *hhrtim,

                                              uint32_t TimerIdx);


/* Simple output compare related functions  ************************************/

HAL_StatusTypeDef HAL_HRTIM_SimpleOCChannelConfig(HRTIM_HandleTypeDef *hhrtim,

                                                 uint32_t TimerIdx,

                                                 uint32_t OCChannel,

                                                 const HRTIM_SimpleOCChannelCfgTypeDef* pSimpleOCChannelCfg);


HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart(HRTIM_HandleTypeDef *hhrtim,

                                         uint32_t TimerIdx,

                                         uint32_t OCChannel);


HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop(HRTIM_HandleTypeDef *hhrtim,

                                        uint32_t TimerIdx,

                                        uint32_t OCChannel);


HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_IT(HRTIM_HandleTypeDef *hhrtim,

                                            uint32_t TimerIdx,

                                            uint32_t OCChannel);


HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop_IT(HRTIM_HandleTypeDef *hhrtim,

                                           uint32_t TimerIdx,

                                           uint32_t OCChannel);


HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_DMA(HRTIM_HandleTypeDef *hhrtim,

                                             uint32_t TimerIdx,

                                             uint32_t OCChannel,

                                             uint32_t SrcAddr,

                                             uint32_t DestAddr,

                                             uint32_t Length);


HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop_DMA(HRTIM_HandleTypeDef *hhrtim,

                                            uint32_t TimerIdx,

                                            uint32_t OCChannel);


/* Simple PWM output related functions  ****************************************/

HAL_StatusTypeDef HAL_HRTIM_SimplePWMChannelConfig(HRTIM_HandleTypeDef *hhrtim,

                                                  uint32_t TimerIdx,

                                                  uint32_t PWMChannel,

                                                  const HRTIM_SimplePWMChannelCfgTypeDef* pSimplePWMChannelCfg);


HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart(HRTIM_HandleTypeDef *hhrtim,

                                          uint32_t TimerIdx,

                                          uint32_t PWMChannel);


HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop(HRTIM_HandleTypeDef *hhrtim,

                                         uint32_t TimerIdx,

                                         uint32_t PWMChannel);


HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_IT(HRTIM_HandleTypeDef *hhrtim,

                                             uint32_t TimerIdx,

                                             uint32_t PWMChannel);


HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop_IT(HRTIM_HandleTypeDef *hhrtim,

                                            uint32_t TimerIdx,

                                            uint32_t PWMChannel);


HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_DMA(HRTIM_HandleTypeDef *hhrtim,

                                              uint32_t TimerIdx,

                                              uint32_t PWMChannel,

                                              uint32_t SrcAddr,

                                              uint32_t DestAddr,

                                              uint32_t Length);


HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop_DMA(HRTIM_HandleTypeDef *hhrtim,

                                             uint32_t TimerIdx,

                                             uint32_t PWMChannel);


/* Simple capture related functions  *******************************************/

HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureChannelConfig(HRTIM_HandleTypeDef *hhrtim,

                                                      uint32_t TimerIdx,

                                                      uint32_t CaptureChannel,

                                                      const HRTIM_SimpleCaptureChannelCfgTypeDef* pSimpleCaptureChannelCfg);


HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart(HRTIM_HandleTypeDef *hhrtim,

                                              uint32_t TimerIdx,

                                              uint32_t CaptureChannel);


HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop(HRTIM_HandleTypeDef *hhrtim,

                                             uint32_t TimerIdx,

                                             uint32_t CaptureChannel);


HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart_IT(HRTIM_HandleTypeDef *hhrtim,

                                                 uint32_t TimerIdx,

                                                 uint32_t CaptureChannel);


HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop_IT(HRTIM_HandleTypeDef *hhrtim,

                                                uint32_t TimerIdx,

                                                uint32_t CaptureChannel);


HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart_DMA(HRTIM_HandleTypeDef *hhrtim,

                                                  uint32_t TimerIdx,

                                                  uint32_t CaptureChannel,

                                                  uint32_t SrcAddr,

                                                  uint32_t DestAddr,

                                                  uint32_t Length);


HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop_DMA(HRTIM_HandleTypeDef *hhrtim,

                                                 uint32_t TimerIdx,

                                                 uint32_t CaptureChannel);


/* Simple one pulse related functions  *****************************************/

HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseChannelConfig(HRTIM_HandleTypeDef *hhrtim,

                                                       uint32_t TimerIdx,

                                                       uint32_t OnePulseChannel,

                                                       const HRTIM_SimpleOnePulseChannelCfgTypeDef* pSimpleOnePulseChannelCfg);


HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStart(HRTIM_HandleTypeDef *hhrtim,

                                               uint32_t TimerIdx,

                                               uint32_t OnePulseChannel);


HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStop(HRTIM_HandleTypeDef *hhrtim,

                                              uint32_t TimerIdx,

                                             uint32_t OnePulseChannel);


HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStart_IT(HRTIM_HandleTypeDef *hhrtim,

                                                  uint32_t TimerIdx,

                                                  uint32_t OnePulseChannel);


HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStop_IT(HRTIM_HandleTypeDef *hhrtim,

                                                 uint32_t TimerIdx,

                                                 uint32_t OnePulseChannel);


HAL_StatusTypeDef HAL_HRTIM_BurstModeConfig(HRTIM_HandleTypeDef *hhrtim,

                                            const HRTIM_BurstModeCfgTypeDef* pBurstModeCfg);


HAL_StatusTypeDef HAL_HRTIM_EventConfig(HRTIM_HandleTypeDef *hhrtim,

                                        uint32_t Event,

                                        const HRTIM_EventCfgTypeDef* pEventCfg);


HAL_StatusTypeDef HAL_HRTIM_EventPrescalerConfig(HRTIM_HandleTypeDef *hhrtim,

                                                 uint32_t Prescaler);


HAL_StatusTypeDef HAL_HRTIM_FaultConfig(HRTIM_HandleTypeDef *hhrtim,

                                        uint32_t Fault,

                                        const HRTIM_FaultCfgTypeDef* pFaultCfg);


HAL_StatusTypeDef HAL_HRTIM_FaultPrescalerConfig(HRTIM_HandleTypeDef *hhrtim,

                                                 uint32_t Prescaler);


void HAL_HRTIM_FaultModeCtl(HRTIM_HandleTypeDef * hhrtim,

                            uint32_t Faults,

                            uint32_t Enable);


HAL_StatusTypeDef HAL_HRTIM_ADCTriggerConfig(HRTIM_HandleTypeDef *hhrtim,

                                             uint32_t ADCTrigger,

                                             const HRTIM_ADCTriggerCfgTypeDef* pADCTriggerCfg);


/* Waveform related functions *************************************************/

HAL_StatusTypeDef HAL_HRTIM_WaveformTimerConfig(HRTIM_HandleTypeDef *hhrtim,

                                                uint32_t TimerIdx,

                                                const HRTIM_TimerCfgTypeDef * pTimerCfg);


HAL_StatusTypeDef HAL_HRTIM_WaveformCompareConfig(HRTIM_HandleTypeDef *hhrtim,

                                                  uint32_t TimerIdx,

                                                  uint32_t CompareUnit,

                                                  const HRTIM_CompareCfgTypeDef* pCompareCfg);


HAL_StatusTypeDef HAL_HRTIM_WaveformCaptureConfig(HRTIM_HandleTypeDef *hhrtim,

                                                  uint32_t TimerIdx,

                                                  uint32_t CaptureUnit,

                                                  const HRTIM_CaptureCfgTypeDef* pCaptureCfg);


HAL_StatusTypeDef HAL_HRTIM_WaveformOutputConfig(HRTIM_HandleTypeDef *hhrtim,

                                                 uint32_t TimerIdx,

                                                 uint32_t Output,

                                                 const HRTIM_OutputCfgTypeDef * pOutputCfg);


HAL_StatusTypeDef HAL_HRTIM_WaveformSetOutputLevel(HRTIM_HandleTypeDef *hhrtim,

                                                   uint32_t TimerIdx,

                                                   uint32_t Output,

                                                   uint32_t OutputLevel);


HAL_StatusTypeDef HAL_HRTIM_TimerEventFilteringConfig(HRTIM_HandleTypeDef *hhrtim,

                                                      uint32_t TimerIdx,

                                                      uint32_t Event,

                                                      const HRTIM_TimerEventFilteringCfgTypeDef * pTimerEventFilteringCfg);


HAL_StatusTypeDef HAL_HRTIM_DeadTimeConfig(HRTIM_HandleTypeDef *hhrtim,

                                           uint32_t TimerIdx,

                                           const HRTIM_DeadTimeCfgTypeDef* pDeadTimeCfg);


HAL_StatusTypeDef HAL_HRTIM_ChopperModeConfig(HRTIM_HandleTypeDef *hhrtim,

                                              uint32_t TimerIdx,

                                              const HRTIM_ChopperModeCfgTypeDef* pChopperModeCfg);


HAL_StatusTypeDef HAL_HRTIM_BurstDMAConfig(HRTIM_HandleTypeDef *hhrtim,

                                           uint32_t TimerIdx,

                                           uint32_t RegistersToUpdate);


HAL_StatusTypeDef HAL_HRTIM_WaveformCountStart(HRTIM_HandleTypeDef *hhrtim,

                                                 uint32_t Timers);


HAL_StatusTypeDef HAL_HRTIM_WaveformCountStop(HRTIM_HandleTypeDef *hhrtim,

                                                 uint32_t Timers);


HAL_StatusTypeDef HAL_HRTIM_WaveformCountStart_IT(HRTIM_HandleTypeDef *hhrtim,

                                                 uint32_t Timers);


HAL_StatusTypeDef HAL_HRTIM_WaveformCountStop_IT(HRTIM_HandleTypeDef *hhrtim,

                                                 uint32_t Timers);


HAL_StatusTypeDef HAL_HRTIM_WaveformCountStart_DMA(HRTIM_HandleTypeDef *hhrtim,

                                                     uint32_t Timers);


HAL_StatusTypeDef HAL_HRTIM_WaveformCountStop_DMA(HRTIM_HandleTypeDef *hhrtim,

                                                    uint32_t Timers);


HAL_StatusTypeDef HAL_HRTIM_WaveformOutputStart(HRTIM_HandleTypeDef *hhrtim,

                                                uint32_t OutputsToStart);


HAL_StatusTypeDef HAL_HRTIM_WaveformOutputStop(HRTIM_HandleTypeDef *hhrtim,

                                               uint32_t OutputsToStop);


HAL_StatusTypeDef HAL_HRTIM_BurstModeCtl(HRTIM_HandleTypeDef *hhrtim,

                                         uint32_t Enable);


HAL_StatusTypeDef HAL_HRTIM_BurstModeSoftwareTrigger(HRTIM_HandleTypeDef *hhrtim);


HAL_StatusTypeDef HAL_HRTIM_SoftwareCapture(HRTIM_HandleTypeDef *hhrtim,

                                            uint32_t TimerIdx,

                                            uint32_t CaptureUnit);


HAL_StatusTypeDef HAL_HRTIM_SoftwareUpdate(HRTIM_HandleTypeDef *hhrtim,

                                           uint32_t Timers);


HAL_StatusTypeDef HAL_HRTIM_SoftwareReset(HRTIM_HandleTypeDef *hhrtim,

                                          uint32_t Timers);


HAL_StatusTypeDef HAL_HRTIM_BurstDMATransfer(HRTIM_HandleTypeDef *hhrtim,

                                             uint32_t TimerIdx,

                                             uint32_t BurstBufferAddress,

                                             uint32_t BurstBufferLength);


HAL_StatusTypeDef HAL_HRTIM_UpdateEnable(HRTIM_HandleTypeDef *hhrtim,

                                          uint32_t Timers);


HAL_StatusTypeDef HAL_HRTIM_UpdateDisable(HRTIM_HandleTypeDef *hhrtim,

                                          uint32_t Timers);


/* HRTIM peripheral state functions */

HAL_HRTIM_StateTypeDef HAL_HRTIM_GetState(const HRTIM_HandleTypeDef* hhrtim);


uint32_t HAL_HRTIM_GetCapturedValue(const HRTIM_HandleTypeDef * hhrtim,

                                    uint32_t TimerIdx,

                                    uint32_t CaptureUnit);


uint32_t HAL_HRTIM_WaveformGetOutputLevel(const HRTIM_HandleTypeDef *hhrtim,

                                          uint32_t TimerIdx,

                                          uint32_t Output);


uint32_t HAL_HRTIM_WaveformGetOutputState(const HRTIM_HandleTypeDef * hhrtim,

                                          uint32_t TimerIdx,

                                          uint32_t Output);


uint32_t HAL_HRTIM_GetDelayedProtectionStatus(const HRTIM_HandleTypeDef *hhrtim,

                                              uint32_t TimerIdx,

                                              uint32_t Output);


uint32_t HAL_HRTIM_GetBurstStatus(const HRTIM_HandleTypeDef *hhrtim);


uint32_t HAL_HRTIM_GetCurrentPushPullStatus(const HRTIM_HandleTypeDef *hhrtim,

                                            uint32_t TimerIdx);


uint32_t HAL_HRTIM_GetIdlePushPullStatus(const HRTIM_HandleTypeDef *hhrtim,

                                         uint32_t TimerIdx);


/* IRQ handler */

void HAL_HRTIM_IRQHandler(HRTIM_HandleTypeDef *hhrtim,

                          uint32_t TimerIdx);


/* HRTIM events related callback functions */

void HAL_HRTIM_Fault1Callback(HRTIM_HandleTypeDef *hhrtim);

void HAL_HRTIM_Fault2Callback(HRTIM_HandleTypeDef *hhrtim);

void HAL_HRTIM_Fault3Callback(HRTIM_HandleTypeDef *hhrtim);

void HAL_HRTIM_Fault4Callback(HRTIM_HandleTypeDef *hhrtim);

void HAL_HRTIM_Fault5Callback(HRTIM_HandleTypeDef *hhrtim);

void HAL_HRTIM_SystemFaultCallback(HRTIM_HandleTypeDef *hhrtim);

void HAL_HRTIM_BurstModePeriodCallback(HRTIM_HandleTypeDef *hhrtim);

void HAL_HRTIM_SynchronizationEventCallback(HRTIM_HandleTypeDef *hhrtim);


/* Timer events related callback functions */

void HAL_HRTIM_RegistersUpdateCallback(HRTIM_HandleTypeDef *hhrtim,

                                              uint32_t TimerIdx);

void HAL_HRTIM_RepetitionEventCallback(HRTIM_HandleTypeDef *hhrtim,

                                              uint32_t TimerIdx);

void HAL_HRTIM_Compare1EventCallback(HRTIM_HandleTypeDef *hhrtim,

                                            uint32_t TimerIdx);

void HAL_HRTIM_Compare2EventCallback(HRTIM_HandleTypeDef *hhrtim,

                                            uint32_t TimerIdx);

void HAL_HRTIM_Compare3EventCallback(HRTIM_HandleTypeDef *hhrtim,

                                            uint32_t TimerIdx);

void HAL_HRTIM_Compare4EventCallback(HRTIM_HandleTypeDef *hhrtim,

                                            uint32_t TimerIdx);

void HAL_HRTIM_Capture1EventCallback(HRTIM_HandleTypeDef *hhrtim,

                                            uint32_t TimerIdx);

void HAL_HRTIM_Capture2EventCallback(HRTIM_HandleTypeDef *hhrtim,

                                            uint32_t TimerIdx);

void HAL_HRTIM_DelayedProtectionCallback(HRTIM_HandleTypeDef *hhrtim,

                                                uint32_t TimerIdx);

void HAL_HRTIM_CounterResetCallback(HRTIM_HandleTypeDef *hhrtim,

                                           uint32_t TimerIdx);

void HAL_HRTIM_Output1SetCallback(HRTIM_HandleTypeDef *hhrtim,

                                         uint32_t TimerIdx);

void HAL_HRTIM_Output1ResetCallback(HRTIM_HandleTypeDef *hhrtim,

                                           uint32_t TimerIdx);

void HAL_HRTIM_Output2SetCallback(HRTIM_HandleTypeDef *hhrtim,

                                         uint32_t TimerIdx);

void HAL_HRTIM_Output2ResetCallback(HRTIM_HandleTypeDef *hhrtim,

                                           uint32_t TimerIdx);

void HAL_HRTIM_BurstDMATransferCallback(HRTIM_HandleTypeDef *hhrtim,

                                               uint32_t TimerIdx);

void HAL_HRTIM_ErrorCallback(HRTIM_HandleTypeDef *hhrtim);


#if (USE_HAL_HRTIM_REGISTER_CALLBACKS == 1)

HAL_StatusTypeDef HAL_HRTIM_RegisterCallback(HRTIM_HandleTypeDef *       hhrtim,

                                             HAL_HRTIM_CallbackIDTypeDef CallbackID,

                                             pHRTIM_CallbackTypeDef      pCallback);


HAL_StatusTypeDef HAL_HRTIM_UnRegisterCallback(HRTIM_HandleTypeDef *       hhrtim,

                                               HAL_HRTIM_CallbackIDTypeDef CallbackID);


HAL_StatusTypeDef HAL_HRTIM_TIMxRegisterCallback(HRTIM_HandleTypeDef *        hhrtim,

                                                 HAL_HRTIM_CallbackIDTypeDef  CallbackID,

                                                 pHRTIM_TIMxCallbackTypeDef   pCallback);


HAL_StatusTypeDef HAL_HRTIM_TIMxUnRegisterCallback(HRTIM_HandleTypeDef *       hhrtim,

                                                   HAL_HRTIM_CallbackIDTypeDef CallbackID);

#endif /* USE_HAL_HRTIM_REGISTER_CALLBACKS */


#endif /* HRTIM1 */


#ifdef __cplusplus

}

#endif


#endif /* STM32H7xx_HAL_HRTIM_H */

__IO
#define __IO
Definition: core_cm4.h:239

stm32h7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.

HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32h7xx_hal_def.h:47

HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32h7xx_hal_def.h:58

HRTIM_TypeDef
Definition: stm32h742xx.h:1662

__DMA_HandleTypeDef
DMA handle Structure definition.
Definition: stm32h7xx_hal_dma.h:138