RTEMS 6.1-rc5
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stm32h7xx_hal_gfxmmu.h
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1
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_HAL_GFXMMU_H
21#define STM32H7xx_HAL_GFXMMU_H
22
23#ifdef __cplusplus
24 extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx_hal_def.h"
29
30#if defined(GFXMMU)
31
40/* Exported types ------------------------------------------------------------*/
49typedef enum
50{
51 HAL_GFXMMU_STATE_RESET = 0x00U,
52 HAL_GFXMMU_STATE_READY = 0x01U,
53}HAL_GFXMMU_StateTypeDef;
54
58typedef struct
59{
60 uint32_t Buf0Address;
61 uint32_t Buf1Address;
62 uint32_t Buf2Address;
63 uint32_t Buf3Address;
64}GFXMMU_BuffersTypeDef;
65
69typedef struct
70{
71 FunctionalState Activation;
73 uint32_t CacheLock;
75 uint32_t CacheLockBuffer;
78 uint32_t CacheForce;
81 uint32_t OutterBufferability;
83 uint32_t OutterCachability;
85 uint32_t Prefetch;
87}GFXMMU_CachePrefetchTypeDef;
88
92typedef struct
93{
94 FunctionalState Activation;
95 uint32_t UsedInterrupts;
98}GFXMMU_InterruptsTypeDef;
99
103typedef struct
104{
105 uint32_t BlocksPerLine;
107 uint32_t DefaultValue;
108 GFXMMU_BuffersTypeDef Buffers;
109 GFXMMU_CachePrefetchTypeDef CachePrefetch;
110 GFXMMU_InterruptsTypeDef Interrupts;
111}GFXMMU_InitTypeDef;
112
116#if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
117typedef struct __GFXMMU_HandleTypeDef
118#else
119typedef struct
120#endif
121{
122 GFXMMU_TypeDef *Instance;
123 GFXMMU_InitTypeDef Init;
124 HAL_GFXMMU_StateTypeDef State;
125 __IO uint32_t ErrorCode;
126#if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
127 void (*ErrorCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu);
128 void (*MspInitCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu);
129 void (*MspDeInitCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu);
130#endif
131}GFXMMU_HandleTypeDef;
132
136typedef struct
137{
138 uint32_t LineNumber;
140 uint32_t LineStatus;
142 uint32_t FirstVisibleBlock;
144 uint32_t LastVisibleBlock;
146 int32_t LineOffset;
150}GFXMMU_LutLineTypeDef;
151
152#if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
156typedef enum
157{
158 HAL_GFXMMU_ERROR_CB_ID = 0x00U,
159 HAL_GFXMMU_MSPINIT_CB_ID = 0x01U,
160 HAL_GFXMMU_MSPDEINIT_CB_ID = 0x02U
161}HAL_GFXMMU_CallbackIDTypeDef;
162
166typedef void (*pGFXMMU_CallbackTypeDef)(GFXMMU_HandleTypeDef *hgfxmmu);
167#endif
168
172/* End of exported types -----------------------------------------------------*/
173
174/* Exported constants --------------------------------------------------------*/
184#define GFXMMU_256BLOCKS 0x00000000U
185#define GFXMMU_192BLOCKS GFXMMU_CR_192BM
194#define GFXMMU_CACHE_LOCK_DISABLE 0x00000000U
195#define GFXMMU_CACHE_LOCK_ENABLE GFXMMU_CR_CL
204#define GFXMMU_CACHE_LOCK_BUFFER0 0x00000000U
205#define GFXMMU_CACHE_LOCK_BUFFER1 GFXMMU_CR_CLB_0
206#define GFXMMU_CACHE_LOCK_BUFFER2 GFXMMU_CR_CLB_1
207#define GFXMMU_CACHE_LOCK_BUFFER3 GFXMMU_CR_CLB
216#define GFXMMU_CACHE_FORCE_DISABLE 0x00000000U
217#define GFXMMU_CACHE_FORCE_ENABLE GFXMMU_CR_FC
226#define GFXMMU_OUTTER_BUFFERABILITY_DISABLE 0x00000000U
227#define GFXMMU_OUTTER_BUFFERABILITY_ENABLE GFXMMU_CR_OB
236#define GFXMMU_OUTTER_CACHABILITY_DISABLE 0x00000000U
237#define GFXMMU_OUTTER_CACHABILITY_ENABLE GFXMMU_CR_OC
246#define GFXMMU_PREFETCH_DISABLE GFXMMU_CR_PD
247#define GFXMMU_PREFETCH_ENABLE 0x00000000U
256#define GFXMMU_AHB_MASTER_ERROR_IT GFXMMU_CR_AMEIE
257#define GFXMMU_BUFFER0_OVERFLOW_IT GFXMMU_CR_B0OIE
258#define GFXMMU_BUFFER1_OVERFLOW_IT GFXMMU_CR_B1OIE
259#define GFXMMU_BUFFER2_OVERFLOW_IT GFXMMU_CR_B2OIE
260#define GFXMMU_BUFFER3_OVERFLOW_IT GFXMMU_CR_B3OIE
269#define GFXMMU_ERROR_NONE 0x00000000U
270#define GFXMMU_ERROR_BUFFER0_OVERFLOW GFXMMU_SR_B0OF
271#define GFXMMU_ERROR_BUFFER1_OVERFLOW GFXMMU_SR_B1OF
272#define GFXMMU_ERROR_BUFFER2_OVERFLOW GFXMMU_SR_B2OF
273#define GFXMMU_ERROR_BUFFER3_OVERFLOW GFXMMU_SR_B3OF
274#define GFXMMU_ERROR_AHB_MASTER GFXMMU_SR_AMEF
275#if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
276#define GFXMMU_ERROR_INVALID_CALLBACK 0x00000100U
277#endif
286#define GFXMMU_LUT_LINE_DISABLE 0x00000000U
287#define GFXMMU_LUT_LINE_ENABLE GFXMMU_LUTxL_EN
296#define GFXMMU_CACHE_FORCE_FLUSH GFXMMU_CCR_FF
297#define GFXMMU_CACHE_FORCE_INVALIDATE GFXMMU_CCR_FI
305/* End of exported constants -------------------------------------------------*/
306
307/* Exported macros -----------------------------------------------------------*/
317#if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
318#define __HAL_GFXMMU_RESET_HANDLE_STATE(__HANDLE__) do{ \
319 (__HANDLE__)->State = HAL_GFXMMU_STATE_RESET; \
320 (__HANDLE__)->MspInitCallback = NULL; \
321 (__HANDLE__)->MspDeInitCallback = NULL; \
322 } while(0)
323#else
324#define __HAL_GFXMMU_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_GFXMMU_STATE_RESET)
325#endif
326
330/* End of exported macros ----------------------------------------------------*/
331
332/* Exported functions --------------------------------------------------------*/
340/* Initialization and de-initialization functions *****************************/
341HAL_StatusTypeDef HAL_GFXMMU_Init(GFXMMU_HandleTypeDef *hgfxmmu);
342HAL_StatusTypeDef HAL_GFXMMU_DeInit(GFXMMU_HandleTypeDef *hgfxmmu);
343void HAL_GFXMMU_MspInit(GFXMMU_HandleTypeDef *hgfxmmu);
344void HAL_GFXMMU_MspDeInit(GFXMMU_HandleTypeDef *hgfxmmu);
345#if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
346/* GFXMMU callbacks register/unregister functions *****************************/
347HAL_StatusTypeDef HAL_GFXMMU_RegisterCallback(GFXMMU_HandleTypeDef *hgfxmmu,
348 HAL_GFXMMU_CallbackIDTypeDef CallbackID,
349 pGFXMMU_CallbackTypeDef pCallback);
350HAL_StatusTypeDef HAL_GFXMMU_UnRegisterCallback(GFXMMU_HandleTypeDef *hgfxmmu,
351 HAL_GFXMMU_CallbackIDTypeDef CallbackID);
352#endif
360/* Operation functions ********************************************************/
361HAL_StatusTypeDef HAL_GFXMMU_ConfigLut(GFXMMU_HandleTypeDef *hgfxmmu,
362 uint32_t FirstLine,
363 uint32_t LinesNumber,
364 uint32_t Address);
365
366HAL_StatusTypeDef HAL_GFXMMU_DisableLutLines(GFXMMU_HandleTypeDef *hgfxmmu,
367 uint32_t FirstLine,
368 uint32_t LinesNumber);
369
370HAL_StatusTypeDef HAL_GFXMMU_ConfigLutLine(GFXMMU_HandleTypeDef *hgfxmmu, GFXMMU_LutLineTypeDef *lutLine);
371
372HAL_StatusTypeDef HAL_GFXMMU_ConfigForceCache(GFXMMU_HandleTypeDef *hgfxmmu, uint32_t ForceParam);
373
374HAL_StatusTypeDef HAL_GFXMMU_ModifyBuffers(GFXMMU_HandleTypeDef *hgfxmmu, GFXMMU_BuffersTypeDef *Buffers);
375
376HAL_StatusTypeDef HAL_GFXMMU_ModifyCachePrefetch(GFXMMU_HandleTypeDef *hgfxmmu,
377 GFXMMU_CachePrefetchTypeDef *CachePrefetch);
378
379void HAL_GFXMMU_IRQHandler(GFXMMU_HandleTypeDef *hgfxmmu);
380
381void HAL_GFXMMU_ErrorCallback(GFXMMU_HandleTypeDef *hgfxmmu);
390/* State function *************************************************************/
391HAL_GFXMMU_StateTypeDef HAL_GFXMMU_GetState(GFXMMU_HandleTypeDef *hgfxmmu);
392
393uint32_t HAL_GFXMMU_GetError(GFXMMU_HandleTypeDef *hgfxmmu);
401/* End of exported functions -------------------------------------------------*/
402
403/* Private macros ------------------------------------------------------------*/
408#define IS_GFXMMU_BLOCKS_PER_LINE(VALUE) (((VALUE) == GFXMMU_256BLOCKS) || \
409 ((VALUE) == GFXMMU_192BLOCKS))
410
411#define IS_GFXMMU_BUFFER_ADDRESS(VALUE) (((VALUE) & 0xFU) == 0U)
412
413#define IS_GFXMMU_CACHE_LOCK(VALUE) (((VALUE) == GFXMMU_CACHE_LOCK_DISABLE) || \
414 ((VALUE) == GFXMMU_CACHE_LOCK_ENABLE))
415
416#define IS_GFXMMU_CACHE_LOCK_BUFFER(VALUE) (((VALUE) == GFXMMU_CACHE_LOCK_BUFFER0) || \
417 ((VALUE) == GFXMMU_CACHE_LOCK_BUFFER1) || \
418 ((VALUE) == GFXMMU_CACHE_LOCK_BUFFER2) || \
419 ((VALUE) == GFXMMU_CACHE_LOCK_BUFFER3))
420
421#define IS_GFXMMU_CACHE_FORCE(VALUE) (((VALUE) == GFXMMU_CACHE_FORCE_DISABLE) || \
422 ((VALUE) == GFXMMU_CACHE_FORCE_ENABLE))
423
424#define IS_GFXMMU_OUTTER_BUFFERABILITY(VALUE) (((VALUE) == GFXMMU_OUTTER_BUFFERABILITY_DISABLE) || \
425 ((VALUE) == GFXMMU_OUTTER_BUFFERABILITY_ENABLE))
426
427#define IS_GFXMMU_OUTTER_CACHABILITY(VALUE) (((VALUE) == GFXMMU_OUTTER_CACHABILITY_DISABLE) || \
428 ((VALUE) == GFXMMU_OUTTER_CACHABILITY_ENABLE))
429
430#define IS_GFXMMU_PREFETCH(VALUE) (((VALUE) == GFXMMU_PREFETCH_DISABLE) || \
431 ((VALUE) == GFXMMU_PREFETCH_ENABLE))
432
433#define IS_GFXMMU_INTERRUPTS(VALUE) (((VALUE) & 0x1FU) != 0U)
434
435#define IS_GFXMMU_LUT_LINE(VALUE) ((VALUE) < 1024U)
436
437#define IS_GFXMMU_LUT_LINES_NUMBER(VALUE) (((VALUE) > 0U) && ((VALUE) <= 1024U))
438
439#define IS_GFXMMU_LUT_LINE_STATUS(VALUE) (((VALUE) == GFXMMU_LUT_LINE_DISABLE) || \
440 ((VALUE) == GFXMMU_LUT_LINE_ENABLE))
441
442#define IS_GFXMMU_LUT_BLOCK(VALUE) ((VALUE) < 256U)
443
444#define IS_GFXMMU_LUT_LINE_OFFSET(VALUE) (((VALUE) >= -4080) && ((VALUE) <= 4190208))
445
446#define IS_GFXMMU_CACHE_FORCE_ACTION(VALUE) (((VALUE) == GFXMMU_CACHE_FORCE_FLUSH) || \
447 ((VALUE) == GFXMMU_CACHE_FORCE_INVALIDATE) || \
448 ((VALUE) == (GFXMMU_CACHE_FORCE_FLUSH | GFXMMU_CACHE_FORCE_INVALIDATE)))
452/* End of private macros -----------------------------------------------------*/
453
461#endif /* GFXMMU */
462#ifdef __cplusplus
463}
464#endif
465
466#endif /* STM32H7xx_HAL_GFXMMU_H */
467
__IO
#define __IO
Definition: core_cm4.h:239
stm32h7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32h7xx_hal_def.h:47
GFXMMU_TypeDef
GFXMMU registers.
Definition: stm32h7a3xx.h:874
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