RTEMS 6.1-rc5
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stm32h7xx_hal_comp.h
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1
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_HAL_COMP_H
21#define STM32H7xx_HAL_COMP_H
22
23#ifdef __cplusplus
24 extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx_hal_def.h"
29
38/* Exported types ------------------------------------------------------------*/
47typedef struct
48{
49
50 uint32_t WindowMode;
55 uint32_t Mode;
60 uint32_t NonInvertingInput;
63 uint32_t InvertingInput;
66 uint32_t Hysteresis;
69 uint32_t OutputPol;
72 uint32_t BlankingSrce;
75 uint32_t TriggerMode;
78}COMP_InitTypeDef;
79
83#define COMP_STATE_BITFIELD_LOCK ((uint32_t)0x10)
84typedef enum
85{
86 HAL_COMP_STATE_RESET = 0x00,
87 HAL_COMP_STATE_RESET_LOCKED = (HAL_COMP_STATE_RESET | COMP_STATE_BITFIELD_LOCK),
88 HAL_COMP_STATE_READY = 0x01,
89 HAL_COMP_STATE_READY_LOCKED = (HAL_COMP_STATE_READY | COMP_STATE_BITFIELD_LOCK),
90 HAL_COMP_STATE_BUSY = 0x02,
91 HAL_COMP_STATE_BUSY_LOCKED = (HAL_COMP_STATE_BUSY | COMP_STATE_BITFIELD_LOCK)
92}HAL_COMP_StateTypeDef;
93
97#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
98typedef struct __COMP_HandleTypeDef
99#else
100typedef struct
101#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
102{
103 COMP_TypeDef *Instance;
104 COMP_InitTypeDef Init;
105 HAL_LockTypeDef Lock;
106 __IO HAL_COMP_StateTypeDef State;
107 __IO uint32_t ErrorCode;
108#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
109 void (* TriggerCallback)(struct __COMP_HandleTypeDef *hcomp);
110 void (* MspInitCallback)(struct __COMP_HandleTypeDef *hcomp);
111 void (* MspDeInitCallback)(struct __COMP_HandleTypeDef *hcomp);
112#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
113
114} COMP_HandleTypeDef;
115
116#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
120typedef enum
121{
122 HAL_COMP_TRIGGER_CB_ID = 0x00U,
123 HAL_COMP_MSPINIT_CB_ID = 0x01U,
124 HAL_COMP_MSPDEINIT_CB_ID = 0x02U
125} HAL_COMP_CallbackIDTypeDef;
126
130typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp);
132#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
137/* Exported constants --------------------------------------------------------*/
147#define HAL_COMP_ERROR_NONE (0x00U)
148#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
149#define HAL_COMP_ERROR_INVALID_CALLBACK (0x01U)
150#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
159#define COMP_WINDOWMODE_DISABLE ((uint32_t)0x00000000)
160#define COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON (COMP_CFGRx_WINMODE)
170/* Note: For the characteritics of comparator power modes */
171/* (propagation delay and power consumption), */
172/* refer to device datasheet. */
173#define COMP_POWERMODE_HIGHSPEED ((uint32_t)0x00000000)
174#define COMP_POWERMODE_MEDIUMSPEED (COMP_CFGRx_PWRMODE_0)
175#define COMP_POWERMODE_ULTRALOWPOWER (COMP_CFGRx_PWRMODE)
184#define COMP_INPUT_PLUS_IO1 ((uint32_t)0x00000000)
185#define COMP_INPUT_PLUS_IO2 (COMP_CFGRx_INPSEL)
186#if defined (COMP_CFGRx_INP2SEL)
187#define COMP_INPUT_PLUS_DAC2_CH1 (COMP_CFGRx_INP2SEL)
188#endif
197#define COMP_INPUT_MINUS_1_4VREFINT ( COMP_CFGRx_SCALEN | COMP_CFGRx_BRGEN)
198#define COMP_INPUT_MINUS_1_2VREFINT ( COMP_CFGRx_INMSEL_0 | COMP_CFGRx_SCALEN | COMP_CFGRx_BRGEN)
199#define COMP_INPUT_MINUS_3_4VREFINT ( COMP_CFGRx_INMSEL_1 | COMP_CFGRx_SCALEN | COMP_CFGRx_BRGEN)
200#define COMP_INPUT_MINUS_VREFINT ( COMP_CFGRx_INMSEL_1 | COMP_CFGRx_INMSEL_0 | COMP_CFGRx_SCALEN )
201#define COMP_INPUT_MINUS_DAC1_CH1 ( COMP_CFGRx_INMSEL_2 )
202#define COMP_INPUT_MINUS_DAC1_CH2 ( COMP_CFGRx_INMSEL_2 | COMP_CFGRx_INMSEL_0 )
203#define COMP_INPUT_MINUS_IO1 ( COMP_CFGRx_INMSEL_2 | COMP_CFGRx_INMSEL_1 )
204#define COMP_INPUT_MINUS_IO2 ( COMP_CFGRx_INMSEL_2 | COMP_CFGRx_INMSEL_1 | COMP_CFGRx_INMSEL_0 )
205#if defined (COMP_CFGRx_INMSEL_3)
206#define COMP_INPUT_MINUS_TPSENS_DAC2CH1 (COMP_CFGRx_INMSEL_3 )
207#define COMP_INPUT_MINUS_VBAT_VDDAP (COMP_CFGRx_INMSEL_3 | COMP_CFGRx_INMSEL_0 )
208#endif
217#define COMP_HYSTERESIS_NONE ((uint32_t)0x00000000)
218#define COMP_HYSTERESIS_LOW (COMP_CFGRx_HYST_0)
219#define COMP_HYSTERESIS_MEDIUM (COMP_CFGRx_HYST_1)
220#define COMP_HYSTERESIS_HIGH (COMP_CFGRx_HYST)
229#define COMP_OUTPUTPOL_NONINVERTED ((uint32_t)0x00000000)
230#define COMP_OUTPUTPOL_INVERTED (COMP_CFGRx_POLARITY)
240/* Any blanking source can be selected for all comparators */
241#define COMP_BLANKINGSRC_NONE ((uint32_t)0x00000000)
242#define COMP_BLANKINGSRC_TIM1_OC5 (COMP_CFGRx_BLANKING_0)
243#define COMP_BLANKINGSRC_TIM2_OC3 (COMP_CFGRx_BLANKING_1)
244#define COMP_BLANKINGSRC_TIM3_OC3 (COMP_CFGRx_BLANKING_0 |COMP_CFGRx_BLANKING_1)
245#define COMP_BLANKINGSRC_TIM3_OC4 (COMP_CFGRx_BLANKING_2)
246#define COMP_BLANKINGSRC_TIM8_OC5 (COMP_CFGRx_BLANKING_2|COMP_CFGRx_BLANKING_0)
247#define COMP_BLANKINGSRC_TIM15_OC1 (COMP_CFGRx_BLANKING_2|COMP_CFGRx_BLANKING_1)
260/* Note: Comparator output level values are fixed to "0" and "1", */
261/* corresponding COMP register bit is managed by HAL function to match */
262/* with these values (independently of bit position in register). */
263
264/* When output polarity is not inverted, comparator output is low when
265 the input plus is at a lower voltage than the input minus */
266#define COMP_OUTPUT_LEVEL_LOW ((uint32_t)0x00000000)
267/* When output polarity is not inverted, comparator output is high when
268 the input plus is at a higher voltage than the input minus */
269#define COMP_OUTPUT_LEVEL_HIGH ((uint32_t)0x00000001)
270
279#define COMP_TRIGGERMODE_NONE ((uint32_t)0x00000000)
280#define COMP_TRIGGERMODE_IT_RISING (COMP_EXTI_IT | COMP_EXTI_RISING)
281#define COMP_TRIGGERMODE_IT_FALLING (COMP_EXTI_IT | COMP_EXTI_FALLING)
282#define COMP_TRIGGERMODE_IT_RISING_FALLING (COMP_EXTI_IT | COMP_EXTI_RISING | COMP_EXTI_FALLING)
283#define COMP_TRIGGERMODE_EVENT_RISING (COMP_EXTI_EVENT | COMP_EXTI_RISING)
284#define COMP_TRIGGERMODE_EVENT_FALLING (COMP_EXTI_EVENT | COMP_EXTI_FALLING)
285#define COMP_TRIGGERMODE_EVENT_RISING_FALLING (COMP_EXTI_EVENT | COMP_EXTI_RISING | COMP_EXTI_FALLING)
295#define COMP_FLAG_C1I COMP_SR_C1IF
296#define COMP_FLAG_C2I COMP_SR_C2IF
297#define COMP_FLAG_LOCK COMP_CFGRx_LOCK
305#define COMP_CLEAR_C1IF COMP_ICFR_C1IF
306#define COMP_CLEAR_C2IF COMP_ICFR_C2IF
314#define COMP_IT_EN COMP_CFGRx_ITEN
315
325/* Exported macros -----------------------------------------------------------*/
339#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
340#define __HAL_COMP_RESET_HANDLE_STATE(__HANDLE__) do{ \
341 (__HANDLE__)->State = HAL_COMP_STATE_RESET; \
342 (__HANDLE__)->MspInitCallback = NULL; \
343 (__HANDLE__)->MspDeInitCallback = NULL; \
344 } while(0)
345#else
346#define __HAL_COMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_COMP_STATE_RESET)
347#endif
348
354#define COMP_CLEAR_ERRORCODE(__HANDLE__) ((__HANDLE__)->ErrorCode = HAL_COMP_ERROR_NONE)
355
361#define __HAL_COMP_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CFGR, COMP_CFGRx_EN)
362
368#define __HAL_COMP_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, COMP_CFGRx_EN)
369
379#define __HAL_COMP_LOCK(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CFGR, COMP_CFGRx_LOCK)
380
386#define __HAL_COMP_IS_LOCKED(__HANDLE__) (READ_BIT((__HANDLE__)->Instance->CFGR, COMP_CFGRx_LOCK) == COMP_CFGRx_LOCK)
387
401#define __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, COMP_EXTI_LINE_COMP1)
402
403
408#define __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, COMP_EXTI_LINE_COMP1)
409
414#define __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, COMP_EXTI_LINE_COMP1)
415
420#define __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, COMP_EXTI_LINE_COMP1)
421
422
427#define __HAL_COMP_COMP1_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
428 __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE(); \
429 __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE(); \
430 } while(0)
431
432
437#define __HAL_COMP_COMP1_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
438 __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE(); \
439 __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE(); \
440 } while(0)
441
442
447#define __HAL_COMP_COMP1_EXTI_ENABLE_IT() SET_BIT(EXTI_D1->IMR1, COMP_EXTI_LINE_COMP1)
448
453#define __HAL_COMP_COMP1_EXTI_DISABLE_IT() CLEAR_BIT(EXTI_D1->IMR1, COMP_EXTI_LINE_COMP1)
454
459#define __HAL_COMP_COMP1_EXTI_ENABLE_EVENT() SET_BIT(EXTI_D1->EMR1, COMP_EXTI_LINE_COMP1)
460
465#define __HAL_COMP_COMP1_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI_D1->EMR1, COMP_EXTI_LINE_COMP1)
466
471#define __HAL_COMP_COMP1_EXTI_GET_FLAG() READ_BIT(EXTI_D1->PR1, COMP_EXTI_LINE_COMP1)
476#define __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() WRITE_REG(EXTI_D1->PR1, COMP_EXTI_LINE_COMP1)
477
482#define __HAL_COMP_COMP1_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, COMP_EXTI_LINE_COMP1)
483
488#define __HAL_COMP_COMP1_EXTID3_ENABLE_EVENT() SET_BIT(EXTI->D3PMR1, COMP_EXTI_LINE_COMP1)
489
494#define __HAL_COMP_COMP1_EXTID3_DISABLE_EVENT() CLEAR_BIT(EXTI->D3PMR1, COMP_EXTI_LINE_COMP1)
495
496#if defined(DUAL_CORE)
501#define __HAL_COMP_COMP1_EXTID2_ENABLE_IT() SET_BIT(EXTI_D2->IMR1, COMP_EXTI_LINE_COMP1)
502
507#define __HAL_COMP_COMP1_EXTID2_DISABLE_IT() CLEAR_BIT(EXTI_D2->IMR1, COMP_EXTI_LINE_COMP1)
508
513#define __HAL_COMP_COMP1_EXTID2_ENABLE_EVENT() SET_BIT(EXTI_D2->EMR1, COMP_EXTI_LINE_COMP1)
514
519#define __HAL_COMP_COMP1_EXTID2_DISABLE_EVENT() CLEAR_BIT(EXTI_D2->EMR1, COMP_EXTI_LINE_COMP1)
520
525#define __HAL_COMP_COMP1_EXTID2_GET_FLAG() READ_BIT(EXTI_D2->PR1, COMP_EXTI_LINE_COMP1)
526
531#define __HAL_COMP_COMP1_EXTID2_CLEAR_FLAG() WRITE_REG(EXTI_D2->PR1, COMP_EXTI_LINE_COMP1)
532
533#endif
534
539#define __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, COMP_EXTI_LINE_COMP2)
540
545#define __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, COMP_EXTI_LINE_COMP2)
546
551#define __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, COMP_EXTI_LINE_COMP2)
552
557#define __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, COMP_EXTI_LINE_COMP2)
558
563#define __HAL_COMP_COMP2_EXTI_ENABLE_RISING_FALLING_EDGE() do { \
564 __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE(); \
565 __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE(); \
566 } while(0)
567
572#define __HAL_COMP_COMP2_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
573 __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE(); \
574 __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE(); \
575 } while(0)
580#define __HAL_COMP_COMP2_EXTI_ENABLE_IT() SET_BIT(EXTI_D1->IMR1, COMP_EXTI_LINE_COMP2)
581
586#define __HAL_COMP_COMP2_EXTI_DISABLE_IT() CLEAR_BIT(EXTI_D1->IMR1, COMP_EXTI_LINE_COMP2)
587
592#define __HAL_COMP_COMP2_EXTI_ENABLE_EVENT() SET_BIT(EXTI_D1->EMR1, COMP_EXTI_LINE_COMP2)
593
598#define __HAL_COMP_COMP2_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI_D1->EMR1, COMP_EXTI_LINE_COMP2)
599
604#define __HAL_COMP_COMP2_EXTI_GET_FLAG() READ_BIT(EXTI_D1->PR1, COMP_EXTI_LINE_COMP2)
605
610#define __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() WRITE_REG(EXTI_D1->PR1, COMP_EXTI_LINE_COMP2)
611
616#define __HAL_COMP_COMP2_EXTID3_ENABLE_EVENT() SET_BIT(EXTI->D3PMR1, COMP_EXTI_LINE_COMP2)
617
622#define __HAL_COMP_COMP2_EXTID3_DISABLE_EVENT() CLEAR_BIT(EXTI->D3PMR1, COMP_EXTI_LINE_COMP2)
623
628#define __HAL_COMP_COMP2_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, COMP_EXTI_LINE_COMP2)
629
630#if defined(DUAL_CORE)
635#define __HAL_COMP_COMP2_EXTID2_ENABLE_IT() SET_BIT(EXTI_D2->IMR1, COMP_EXTI_LINE_COMP2)
636
637
642#define __HAL_COMP_COMP2_EXTID2_DISABLE_IT() CLEAR_BIT(EXTI_D2->IMR1, COMP_EXTI_LINE_COMP2)
643
644
645
650#define __HAL_COMP_COMP2_EXTID2_ENABLE_EVENT() SET_BIT(EXTI_D2->EMR1, COMP_EXTI_LINE_COMP2)
651
652
653
658#define __HAL_COMP_COMP2_EXTID2_DISABLE_EVENT() CLEAR_BIT(EXTI_D2->EMR1, COMP_EXTI_LINE_COMP2)
659
660
665#define __HAL_COMP_COMP2_EXTID2_GET_FLAG() READ_BIT(EXTI_D2->PR1, COMP_EXTI_LINE_COMP2)
666
671#define __HAL_COMP_COMP2_EXTID2_CLEAR_FLAG() WRITE_REG(EXTI_D2->PR1, COMP_EXTI_LINE_COMP2)
672
673#endif
683#define __HAL_COMP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CFGR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
684
692#define __HAL_COMP_GET_FLAG(__FLAG__) ((COMP12->SR & (__FLAG__)) == (__FLAG__))
693
701#define __HAL_COMP_CLEAR_FLAG(__FLAG__) (COMP12->ICFR = (__FLAG__))
702
706#define __HAL_COMP_CLEAR_C1IFLAG() __HAL_COMP_CLEAR_FLAG( COMP_CLEAR_C1IF)
707
711#define __HAL_COMP_CLEAR_C2IFLAG() __HAL_COMP_CLEAR_FLAG( COMP_CLEAR_C2IF)
712
720#define __HAL_COMP_ENABLE_IT(__HANDLE__, __INTERRUPT__) ( ((__HANDLE__)->Instance->CFGR) |= (__INTERRUPT__) )
721
729#define __HAL_COMP_DISABLE_IT(__HANDLE__,__INTERRUPT__) (((__HANDLE__)->Instance->CFGR) &= ~(__INTERRUPT__))
730
750#define __HAL_COMP_ENABLE_OR(__AF__) SET_BIT(COMP12->OR, (__AF__))
751
768#define __HAL_COMP_DISABLE_OR(__AF__) CLEAR_BIT(COMP12->OR, (__AF__))
773/* Private types -------------------------------------------------------------*/
774/* Private constants ---------------------------------------------------------*/
783#define COMP_EXTI_LINE_COMP1 (EXTI_IMR1_IM20)
784#define COMP_EXTI_LINE_COMP2 (EXTI_IMR1_IM21)
792#define COMP_EXTI_IT ((uint32_t) 0x01)
793#define COMP_EXTI_EVENT ((uint32_t) 0x02)
794#define COMP_EXTI_RISING ((uint32_t) 0x10)
795#define COMP_EXTI_FALLING ((uint32_t) 0x20)
803/* Private macros ------------------------------------------------------------*/
817#define COMP_GET_EXTI_LINE(__INSTANCE__) (((__INSTANCE__) == COMP1) ? COMP_EXTI_LINE_COMP1 : \
818 COMP_EXTI_LINE_COMP2)
826#define IS_COMP_WINDOWMODE(__WINDOWMODE__) (((__WINDOWMODE__) == COMP_WINDOWMODE_DISABLE) || \
827 ((__WINDOWMODE__) == COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON) )
828
829#define IS_COMP_POWERMODE(__POWERMODE__) (((__POWERMODE__) == COMP_POWERMODE_HIGHSPEED) || \
830 ((__POWERMODE__) == COMP_POWERMODE_MEDIUMSPEED) || \
831 ((__POWERMODE__) == COMP_POWERMODE_ULTRALOWPOWER) )
832
833#if defined (COMP_CFGRx_INP2SEL)
834#define IS_COMP_INPUT_PLUS(__COMP_INSTANCE__, __INPUT_PLUS__) (((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO1) || \
835 ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO2) || \
836 ((__INPUT_PLUS__) == COMP_INPUT_PLUS_DAC2_CH1))
837#else
838#define IS_COMP_INPUT_PLUS(__COMP_INSTANCE__, __INPUT_PLUS__) (((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO1) || \
839 ((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO2))
840#endif
841
842
843#if defined (COMP_CFGRx_INMSEL_3)
844#define IS_COMP_INPUT_MINUS(__COMP_INSTANCE__, __INPUT_MINUS__) (((__INPUT_MINUS__) == COMP_INPUT_MINUS_1_4VREFINT) || \
845 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_1_2VREFINT) || \
846 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_3_4VREFINT) || \
847 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_VREFINT) || \
848 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC1_CH1) || \
849 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC1_CH2) || \
850 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_IO1) || \
851 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_IO2) || \
852 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_TPSENS_DAC2CH1) || \
853 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_VBAT_VDDAP))
854#else
855#define IS_COMP_INPUT_MINUS(__COMP_INSTANCE__, __INPUT_MINUS__) (((__INPUT_MINUS__) == COMP_INPUT_MINUS_1_4VREFINT) || \
856 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_1_2VREFINT) || \
857 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_3_4VREFINT) || \
858 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_VREFINT) || \
859 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC1_CH1) || \
860 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC1_CH2) || \
861 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_IO1) || \
862 ((__INPUT_MINUS__) == COMP_INPUT_MINUS_IO2))
863#endif
864
865#define IS_COMP_HYSTERESIS(__HYSTERESIS__) (((__HYSTERESIS__) == COMP_HYSTERESIS_NONE) || \
866 ((__HYSTERESIS__) == COMP_HYSTERESIS_LOW) || \
867 ((__HYSTERESIS__) == COMP_HYSTERESIS_MEDIUM) || \
868 ((__HYSTERESIS__) == COMP_HYSTERESIS_HIGH))
869
870#define IS_COMP_OUTPUTPOL(__POL__) (((__POL__) == COMP_OUTPUTPOL_NONINVERTED) || \
871 ((__POL__) == COMP_OUTPUTPOL_INVERTED))
872
873#define IS_COMP_BLANKINGSRCE(__SOURCE__) (((__SOURCE__) == COMP_BLANKINGSRC_NONE) || \
874 ((__SOURCE__) == COMP_BLANKINGSRC_TIM1_OC5) || \
875 ((__SOURCE__) == COMP_BLANKINGSRC_TIM2_OC3) || \
876 ((__SOURCE__) == COMP_BLANKINGSRC_TIM3_OC3) || \
877 ((__SOURCE__) == COMP_BLANKINGSRC_TIM3_OC4) || \
878 ((__SOURCE__) == COMP_BLANKINGSRC_TIM8_OC5) || \
879 ((__SOURCE__) == COMP_BLANKINGSRC_TIM15_OC1))
880
881
882#define IS_COMP_TRIGGERMODE(__MODE__) (((__MODE__) == COMP_TRIGGERMODE_NONE) || \
883 ((__MODE__) == COMP_TRIGGERMODE_IT_RISING) || \
884 ((__MODE__) == COMP_TRIGGERMODE_IT_FALLING) || \
885 ((__MODE__) == COMP_TRIGGERMODE_IT_RISING_FALLING) || \
886 ((__MODE__) == COMP_TRIGGERMODE_EVENT_RISING) || \
887 ((__MODE__) == COMP_TRIGGERMODE_EVENT_FALLING) || \
888 ((__MODE__) == COMP_TRIGGERMODE_EVENT_RISING_FALLING))
889
890#define IS_COMP_OUTPUT_LEVEL(__OUTPUT_LEVEL__) (((__OUTPUT_LEVEL__) == COMP_OUTPUT_LEVEL_LOW) || \
891 ((__OUTPUT_LEVEL__) == COMP_OUTPUT_LEVEL_HIGH))
892
901/* Exported functions --------------------------------------------------------*/
909/* Initialization and de-initialization functions **********************************/
910HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp);
911HAL_StatusTypeDef HAL_COMP_DeInit (COMP_HandleTypeDef *hcomp);
912void HAL_COMP_MspInit(COMP_HandleTypeDef *hcomp);
913void HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp);
914#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
915/* Callbacks Register/UnRegister functions ***********************************/
916HAL_StatusTypeDef HAL_COMP_RegisterCallback(COMP_HandleTypeDef *hcomp, HAL_COMP_CallbackIDTypeDef CallbackID, pCOMP_CallbackTypeDef pCallback);
917HAL_StatusTypeDef HAL_COMP_UnRegisterCallback(COMP_HandleTypeDef *hcomp, HAL_COMP_CallbackIDTypeDef CallbackID);
918#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
923/* IO operation functions *****************************************************/
927HAL_StatusTypeDef HAL_COMP_Start(COMP_HandleTypeDef *hcomp);
928HAL_StatusTypeDef HAL_COMP_Stop(COMP_HandleTypeDef *hcomp);
929HAL_StatusTypeDef HAL_COMP_Start_IT(COMP_HandleTypeDef *hcomp);
930HAL_StatusTypeDef HAL_COMP_Stop_IT(COMP_HandleTypeDef *hcomp);
931void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp);
932
937/* Peripheral Control functions ************************************************/
941HAL_StatusTypeDef HAL_COMP_Lock(COMP_HandleTypeDef *hcomp);
942uint32_t HAL_COMP_GetOutputLevel(COMP_HandleTypeDef *hcomp);
943/* Callback in Interrupt mode */
944void HAL_COMP_TriggerCallback(COMP_HandleTypeDef *hcomp);
949/* Peripheral State functions **************************************************/
953HAL_COMP_StateTypeDef HAL_COMP_GetState(COMP_HandleTypeDef *hcomp);
954uint32_t HAL_COMP_GetError(COMP_HandleTypeDef *hcomp);
971#ifdef __cplusplus
972}
973#endif
974
975#endif /* STM32H7xx_HAL_COMP_H */
976
977
__IO
#define __IO
Definition: core_cm4.h:239
HAL_COMP_StateTypeDef
HAL_COMP_StateTypeDef
Definition: stm32h7xx_hal_comp.h:85
COMP_STATE_BITFIELD_LOCK
#define COMP_STATE_BITFIELD_LOCK
HAL COMP state machine: HAL COMP states definition.
Definition: stm32h7xx_hal_comp.h:83
HAL_COMP_STATE_BUSY
@ HAL_COMP_STATE_BUSY
Definition: stm32h7xx_hal_comp.h:90
HAL_COMP_STATE_READY_LOCKED
@ HAL_COMP_STATE_READY_LOCKED
Definition: stm32h7xx_hal_comp.h:89
HAL_COMP_STATE_BUSY_LOCKED
@ HAL_COMP_STATE_BUSY_LOCKED
Definition: stm32h7xx_hal_comp.h:91
HAL_COMP_STATE_RESET_LOCKED
@ HAL_COMP_STATE_RESET_LOCKED
Definition: stm32h7xx_hal_comp.h:87
HAL_COMP_STATE_RESET
@ HAL_COMP_STATE_RESET
Definition: stm32h7xx_hal_comp.h:86
HAL_COMP_STATE_READY
@ HAL_COMP_STATE_READY
Definition: stm32h7xx_hal_comp.h:88
stm32h7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32h7xx_hal_def.h:47
HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32h7xx_hal_def.h:58
COMP_HandleTypeDef
COMP Handle Structure definition.
Definition: stm32h7xx_hal_comp.h:102
COMP_HandleTypeDef::Lock
HAL_LockTypeDef Lock
Definition: stm32h7xx_hal_comp.h:105
COMP_HandleTypeDef::State
__IO HAL_COMP_StateTypeDef State
Definition: stm32h7xx_hal_comp.h:106
COMP_HandleTypeDef::ErrorCode
__IO uint32_t ErrorCode
Definition: stm32h7xx_hal_comp.h:107
COMP_HandleTypeDef::Instance
COMP_TypeDef * Instance
Definition: stm32h7xx_hal_comp.h:103
COMP_HandleTypeDef::Init
COMP_InitTypeDef Init
Definition: stm32h7xx_hal_comp.h:104
COMP_InitTypeDef
COMP Init structure definition
Definition: stm32h7xx_hal_comp.h:48
COMP_InitTypeDef::WindowMode
uint32_t WindowMode
Definition: stm32h7xx_hal_comp.h:50
COMP_InitTypeDef::InvertingInput
uint32_t InvertingInput
Definition: stm32h7xx_hal_comp.h:63
COMP_InitTypeDef::BlankingSrce
uint32_t BlankingSrce
Definition: stm32h7xx_hal_comp.h:72
COMP_InitTypeDef::Hysteresis
uint32_t Hysteresis
Definition: stm32h7xx_hal_comp.h:66
COMP_InitTypeDef::NonInvertingInput
uint32_t NonInvertingInput
Definition: stm32h7xx_hal_comp.h:60
COMP_InitTypeDef::OutputPol
uint32_t OutputPol
Definition: stm32h7xx_hal_comp.h:69
COMP_InitTypeDef::TriggerMode
uint32_t TriggerMode
Definition: stm32h7xx_hal_comp.h:75
COMP_InitTypeDef::Mode
uint32_t Mode
Definition: stm32h7xx_hal_comp.h:55
COMP_TypeDef
Definition: stm32h723xx.h:1583
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