RTEMS 6.1-rc5
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This file contains the common defines and functions prototypes for the stm32h747i_eval_qspi.c driver. More...
#include "stm32h747i_eval_conf.h"
#include "stm32h747i_eval_errno.h"
#include "../Components/mt25tl01g/mt25tl01g.h"
Go to the source code of this file.
Data Structures | |
struct | BSP_QSPI_Ctx_t |
struct | BSP_QSPI_Init_t |
struct | MX_QSPI_Init_t |
Macros | |
#define | BSP_QSPI_Info_t MT25TL01G_Info_t |
#define | BSP_QSPI_Interface_t MT25TL01G_Interface_t |
#define | BSP_QSPI_Transfer_t MT25TL01G_Transfer_t |
#define | BSP_QSPI_DualFlash_t MT25TL01G_DualFlash_t |
#define | BSP_QSPI_ODS_t MT25TL01G_ODS_t |
#define | QSPI_INSTANCES_NUMBER 1U |
#define | BSP_QSPI_SPI_MODE (BSP_QSPI_Interface_t)MT25TL01G_SPI_MODE /* 1 Cmd Line, 1 Address Line and 1 Data Line */ |
#define | BSP_QSPI_SPI_1I2O_MODE (BSP_QSPI_Interface_t)MT25TL01G_SPI_1I2O_MODE /* 1 Cmd Line, 1 Address Line and 2 Data Lines */ |
#define | BSP_QSPI_SPI_2IO_MODE (BSP_QSPI_Interface_t)MT25TL01G_SPI_2IO_MODE /* 1 Cmd Line, 2 Address Lines and 2 Data Lines */ |
#define | BSP_QSPI_SPI_1I4O_MODE (BSP_QSPI_Interface_t)MT25TL01G_SPI_1I4O_MODE /* 1 Cmd Line, 1 Address Line and 4 Data Lines */ |
#define | BSP_QSPI_SPI_4IO_MODE (BSP_QSPI_Interface_t)MT25TL01G_SPI_4IO_MODE /* 1 Cmd Line, 4 Address Lines and 4 Data Lines */ |
#define | BSP_QSPI_DPI_MODE (BSP_QSPI_Interface_t)MT25TL01G_DPI_MODE /* 2 Cmd Lines, 2 Address Lines and 2 Data Lines */ |
#define | BSP_QSPI_QPI_MODE (BSP_QSPI_Interface_t)MT25TL01G_QPI_MODE /* 4 Cmd Lines, 4 Address Lines and 4 Data Lines */ |
#define | BSP_QSPI_STR_TRANSFER (BSP_QSPI_Transfer_t)MT25TL01G_STR_TRANSFER /* Single Transfer Rate */ |
#define | BSP_QSPI_DTR_TRANSFER (BSP_QSPI_Transfer_t)MT25TL01G_DTR_TRANSFER /* Double Transfer Rate */ |
#define | BSP_QSPI_DUALFLASH_DISABLE (BSP_QSPI_DualFlash_t)MT25TL01G_DUALFLASH_DISABLE /* Dual flash mode enabled */ |
#define | BSP_QSPI_FLASH_ID QSPI_FLASH_ID_1 |
#define | BSP_QSPI_BLOCK_8K MT25TL01G_SECTOR_4K |
#define | BSP_QSPI_BLOCK_64K MT25TL01G_BLOCK_32K |
#define | BSP_QSPI_BLOCK_128K MT25TL01G_BLOCK_64K |
#define | QSPI_CLK_ENABLE() __HAL_RCC_QSPI_CLK_ENABLE() |
#define | QSPI_CLK_DISABLE() __HAL_RCC_QSPI_CLK_DISABLE() |
#define | QSPI_CLK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() |
#define | QSPI_BK1_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE() |
#define | QSPI_BK1_D0_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE() |
#define | QSPI_BK1_D1_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE() |
#define | QSPI_BK1_D2_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE() |
#define | QSPI_BK1_D3_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE() |
#define | QSPI_BK2_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE() |
#define | QSPI_BK2_D0_GPIO_CLK_ENABLE() __HAL_RCC_GPIOH_CLK_ENABLE() |
#define | QSPI_BK2_D1_GPIO_CLK_ENABLE() __HAL_RCC_GPIOH_CLK_ENABLE() |
#define | QSPI_BK2_D2_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE() |
#define | QSPI_BK2_D3_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE() |
#define | QSPI_FORCE_RESET() __HAL_RCC_QSPI_FORCE_RESET() |
#define | QSPI_RELEASE_RESET() __HAL_RCC_QSPI_RELEASE_RESET() |
#define | QSPI_CLK_PIN GPIO_PIN_2 |
#define | QSPI_CLK_GPIO_PORT GPIOB |
#define | QSPI_BK1_CS_PIN GPIO_PIN_6 |
#define | QSPI_BK1_CS_GPIO_PORT GPIOG |
#define | QSPI_BK1_D0_PIN GPIO_PIN_8 |
#define | QSPI_BK1_D0_GPIO_PORT GPIOF |
#define | QSPI_BK1_D1_PIN GPIO_PIN_9 |
#define | QSPI_BK1_D1_GPIO_PORT GPIOF |
#define | QSPI_BK1_D2_PIN GPIO_PIN_7 |
#define | QSPI_BK1_D2_GPIO_PORT GPIOF |
#define | QSPI_BK1_D3_PIN GPIO_PIN_6 |
#define | QSPI_BK1_D3_GPIO_PORT GPIOF |
#define | QSPI_BK2_CS_PIN GPIO_PIN_11 |
#define | QSPI_BK2_CS_GPIO_PORT GPIOC |
#define | QSPI_BK2_D0_PIN GPIO_PIN_2 |
#define | QSPI_BK2_D0_GPIO_PORT GPIOH |
#define | QSPI_BK2_D1_PIN GPIO_PIN_3 |
#define | QSPI_BK2_D1_GPIO_PORT GPIOH |
#define | QSPI_BK2_D2_PIN GPIO_PIN_9 |
#define | QSPI_BK2_D2_GPIO_PORT GPIOG |
#define | QSPI_BK2_D3_PIN GPIO_PIN_14 |
#define | QSPI_BK2_D3_GPIO_PORT GPIOG |
#define | QSPI_FLASH_SIZE 26 /* Address bus width to access whole memory space */ |
#define | QSPI_PAGE_SIZE 256 |
#define | QSPI_BASE_ADDRESS 0x90000000 |
Enumerations | |
enum | BSP_QSPI_Erase_t { BSP_QSPI_ERASE_8K = MT25TL01G_ERASE_4K , BSP_QSPI_ERASE_64K = MT25TL01G_ERASE_32K , BSP_QSPI_ERASE_128K = MT25TL01G_ERASE_64K , BSP_QSPI_ERASE_CHIP = MT25TL01G_ERASE_CHIP } |
enum | BSP_QSPI_Access_t { QSPI_ACCESS_NONE = 0 , QSPI_ACCESS_INDIRECT , QSPI_ACCESS_MMP } |
Functions | |
int32_t | BSP_QSPI_Init (uint32_t Instance, BSP_QSPI_Init_t *Init) |
Initializes the QSPI interface. | |
int32_t | BSP_QSPI_DeInit (uint32_t Instance) |
De-Initializes the QSPI interface. | |
int32_t | BSP_QSPI_Read (uint32_t Instance, uint8_t *pData, uint32_t ReadAddr, uint32_t Size) |
Reads an amount of data from the QSPI memory. | |
int32_t | BSP_QSPI_Write (uint32_t Instance, uint8_t *pData, uint32_t WriteAddr, uint32_t Size) |
Writes an amount of data to the QSPI memory. | |
int32_t | BSP_QSPI_EraseBlock (uint32_t Instance, uint32_t BlockAddress, BSP_QSPI_Erase_t BlockSize) |
Erases the specified block of the QSPI memory. MT25TL01G support 4K, 32K, 64K size block erase commands for each Die. i.e 8K, 64K, 128K at BSP level (see BSP_QSPI_Erase_t type definition) | |
int32_t | BSP_QSPI_EraseChip (uint32_t Instance) |
Erases the entire QSPI memory. | |
int32_t | BSP_QSPI_GetStatus (uint32_t Instance) |
Reads current status of the QSPI memory. If WIP != 0 then return busy. | |
int32_t | BSP_QSPI_GetInfo (uint32_t Instance, BSP_QSPI_Info_t *pInfo) |
Return the configuration of the QSPI memory. | |
int32_t | BSP_QSPI_EnableMemoryMappedMode (uint32_t Instance) |
Configure the QSPI in memory-mapped mode Only 1 Instance can running MMP mode. And it will lock system at this mode. | |
int32_t | BSP_QSPI_DisableMemoryMappedMode (uint32_t Instance) |
Exit form memory-mapped mode Only 1 Instance can running MMP mode. And it will lock system at this mode. | |
int32_t | BSP_QSPI_ReadID (uint32_t Instance, uint8_t *Id) |
Get flash ID, 3 Byte Manufacturer ID, Memory type, Memory density. | |
int32_t | BSP_QSPI_ConfigFlash (uint32_t Instance, BSP_QSPI_Interface_t Mode, BSP_QSPI_Transfer_t Rate) |
Set Flash to desired Interface mode. And this instance becomes current instance. If current instance running at MMP mode then this function isn't work. Indirect -> Indirect. | |
__weak HAL_StatusTypeDef | MX_QSPI_Init (QSPI_HandleTypeDef *hQspi, MX_QSPI_Init_t *Config) |
Initializes the QSPI interface. | |
Variables | |
QSPI_HandleTypeDef | hqspi |
BSP_QSPI_Ctx_t | QSPI_Ctx [] |
This file contains the common defines and functions prototypes for the stm32h747i_eval_qspi.c driver.
Copyright (c) 2019 STMicroelectronics. All rights reserved.
This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS.