RTEMS 6.1-rc5
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mcf548x.h
1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/*
4 * RTEMS generic mcf548x BSP
5 *
6 * The file contains all register an bit definitions of the
7 * generic MCF548x BSP.
8 *
9 * Parts of the code has been derived from the "dBUG source code"
10 * package Freescale is providing for M548X EVBs. The usage of
11 * the modified or unmodified code and it's integration into the
12 * generic mcf548x BSP has been done according to the Freescale
13 * license terms.
14 *
15 * The Freescale license terms can be reviewed in the file
16 *
17 * LICENSE.Freescale
18 *
19 * The generic mcf548x BSP has been developed on the basic
20 * structures and modules of the av5282 BSP.
21 */
22
23/*
24 * Copyright (c) 2007 embedded brains GmbH & Co. KG
25 *
26 * Redistribution and use in source and binary forms, with or without
27 * modification, are permitted provided that the following conditions
28 * are met:
29 * 1. Redistributions of source code must retain the above copyright
30 * notice, this list of conditions and the following disclaimer.
31 * 2. Redistributions in binary form must reproduce the above copyright
32 * notice, this list of conditions and the following disclaimer in the
33 * documentation and/or other materials provided with the distribution.
34 *
35 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
36 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
37 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
38 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
39 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
40 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
41 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
42 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
43 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
44 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
45 * POSSIBILITY OF SUCH DAMAGE.
46 */
47
48#ifndef __MCF548X_H__
49#define __MCF548X_H__
50
51#include <stdint.h>
52
53/*********************************************************************/
54extern char __MBAR[];
55
56/*********************************************************************
57*
58* Cache Control Register (CACR)
59*
60*********************************************************************/
61
62/* Bit definitions and macros for MCF548X_CACR */
63#define MCF548X_CACR_DEC (0x80000000)
64#define MCF548X_CACR_DW (0x40000000)
65#define MCF548X_CACR_DESB (0x20000000)
66#define MCF548X_CACR_DDPI (0x10000000)
67#define MCF548X_CACR_DHLCK (0x08000000)
68#define MCF548X_CACR_DDCM(x) (((x)<<25)&0x06000000)
69#define MCF548X_CACR_DCINVA (0x01000000)
70#define MCF548X_CACR_DDSP (0x00800000)
71#define MCF548X_CACR_BEC (0x00080000)
72#define MCF548X_CACR_BCINVA (0x00040000)
73#define MCF548X_CACR_IEC (0x00008000)
74#define MCF548X_CACR_DNFB (0x00002000)
75#define MCF548X_CACR_IDPI (0x00001000)
76#define MCF548X_CACR_IHLCK (0x00000800)
77#define MCF548X_CACR_IDCM (0x00000400)
78#define MCF548X_CACR_ICINVA (0x00000100)
79#define MCF548X_CACR_IDSP (0x00000080)
80#define MCF548X_CACR_EUSP (0x00000020)
81#define MCF548X_CACR_DF (0x00000010)
82
83/* Bit definitions and macros for MCF548X_CACR_DDCM (data cache mode) */
84#define DCACHE_ON_WRIGHTTHROUGH 0
85#define DCACHE_ON_COPYBACK 1
86#define DCACHE_OFF_PRECISE 2
87#define DCACHE_OFF_IMPRECISE 3
88
89/*********************************************************************
90*
91* Access Control Registers (ACR0-3)
92*
93*********************************************************************/
94
95/* Bit definitions and macros for MCF548X_ACRn */
96#define MCF548X_ACR_BA(x) ((x)&0xFF000000)
97#define MCF548X_ACR_ADMSK_AMM(x) (((x)>=0x1000000) ? (((x)&0xFF000000)>>8) : (((x)&0x00FF0000)|0x00000400))
98#define MCF548X_ACR_E (0x00008000)
99#define MCF548X_ACR_S(x) (((x)<<13)&0x00006000)
100#define MCF548X_ACR_CM(x) (((x)<<5)&0x00000060)
101#define MCF548X_ACR_SP (0x00000008)
102#define MCF548X_ACR_W (0x00000004)
103
104/* Bit definitions and macros for MCF548X_ACR_S (supervisor/user access) */
105#define S_ACCESS_USER 0
106#define S_ACCESS_SUPV 1
107#define S_ACCESS_BOTH 2
108
109/* Bit definitions and macros for MCF548X_ACR_CM (cache mode) */
110#define CM_ON_WRIGHTTHROUGH 0
111#define CM_ON_COPYBACK 1
112#define CM_OFF_PRECISE 2
113#define CM_OFF_IMPRECISE 3
114
115/*********************************************************************
116*
117* System PLL Control Register (SPCR)
118*
119*********************************************************************/
120
121/* Register read/write macro */
122#define MCF548X_PLL_SPCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000300)))
123
124/* Bit definitions and macros for MCF548X_PLL_SPCR (supervisor/user access) */
125#define MCF548X_PLL_SPCR_PLLK 0x80000000
126#define MCF548X_PLL_SPCR_COREN 0x00004000
127#define MCF548X_PLL_SPCR_CRYENB 0x00002000
128#define MCF548X_PLL_SPCR_CRYENA 0x00001000
129#define MCF548X_PLL_SPCR_CAN1EN 0x00000800
130#define MCF548X_PLL_SPCR_PSCEN 0x00000200
131#define MCF548X_PLL_SPCR_USBEN 0x00000080
132#define MCF548X_PLL_SPCR_FEC1EN 0x00000040
133#define MCF548X_PLL_SPCR_FEC0EN 0x00000020
134#define MCF548X_PLL_SPCR_DMAEN 0x00000010
135#define MCF548X_PLL_SPCR_CAN0EN 0x00000008
136#define MCF548X_PLL_SPCR_FBEN 0x00000004
137#define MCF548X_PLL_SPCR_PCIEN 0x00000002
138#define MCF548X_PLL_SPCR_MEMEN 0x00000001
139
140/*********************************************************************
141*
142* XLB Arbiter Control (XLB)
143*
144*********************************************************************/
145
146/* Register read/write macros */
147#define MCF548X_XLB_CFG (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000240)))
148#define MCF548X_XLB_ADRTO (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000258)))
149#define MCF548X_XLB_DATTO (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00025C)))
150#define MCF548X_XLB_BUSTO (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000260)))
151
152/*********************************************************************
153*
154* Fast Ethernet Controller (FEC)
155*
156*********************************************************************/
157
158/* Register read/write macros */
159#define MCF548X_FEC_EIR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009004)))
160#define MCF548X_FEC_EIMR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009008)))
161#define MCF548X_FEC_ECR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009024)))
162#define MCF548X_FEC_MMFR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009040)))
163#define MCF548X_FEC_MSCR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009044)))
164#define MCF548X_FEC_MIBC0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009064)))
165#define MCF548X_FEC_RCR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009084)))
166#define MCF548X_FEC_R_HASH0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009088)))
167#define MCF548X_FEC_TCR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0090C4)))
168#define MCF548X_FEC_PALR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0090E4)))
169#define MCF548X_FEC_PAUR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0090E8)))
170#define MCF548X_FEC_OPD0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0090EC)))
171#define MCF548X_FEC_IAUR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009118)))
172#define MCF548X_FEC_IALR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00911C)))
173#define MCF548X_FEC_GAUR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009120)))
174#define MCF548X_FEC_GALR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009124)))
175#define MCF548X_FEC_FECTFWR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009144)))
176#define MCF548X_FEC_FECRFDR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009184)))
177#define MCF548X_FEC_FECRFSR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009188)))
178#define MCF548X_FEC_FECRFCR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00918C)))
179#define MCF548X_FEC_FECRLRFP0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009190)))
180#define MCF548X_FEC_FECRLWFP0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009194)))
181#define MCF548X_FEC_FECRFAR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009198)))
182#define MCF548X_FEC_FECRFRP0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00919C)))
183#define MCF548X_FEC_FECRFWP0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091A0)))
184#define MCF548X_FEC_FECTFDR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091A4)))
185#define MCF548X_FEC_FECTFSR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091A8)))
186#define MCF548X_FEC_FECTFCR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091AC)))
187#define MCF548X_FEC_FECTLRFP0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091B0)))
188#define MCF548X_FEC_FECTLWFP0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091B4)))
189#define MCF548X_FEC_FECTFAR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091B8)))
190#define MCF548X_FEC_FECTFRP0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091BC)))
191#define MCF548X_FEC_FECTFWP0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091C0)))
192#define MCF548X_FEC_FRST0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091C4)))
193#define MCF548X_FEC_CTCWR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091C8)))
194#define MCF548X_FEC_RMON_T_DROP0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009200)))
195#define MCF548X_FEC_RMON_T_PACKETS0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009204)))
196#define MCF548X_FEC_RMON_T_BC_PKT0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009208)))
197#define MCF548X_FEC_RMON_T_MC_PKT0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00920C)))
198#define MCF548X_FEC_RMON_T_CRC_ALIGN0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009210)))
199#define MCF548X_FEC_RMON_T_UNDERSIZE0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009214)))
200#define MCF548X_FEC_RMON_T_OVERSIZE0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009218)))
201#define MCF548X_FEC_RMON_T_FRAG0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00921C)))
202#define MCF548X_FEC_RMON_T_JAB0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009220)))
203#define MCF548X_FEC_RMON_T_COL0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009224)))
204#define MCF548X_FEC_RMON_T_P640 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009228)))
205#define MCF548X_FEC_RMON_T_P65TO1270 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00922C)))
206#define MCF548X_FEC_RMON_T_P128TO2550 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009230)))
207#define MCF548X_FEC_RMON_T_P256TO5110 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009234)))
208#define MCF548X_FEC_RMON_T_P512TO10230 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009238)))
209#define MCF548X_FEC_RMON_T_P1024TO20470 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00923C)))
210#define MCF548X_FEC_RMON_T_P_GTE20480 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009240)))
211#define MCF548X_FEC_RMON_T_OCTETS0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009244)))
212#define MCF548X_FEC_IEEE_T_DROP0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009248)))
213#define MCF548X_FEC_IEEE_T_FRAME_OK0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00924C)))
214#define MCF548X_FEC_IEEE_T_1COL0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009250)))
215#define MCF548X_FEC_IEEE_T_MCOL0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009254)))
216#define MCF548X_FEC_IEEE_T_DEF0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009258)))
217#define MCF548X_FEC_IEEE_T_LCOL0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00925C)))
218#define MCF548X_FEC_IEEE_T_EXCOL0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009260)))
219#define MCF548X_FEC_IEEE_T_MACERR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009264)))
220#define MCF548X_FEC_IEEE_T_CSERR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009268)))
221#define MCF548X_FEC_IEEE_T_SQE0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00926C)))
222#define MCF548X_FEC_IEEE_T_FDXFC0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009270)))
223#define MCF548X_FEC_IEEE_T_OCTETS_OK0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009274)))
224#define MCF548X_FEC_RMON_R_PACKETS0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009284)))
225#define MCF548X_FEC_RMON_R_BC_PKT0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009288)))
226#define MCF548X_FEC_RMON_R_MC_PKT0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00928C)))
227#define MCF548X_FEC_RMON_R_CRC_ALIGN0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009290)))
228#define MCF548X_FEC_RMON_R_UNDERSIZE0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009294)))
229#define MCF548X_FEC_RMON_R_OVERSIZE0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009298)))
230#define MCF548X_FEC_RMON_R_FRAG0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00929C)))
231#define MCF548X_FEC_RMON_R_JAB0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092A0)))
232#define MCF548X_FEC_RMON_R_RESVD_00 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092A4)))
233#define MCF548X_FEC_RMON_R_P640 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092A8)))
234#define MCF548X_FEC_RMON_R_P65TO1270 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092AC)))
235#define MCF548X_FEC_RMON_R_P128TO2550 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092B0)))
236#define MCF548X_FEC_RMON_R_P256TO5110 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092B4)))
237#define MCF548X_FEC_RMON_R_512TO10230 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092B8)))
238#define MCF548X_FEC_RMON_R_1024TO20470 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092BC)))
239#define MCF548X_FEC_RMON_R_P_GTE20480 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092C0)))
240#define MCF548X_FEC_RMON_R_OCTETS0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092C4)))
241#define MCF548X_FEC_IEEE_R_DROP0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092C8)))
242#define MCF548X_FEC_IEEE_R_FRAME_OK0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092CC)))
243#define MCF548X_FEC_IEEE_R_CRC0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092D0)))
244#define MCF548X_FEC_IEEE_R_ALIGN0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092D4)))
245#define MCF548X_FEC_IEEE_R_MACERR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092D8)))
246#define MCF548X_FEC_IEEE_R_FDXFC0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092DC)))
247#define MCF548X_FEC_IEEE_R_OCTETS_OK0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092E0)))
248#define MCF548X_FEC_EIR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009804)))
249#define MCF548X_FEC_EIMR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009808)))
250#define MCF548X_FEC_ECR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009824)))
251#define MCF548X_FEC_MMFR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009840)))
252#define MCF548X_FEC_MSCR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009844)))
253#define MCF548X_FEC_MIBC1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009864)))
254#define MCF548X_FEC_RCR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009884)))
255#define MCF548X_FEC_R_HASH1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009888)))
256#define MCF548X_FEC_TCR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0098C4)))
257#define MCF548X_FEC_PALR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0098E4)))
258#define MCF548X_FEC_PAUR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0098E8)))
259#define MCF548X_FEC_OPD1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0098EC)))
260#define MCF548X_FEC_IAUR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009918)))
261#define MCF548X_FEC_IALR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00991C)))
262#define MCF548X_FEC_GAUR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009920)))
263#define MCF548X_FEC_GALR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009924)))
264#define MCF548X_FEC_FECTFWR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009944)))
265#define MCF548X_FEC_FECRFDR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009984)))
266#define MCF548X_FEC_FECRFSR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009988)))
267#define MCF548X_FEC_FECRFCR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00998C)))
268#define MCF548X_FEC_FECRLRFP1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009990)))
269#define MCF548X_FEC_FECRLWFP1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009994)))
270#define MCF548X_FEC_FECRFAR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009998)))
271#define MCF548X_FEC_FECRFRP1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00999C)))
272#define MCF548X_FEC_FECRFWP1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0099A0)))
273#define MCF548X_FEC_FECTFDR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0099A4)))
274#define MCF548X_FEC_FECTFSR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0099A8)))
275#define MCF548X_FEC_FECTFCR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0099AC)))
276#define MCF548X_FEC_FECTLRFP1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0099B0)))
277#define MCF548X_FEC_FECTLWFP1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0099B4)))
278#define MCF548X_FEC_FECTFAR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0099B8)))
279#define MCF548X_FEC_FECTFRP1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0099BC)))
280#define MCF548X_FEC_FECTFWP1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0099C0)))
281#define MCF548X_FEC_FRST1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0099C4)))
282#define MCF548X_FEC_CTCWR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0099C8)))
283#define MCF548X_FEC_RMON_T_DROP1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A00)))
284#define MCF548X_FEC_RMON_T_PACKETS1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A04)))
285#define MCF548X_FEC_RMON_T_BC_PKT1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A08)))
286#define MCF548X_FEC_RMON_T_MC_PKT1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A0C)))
287#define MCF548X_FEC_RMON_T_CRC_ALIGN1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A10)))
288#define MCF548X_FEC_RMON_T_UNDERSIZE1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A14)))
289#define MCF548X_FEC_RMON_T_OVERSIZE1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A18)))
290#define MCF548X_FEC_RMON_T_FRAG1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A1C)))
291#define MCF548X_FEC_RMON_T_JAB1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A20)))
292#define MCF548X_FEC_RMON_T_COL1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A24)))
293#define MCF548X_FEC_RMON_T_P641 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A28)))
294#define MCF548X_FEC_RMON_T_P65TO1271 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A2C)))
295#define MCF548X_FEC_RMON_T_P128TO2551 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A30)))
296#define MCF548X_FEC_RMON_T_P256TO5111 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A34)))
297#define MCF548X_FEC_RMON_T_P512TO10231 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A38)))
298#define MCF548X_FEC_RMON_T_P1024TO20471 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A3C)))
299#define MCF548X_FEC_RMON_T_P_GTE20481 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A40)))
300#define MCF548X_FEC_RMON_T_OCTETS1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A44)))
301#define MCF548X_FEC_IEEE_T_DROP1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A48)))
302#define MCF548X_FEC_IEEE_T_FRAME_OK1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A4C)))
303#define MCF548X_FEC_IEEE_T_1COL1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A50)))
304#define MCF548X_FEC_IEEE_T_MCOL1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A54)))
305#define MCF548X_FEC_IEEE_T_DEF1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A58)))
306#define MCF548X_FEC_IEEE_T_LCOL1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A5C)))
307#define MCF548X_FEC_IEEE_T_EXCOL1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A60)))
308#define MCF548X_FEC_IEEE_T_MACERR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A64)))
309#define MCF548X_FEC_IEEE_T_CSERR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A68)))
310#define MCF548X_FEC_IEEE_T_SQE1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A6C)))
311#define MCF548X_FEC_IEEE_T_FDXFC1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A70)))
312#define MCF548X_FEC_IEEE_T_OCTETS_OK1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A74)))
313#define MCF548X_FEC_RMON_R_PACKETS1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A84)))
314#define MCF548X_FEC_RMON_R_BC_PKT1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A88)))
315#define MCF548X_FEC_RMON_R_MC_PKT1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A8C)))
316#define MCF548X_FEC_RMON_R_CRC_ALIGN1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A90)))
317#define MCF548X_FEC_RMON_R_UNDERSIZE1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A94)))
318#define MCF548X_FEC_RMON_R_OVERSIZE1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A98)))
319#define MCF548X_FEC_RMON_R_FRAG1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009A9C)))
320#define MCF548X_FEC_RMON_R_JAB1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009AA0)))
321#define MCF548X_FEC_RMON_R_RESVD_01 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009AA4)))
322#define MCF548X_FEC_RMON_R_P641 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009AA8)))
323#define MCF548X_FEC_RMON_R_P65TO1271 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009AAC)))
324#define MCF548X_FEC_RMON_R_P128TO2551 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009AB0)))
325#define MCF548X_FEC_RMON_R_P256TO5111 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009AB4)))
326#define MCF548X_FEC_RMON_R_512TO10231 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009AB8)))
327#define MCF548X_FEC_RMON_R_1024TO20471 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009ABC)))
328#define MCF548X_FEC_RMON_R_P_GTE20481 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009AC0)))
329#define MCF548X_FEC_RMON_R_OCTETS1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009AC4)))
330#define MCF548X_FEC_IEEE_R_DROP1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009AC8)))
331#define MCF548X_FEC_IEEE_R_FRAME_OK1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009ACC)))
332#define MCF548X_FEC_IEEE_R_CRC1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009AD0)))
333#define MCF548X_FEC_IEEE_R_ALIGN1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009AD4)))
334#define MCF548X_FEC_IEEE_R_MACERR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009AD8)))
335#define MCF548X_FEC_IEEE_R_FDXFC1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009ADC)))
336#define MCF548X_FEC_IEEE_R_OCTETS_OK1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009AE0)))
337#define MCF548X_FEC_EIR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009004U+((x)*0x800))))
338#define MCF548X_FEC_EIMR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009008U+((x)*0x800))))
339#define MCF548X_FEC_ECR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009024U+((x)*0x800))))
340#define MCF548X_FEC_MMFR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009040U+((x)*0x800))))
341#define MCF548X_FEC_MSCR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009044U+((x)*0x800))))
342#define MCF548X_FEC_MIBC(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009064U+((x)*0x800))))
343#define MCF548X_FEC_RCR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009084U+((x)*0x800))))
344#define MCF548X_FEC_R_HASH(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009088U+((x)*0x800))))
345#define MCF548X_FEC_TCR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0090C4U+((x)*0x800))))
346#define MCF548X_FEC_PALR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0090E4U+((x)*0x800))))
347#define MCF548X_FEC_PAUR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0090E8U+((x)*0x800))))
348#define MCF548X_FEC_OPD(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0090ECU+((x)*0x800))))
349#define MCF548X_FEC_IAUR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009118U+((x)*0x800))))
350#define MCF548X_FEC_IALR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00911CU+((x)*0x800))))
351#define MCF548X_FEC_GAUR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009120U+((x)*0x800))))
352#define MCF548X_FEC_GALR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009124U+((x)*0x800))))
353#define MCF548X_FEC_FECTFWR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009144U+((x)*0x800))))
354#define MCF548X_FEC_FECRFDR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009184U+((x)*0x800))))
355#define MCF548X_FEC_FECRFSR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009188U+((x)*0x800))))
356#define MCF548X_FEC_FECRFCR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00918CU+((x)*0x800))))
357#define MCF548X_FEC_FECRLRFP(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009190U+((x)*0x800))))
358#define MCF548X_FEC_FECRLWFP(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009194U+((x)*0x800))))
359#define MCF548X_FEC_FECRFAR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009198U+((x)*0x800))))
360#define MCF548X_FEC_FECRFRP(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00919CU+((x)*0x800))))
361#define MCF548X_FEC_FECRFWP(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091A0U+((x)*0x800))))
362#define MCF548X_FEC_FECTFDR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091A4U+((x)*0x800))))
363#define MCF548X_FEC_FECTFSR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091A8U+((x)*0x800))))
364#define MCF548X_FEC_FECTFCR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091ACU+((x)*0x800))))
365#define MCF548X_FEC_FECTLRFP(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091B0U+((x)*0x800))))
366#define MCF548X_FEC_FECTLWFP(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091B4U+((x)*0x800))))
367#define MCF548X_FEC_FECTFAR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091B8U+((x)*0x800))))
368#define MCF548X_FEC_FECTFRP(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091BCU+((x)*0x800))))
369#define MCF548X_FEC_FECTFWP(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091C0U+((x)*0x800))))
370#define MCF548X_FEC_FRST(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091C4U+((x)*0x800))))
371#define MCF548X_FEC_CTCWR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0091C8U+((x)*0x800))))
372#define MCF548X_FEC_RMON_T_DROP(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009200U+((x)*0x800))))
373#define MCF548X_FEC_RMON_T_PACKETS(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009204U+((x)*0x800))))
374#define MCF548X_FEC_RMON_T_BC_PKT(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009208U+((x)*0x800))))
375#define MCF548X_FEC_RMON_T_MC_PKT(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00920CU+((x)*0x800))))
376#define MCF548X_FEC_RMON_T_CRC_ALIGN(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009210U+((x)*0x800))))
377#define MCF548X_FEC_RMON_T_UNDERSIZE(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009214U+((x)*0x800))))
378#define MCF548X_FEC_RMON_T_OVERSIZE(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009218U+((x)*0x800))))
379#define MCF548X_FEC_RMON_T_FRAG(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00921CU+((x)*0x800))))
380#define MCF548X_FEC_RMON_T_JAB(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009220U+((x)*0x800))))
381#define MCF548X_FEC_RMON_T_COL(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009224U+((x)*0x800))))
382#define MCF548X_FEC_RMON_T_P64(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009228U+((x)*0x800))))
383#define MCF548X_FEC_RMON_T_P65TO127(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00922CU+((x)*0x800))))
384#define MCF548X_FEC_RMON_T_P128TO255(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009230U+((x)*0x800))))
385#define MCF548X_FEC_RMON_T_P256TO511(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009234U+((x)*0x800))))
386#define MCF548X_FEC_RMON_T_P512TO1023(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009238U+((x)*0x800))))
387#define MCF548X_FEC_RMON_T_P1024TO2047(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00923CU+((x)*0x800))))
388#define MCF548X_FEC_RMON_T_P_GTE2048(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009240U+((x)*0x800))))
389#define MCF548X_FEC_RMON_T_OCTETS(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009244U+((x)*0x800))))
390#define MCF548X_FEC_IEEE_T_DROP(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009248U+((x)*0x800))))
391#define MCF548X_FEC_IEEE_T_FRAME_OK(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00924CU+((x)*0x800))))
392#define MCF548X_FEC_IEEE_T_1COL(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009250U+((x)*0x800))))
393#define MCF548X_FEC_IEEE_T_MCOL(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009254U+((x)*0x800))))
394#define MCF548X_FEC_IEEE_T_DEF(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009258U+((x)*0x800))))
395#define MCF548X_FEC_IEEE_T_LCOL(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00925CU+((x)*0x800))))
396#define MCF548X_FEC_IEEE_T_EXCOL(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009260U+((x)*0x800))))
397#define MCF548X_FEC_IEEE_T_MACERR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009264U+((x)*0x800))))
398#define MCF548X_FEC_IEEE_T_CSERR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009268U+((x)*0x800))))
399#define MCF548X_FEC_IEEE_T_SQE(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00926CU+((x)*0x800))))
400#define MCF548X_FEC_IEEE_T_FDXFC(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009270U+((x)*0x800))))
401#define MCF548X_FEC_IEEE_T_OCTETS_OK(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009274U+((x)*0x800))))
402#define MCF548X_FEC_RMON_R_PACKETS(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009284U+((x)*0x800))))
403#define MCF548X_FEC_RMON_R_BC_PKT(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009288U+((x)*0x800))))
404#define MCF548X_FEC_RMON_R_MC_PKT(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00928CU+((x)*0x800))))
405#define MCF548X_FEC_RMON_R_CRC_ALIGN(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009290U+((x)*0x800))))
406#define MCF548X_FEC_RMON_R_UNDERSIZE(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009294U+((x)*0x800))))
407#define MCF548X_FEC_RMON_R_OVERSIZE(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x009298U+((x)*0x800))))
408#define MCF548X_FEC_RMON_R_FRAG(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00929CU+((x)*0x800))))
409#define MCF548X_FEC_RMON_R_JAB(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092A0U+((x)*0x800))))
410#define MCF548X_FEC_RMON_R_RESVD_0(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092A4U+((x)*0x800))))
411#define MCF548X_FEC_RMON_R_P64(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092A8U+((x)*0x800))))
412#define MCF548X_FEC_RMON_R_P65TO127(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092ACU+((x)*0x800))))
413#define MCF548X_FEC_RMON_R_P128TO255(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092B0U+((x)*0x800))))
414#define MCF548X_FEC_RMON_R_P256TO511(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092B4U+((x)*0x800))))
415#define MCF548X_FEC_RMON_R_512TO1023(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092B8U+((x)*0x800))))
416#define MCF548X_FEC_RMON_R_1024TO2047(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092BCU+((x)*0x800))))
417#define MCF548X_FEC_RMON_R_P_GTE2048(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092C0U+((x)*0x800))))
418#define MCF548X_FEC_RMON_R_OCTETS(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092C4U+((x)*0x800))))
419#define MCF548X_FEC_IEEE_R_DROP(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092C8U+((x)*0x800))))
420#define MCF548X_FEC_IEEE_R_FRAME_OK(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092CCU+((x)*0x800))))
421#define MCF548X_FEC_IEEE_R_CRC(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092D0U+((x)*0x800))))
422#define MCF548X_FEC_IEEE_R_ALIGN(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092D4U+((x)*0x800))))
423#define MCF548X_FEC_IEEE_R_MACERR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092D8U+((x)*0x800))))
424#define MCF548X_FEC_IEEE_R_FDXFC(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092DCU+((x)*0x800))))
425#define MCF548X_FEC_IEEE_R_OCTETS_OK(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0092E0U+((x)*0x800))))
426
427/* Bit definitions and macros for MCF548X_FEC_EIR */
428#define MCF548X_FEC_EIR_RFERR (0x00020000)
429#define MCF548X_FEC_EIR_XFERR (0x00040000)
430#define MCF548X_FEC_EIR_XFUN (0x00080000)
431#define MCF548X_FEC_EIR_RL (0x00100000)
432#define MCF548X_FEC_EIR_LC (0x00200000)
433#define MCF548X_FEC_EIR_MII (0x00800000)
434#define MCF548X_FEC_EIR_TXF (0x08000000)
435#define MCF548X_FEC_EIR_GRA (0x10000000)
436#define MCF548X_FEC_EIR_BABT (0x20000000)
437#define MCF548X_FEC_EIR_BABR (0x40000000)
438#define MCF548X_FEC_EIR_HBERR (0x80000000)
439#define MCF548X_FEC_EIR_CLEAR_ALL (0xFFFFFFFF)
440
441/* Bit definitions and macros for MCF548X_FEC_EIMR */
442#define MCF548X_FEC_EIMR_RFERR (0x00020000)
443#define MCF548X_FEC_EIMR_XFERR (0x00040000)
444#define MCF548X_FEC_EIMR_XFUN (0x00080000)
445#define MCF548X_FEC_EIMR_RL (0x00100000)
446#define MCF548X_FEC_EIMR_LC (0x00200000)
447#define MCF548X_FEC_EIMR_MII (0x00800000)
448#define MCF548X_FEC_EIMR_TXF (0x08000000)
449#define MCF548X_FEC_EIMR_GRA (0x10000000)
450#define MCF548X_FEC_EIMR_BABT (0x20000000)
451#define MCF548X_FEC_EIMR_BABR (0x40000000)
452#define MCF548X_FEC_EIMR_HBERR (0x80000000)
453#define MCF548X_FEC_EIMR_MASK_ALL (0x00000000)
454#define MCF548X_FEC_EIMR_UNMASK_ALL (0xFFFFFFFF)
455
456/* Bit definitions and macros for MCF548X_FEC_ECR */
457#define MCF548X_FEC_ECR_RESET (0x00000001)
458#define MCF548X_FEC_ECR_ETHER_EN (0x00000002)
459
460/* Bit definitions and macros for MCF548X_FEC_MMFR */
461#define MCF548X_FEC_MMFR_DATA(x) (((x)&0x0000FFFF)<<0)
462#define MCF548X_FEC_MMFR_TA(x) (((x)&0x00000003)<<16)
463#define MCF548X_FEC_MMFR_RA(x) (((x)&0x0000001F)<<18)
464#define MCF548X_FEC_MMFR_PA(x) (((x)&0x0000001F)<<23)
465#define MCF548X_FEC_MMFR_OP(x) (((x)&0x00000003)<<28)
466#define MCF548X_FEC_MMFR_ST(x) (((x)&0x00000003)<<30)
467#define MCF548X_FEC_MMFR_ST_01 (0x40000000)
468#define MCF548X_FEC_MMFR_OP_READ (0x20000000)
469#define MCF548X_FEC_MMFR_OP_WRITE (0x10000000)
470#define MCF548X_FEC_MMFR_TA_10 (0x00020000)
471
472/* Bit definitions and macros for MCF548X_FEC_MSCR */
473#define MCF548X_FEC_MSCR_MII_SPEED(x) (((x)&0x0000003F)<<1)
474#define MCF548X_FEC_MSCR_DIS_PREAMBLE (0x00000080)
475#define MCF548X_FEC_MSCR_MII_SPEED_133 (0x1B<<1)
476#define MCF548X_FEC_MSCR_MII_SPEED_120 (0x18<<1)
477#define MCF548X_FEC_MSCR_MII_SPEED_66 (0xE<<1)
478#define MCF548X_FEC_MSCR_MII_SPEED_60 (0xC<<1)
479
480/* Bit definitions and macros for MCF548X_FEC_MIBC */
481#define MCF548X_FEC_MIBC_MIB_IDLE (0x40000000)
482#define MCF548X_FEC_MIBC_MIB_DISABLE (0x80000000)
483
484/* Bit definitions and macros for MCF548X_FEC_RCR */
485#define MCF548X_FEC_RCR_LOOP (0x00000001)
486#define MCF548X_FEC_RCR_DRT (0x00000002)
487#define MCF548X_FEC_RCR_MII_MODE (0x00000004)
488#define MCF548X_FEC_RCR_PROM (0x00000008)
489#define MCF548X_FEC_RCR_BC_REJ (0x00000010)
490#define MCF548X_FEC_RCR_FCE (0x00000020)
491#define MCF548X_FEC_RCR_MAX_FL(x) (((x)&0x000007FF)<<16)
492
493/* Bit definitions and macros for MCF548X_FEC_R_HASH */
494#define MCF548X_FEC_R_HASH_HASH(x) (((x)&0x0000003F)<<24)
495#define MCF548X_FEC_R_HASH_MULTCAST (0x40000000)
496#define MCF548X_FEC_R_HASH_FCE_DC (0x80000000)
497
498/* Bit definitions and macros for MCF548X_FEC_TCR */
499#define MCF548X_FEC_TCR_GTS (0x00000001)
500#define MCF548X_FEC_TCR_HBC (0x00000002)
501#define MCF548X_FEC_TCR_FDEN (0x00000004)
502#define MCF548X_FEC_TCR_TFC_PAUSE (0x00000008)
503#define MCF548X_FEC_TCR_RFC_PAUSE (0x00000010)
504
505/* Bit definitions and macros for MCF548X_FEC_PAUR */
506#define MCF548X_FEC_PAUR_TYPE(x) (((x)&0x0000FFFF)<<0)
507#define MCF548X_FEC_PAUR_PADDR2(x) (((x)&0x0000FFFF)<<16)
508
509/* Bit definitions and macros for MCF548X_FEC_OPD */
510#define MCF548X_FEC_OPD_OP_PAUSE(x) (((x)&0x0000FFFF)<<0)
511#define MCF548X_FEC_OPD_OPCODE(x) (((x)&0x0000FFFF)<<16)
512
513/* Bit definitions and macros for MCF548X_FEC_FECTFWR */
514#define MCF548X_FEC_FECTFWR_X_WMRK(x) (((x)&0x0000000F)<<0)
515#define MCF548X_FEC_FECTFWR_X_WMRK_64 (0x00000000)
516#define MCF548X_FEC_FECTFWR_X_WMRK_128 (0x00000001)
517#define MCF548X_FEC_FECTFWR_X_WMRK_192 (0x00000002)
518#define MCF548X_FEC_FECTFWR_X_WMRK_256 (0x00000003)
519#define MCF548X_FEC_FECTFWR_X_WMRK_320 (0x00000004)
520#define MCF548X_FEC_FECTFWR_X_WMRK_384 (0x00000005)
521#define MCF548X_FEC_FECTFWR_X_WMRK_448 (0x00000006)
522#define MCF548X_FEC_FECTFWR_X_WMRK_512 (0x00000007)
523#define MCF548X_FEC_FECTFWR_X_WMRK_576 (0x00000008)
524#define MCF548X_FEC_FECTFWR_X_WMRK_640 (0x00000009)
525#define MCF548X_FEC_FECTFWR_X_WMRK_704 (0x0000000A)
526#define MCF548X_FEC_FECTFWR_X_WMRK_768 (0x0000000B)
527#define MCF548X_FEC_FECTFWR_X_WMRK_832 (0x0000000C)
528#define MCF548X_FEC_FECTFWR_X_WMRK_896 (0x0000000D)
529#define MCF548X_FEC_FECTFWR_X_WMRK_960 (0x0000000E)
530#define MCF548X_FEC_FECTFWR_X_WMRK_1024 (0x0000000F)
531
532/* Bit definitions and macros for MCF548X_FEC_FECRFDR */
533#define MCF548X_FEC_FECRFDR_ADDR0 (((uintptr_t)__MBAR + (0x009184)))
534#define MCF548X_FEC_FECRFDR_ADDR1 (((uintptr_t)__MBAR + (0x009984)))
535#define MCF548X_FEC_FECRFDR_ADDR(x) (((uintptr_t)__MBAR + (0x009184U+(0x800*x))))
536
537/* Bit definitions and macros for MCF548X_FEC_FECRFSR */
538#define MCF548X_FEC_FECRFSR_EMT (0x00010000)
539#define MCF548X_FEC_FECRFSR_ALARM (0x00020000)
540#define MCF548X_FEC_FECRFSR_FU (0x00040000)
541#define MCF548X_FEC_FECRFSR_FR (0x00080000)
542#define MCF548X_FEC_FECRFSR_OF (0x00100000)
543#define MCF548X_FEC_FECRFSR_UF (0x00200000)
544#define MCF548X_FEC_FECRFSR_RXW (0x00400000)
545#define MCF548X_FEC_FECRFSR_FAE (0x00800000)
546#define MCF548X_FEC_FECRFSR_FRM(x) (((x)&0x0000000F)<<24)
547#define MCF548X_FEC_FECRFSR_IP (0x80000000)
548
549/* Bit definitions and macros for MCF548X_FEC_FECRFCR */
550#define MCF548X_FEC_FECRFCR_COUNTER(x) (((x)&0x0000FFFF)<<0)
551#define MCF548X_FEC_FECRFCR_OF_MSK (0x00080000)
552#define MCF548X_FEC_FECRFCR_UF_MSK (0x00100000)
553#define MCF548X_FEC_FECRFCR_RXW_MSK (0x00200000)
554#define MCF548X_FEC_FECRFCR_FAE_MSK (0x00400000)
555#define MCF548X_FEC_FECRFCR_IP_MSK (0x00800000)
556#define MCF548X_FEC_FECRFCR_GR(x) (((x)&0x00000007)<<24)
557#define MCF548X_FEC_FECRFCR_FRM (0x08000000)
558#define MCF548X_FEC_FECRFCR_TIMER (0x10000000)
559#define MCF548X_FEC_FECRFCR_WFR (0x20000000)
560#define MCF548X_FEC_FECRFCR_WCTL (0x40000000)
561
562/* Bit definitions and macros for MCF548X_FEC_FECRLRFP */
563#define MCF548X_FEC_FECRLRFP_LRFP(x) (((x)&0x00000FFF)<<0)
564
565/* Bit definitions and macros for MCF548X_FEC_FECRLWFP */
566#define MCF548X_FEC_FECRLWFP_LWFP(x) (((x)&0x00000FFF)<<0)
567
568/* Bit definitions and macros for MCF548X_FEC_FECRFAR */
569#define MCF548X_FEC_FECRFAR_ALARM(x) (((x)&0x00000FFF)<<0)
570
571/* Bit definitions and macros for MCF548X_FEC_FECRFRP */
572#define MCF548X_FEC_FECRFRP_READ(x) (((x)&0x00000FFF)<<0)
573
574/* Bit definitions and macros for MCF548X_FEC_FECRFWP */
575#define MCF548X_FEC_FECRFWP_WRITE(x) (((x)&0x00000FFF)<<0)
576
577/* Bit definitions and macros for MCF548X_FEC_FECTFDR */
578#define MCF548X_FEC_FECTFDR_TFCW_TC (0x04000000)
579#define MCF548X_FEC_FECTFDR_TFCW_ABC (0x02000000)
580#define MCF548X_FEC_FECTFDR_ADDR0 (((uintptr_t)__MBAR + (0x0091A4)))
581#define MCF548X_FEC_FECTFDR_ADDR1 (((uintptr_t)__MBAR + (0x0099A4)))
582#define MCF548X_FEC_FECTFDR_ADDR(x) (((uintptr_t)__MBAR + (0x0091A4U+(0x800*x))))
583
584/* Bit definitions and macros for MCF548X_FEC_FECTFSR */
585#define MCF548X_FEC_FECTFSR_EMT (0x00010000)
586#define MCF548X_FEC_FECTFSR_ALARM (0x00020000)
587#define MCF548X_FEC_FECTFSR_FU (0x00040000)
588#define MCF548X_FEC_FECTFSR_FR (0x00080000)
589#define MCF548X_FEC_FECTFSR_OF (0x00100000)
590#define MCF548X_FEC_FECTFSR_UP (0x00200000)
591#define MCF548X_FEC_FECTFSR_FAE (0x00800000)
592#define MCF548X_FEC_FECTFSR_FRM(x) (((x)&0x0000000F)<<24)
593#define MCF548X_FEC_FECTFSR_TXW (0x40000000)
594#define MCF548X_FEC_FECTFSR_IP (0x80000000)
595
596/* Bit definitions and macros for MCF548X_FEC_FECTFCR */
597#define MCF548X_FEC_FECTFCR_RESERVED (0x00200000)
598#define MCF548X_FEC_FECTFCR_COUNTER(x) (((x)&0x0000FFFF)<<0|0x00200000)
599#define MCF548X_FEC_FECTFCR_TXW_MSK (0x00240000)
600#define MCF548X_FEC_FECTFCR_OF_MSK (0x00280000)
601#define MCF548X_FEC_FECTFCR_UF_MSK (0x00300000)
602#define MCF548X_FEC_FECTFCR_FAE_MSK (0x00600000)
603#define MCF548X_FEC_FECTFCR_IP_MSK (0x00A00000)
604#define MCF548X_FEC_FECTFCR_GR(x) (((x)&0x00000007)<<24|0x00200000)
605#define MCF548X_FEC_FECTFCR_FRM (0x08200000)
606#define MCF548X_FEC_FECTFCR_TIMER (0x10200000)
607#define MCF548X_FEC_FECTFCR_WFR (0x20200000)
608#define MCF548X_FEC_FECTFCR_WCTL (0x40200000)
609
610/* Bit definitions and macros for MCF548X_FEC_FECTLRFP */
611#define MCF548X_FEC_FECTLRFP_LRFP(x) (((x)&0x00000FFF)<<0)
612
613/* Bit definitions and macros for MCF548X_FEC_FECTLWFP */
614#define MCF548X_FEC_FECTLWFP_LWFP(x) (((x)&0x00000FFF)<<0)
615
616/* Bit definitions and macros for MCF548X_FEC_FECTFAR */
617#define MCF548X_FEC_FECTFAR_ALARM(x) (((x)&0x00000FFF)<<0)
618
619/* Bit definitions and macros for MCF548X_FEC_FECTFRP */
620#define MCF548X_FEC_FECTFRP_READ(x) (((x)&0x00000FFF)<<0)
621
622/* Bit definitions and macros for MCF548X_FEC_FECTFWP */
623#define MCF548X_FEC_FECTFWP_WRITE(x) (((x)&0x00000FFF)<<0)
624
625/* Bit definitions and macros for MCF548X_FEC_FRST */
626#define MCF548X_FEC_FRST_RST_CTL (0x01000000)
627#define MCF548X_FEC_FRST_SW_RST (0x02000000)
628
629/* Bit definitions and macros for MCF548X_FEC_CTCWR */
630#define MCF548X_FEC_CTCWR_TFCW (0x01000000)
631#define MCF548X_FEC_CTCWR_CRC (0x02000000)
632
633
634/*********************************************************************
635*
636* System Integration Unit (SIU)
637*
638*********************************************************************/
639
640/* Register read/write macros */
641#define MCF548X_SIU_SBCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000010)))
642#define MCF548X_SIU_SECSACR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000038)))
643#define MCF548X_SIU_RSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000044)))
644#define MCF548X_SIU_JTAGID (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000050)))
645
646/* Bit definitions and macros for MCF548X_SIU_SBCR */
647#define MCF548X_SIU_SBCR_PIN2DSPI (0x08000000)
648#define MCF548X_SIU_SBCR_DMA2CPU (0x10000000)
649#define MCF548X_SIU_SBCR_CPU2DMA (0x20000000)
650#define MCF548X_SIU_SBCR_PIN2DMA (0x40000000)
651#define MCF548X_SIU_SBCR_PIN2CPU (0x80000000)
652
653/* Bit definitions and macros for MCF548X_SIU_SECSACR */
654#define MCF548X_SIU_SECSACR_SEQEN (0x00000001)
655
656/* Bit definitions and macros for MCF548X_SIU_RSR */
657#define MCF548X_SIU_RSR_RST (0x00000001)
658#define MCF548X_SIU_RSR_RSTWD (0x00000002)
659#define MCF548X_SIU_RSR_RSTJTG (0x00000008)
660
661/* Bit definitions and macros for MCF548X_SIU_JTAGID */
662#define MCF548X_SIU_JTAGID_REV (0xF0000000)
663#define MCF548X_SIU_JTAGID_PROCESSOR (0x0FFFFFFF)
664#define MCF548X_SIU_JTAGID_MCF5485 (0x0800C01D)
665#define MCF548X_SIU_JTAGID_MCF5484 (0x0800D01D)
666#define MCF548X_SIU_JTAGID_MCF5483 (0x0800E01D)
667#define MCF548X_SIU_JTAGID_MCF5482 (0x0800F01D)
668#define MCF548X_SIU_JTAGID_MCF5481 (0x0801001D)
669#define MCF548X_SIU_JTAGID_MCF5480 (0x0801101D)
670#define MCF548X_SIU_JTAGID_MCF5475 (0x0801201D)
671#define MCF548X_SIU_JTAGID_MCF5474 (0x0801301D)
672#define MCF548X_SIU_JTAGID_MCF5473 (0x0801401D)
673#define MCF548X_SIU_JTAGID_MCF5472 (0x0801501D)
674#define MCF548X_SIU_JTAGID_MCF5471 (0x0801601D)
675#define MCF548X_SIU_JTAGID_MCF5470 (0x0801701D)
676
677/*********************************************************************
678*
679* Comm Timer Module (CTM)
680*
681*********************************************************************/
682
683/* Register read/write macros */
684#define MCF548X_CTM_CTCRF0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x007F00)))
685#define MCF548X_CTM_CTCRF1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x007F04)))
686#define MCF548X_CTM_CTCRF2 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x007F08)))
687#define MCF548X_CTM_CTCRF3 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x007F0C)))
688#define MCF548X_CTM_CTCRFn(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x007F00U+((x)*0x004))))
689#define MCF548X_CTM_CTCRV4 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x007F10)))
690#define MCF548X_CTM_CTCRV5 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x007F14)))
691#define MCF548X_CTM_CTCRV6 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x007F18)))
692#define MCF548X_CTM_CTCRV7 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x007F1C)))
693#define MCF548X_CTM_CTCRVn(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x007F10U+((x)*0x004))))
694
695/* Bit definitions and macros for MCF548X_CTM_CTCRFn */
696#define MCF548X_CTM_CTCRFn_CRV(x) (((x)&0x0000FFFF)<<0)
697#define MCF548X_CTM_CTCRFn_S(x) (((x)&0x0000000F)<<16)
698#define MCF548X_CTM_CTCRFn_PCT(x) (((x)&0x00000007)<<20)
699#define MCF548X_CTM_CTCRFn_M (0x00800000)
700#define MCF548X_CTM_CTCRFn_IM (0x01000000)
701#define MCF548X_CTM_CTCRFn_I (0x80000000)
702#define MCF548X_CTM_CTCRFn_PCT_100 (0x00000000)
703#define MCF548X_CTM_CTCRFn_PCT_50 (0x00100000)
704#define MCF548X_CTM_CTCRFn_PCT_25 (0x00200000)
705#define MCF548X_CTM_CTCRFn_PCT_12p5 (0x00300000)
706#define MCF548X_CTM_CTCRFn_PCT_6p25 (0x00400000)
707#define MCF548X_CTM_CTCRFn_PCT_OFF (0x00500000)
708#define MCF548X_CTM_CTCRFn_S_CLK_1 (0x00000000)
709#define MCF548X_CTM_CTCRFn_S_CLK_2 (0x00010000)
710#define MCF548X_CTM_CTCRFn_S_CLK_4 (0x00020000)
711#define MCF548X_CTM_CTCRFn_S_CLK_8 (0x00030000)
712#define MCF548X_CTM_CTCRFn_S_CLK_16 (0x00040000)
713#define MCF548X_CTM_CTCRFn_S_CLK_32 (0x00050000)
714#define MCF548X_CTM_CTCRFn_S_CLK_64 (0x00060000)
715#define MCF548X_CTM_CTCRFn_S_CLK_128 (0x00070000)
716#define MCF548X_CTM_CTCRFn_S_CLK_256 (0x00080000)
717
718/* Bit definitions and macros for MCF548X_CTM_CTCRVn */
719#define MCF548X_CTM_CTCRVn_CRV(x) (((x)&0x00FFFFFF)<<0)
720#define MCF548X_CTM_CTCRVn_PCT(x) (((x)&0x00000007)<<24)
721#define MCF548X_CTM_CTCRVn_M (0x08000000)
722#define MCF548X_CTM_CTCRVn_S(x) (((x)&0x0000000F)<<28)
723#define MCF548X_CTM_CTCRVn_S_CLK_1 (0x00000000)
724#define MCF548X_CTM_CTCRVn_S_CLK_2 (0x10000000)
725#define MCF548X_CTM_CTCRVn_S_CLK_4 (0x20000000)
726#define MCF548X_CTM_CTCRVn_S_CLK_8 (0x30000000)
727#define MCF548X_CTM_CTCRVn_S_CLK_16 (0x40000000)
728#define MCF548X_CTM_CTCRVn_S_CLK_32 (0x50000000)
729#define MCF548X_CTM_CTCRVn_S_CLK_64 (0x60000000)
730#define MCF548X_CTM_CTCRVn_S_CLK_128 (0x70000000)
731#define MCF548X_CTM_CTCRVn_S_CLK_256 (0x80000000)
732#define MCF548X_CTM_CTCRVn_PCT_100 (0x00000000)
733#define MCF548X_CTM_CTCRVn_PCT_50 (0x01000000)
734#define MCF548X_CTM_CTCRVn_PCT_25 (0x02000000)
735#define MCF548X_CTM_CTCRVn_PCT_12p5 (0x03000000)
736#define MCF548X_CTM_CTCRVn_PCT_6p25 (0x04000000)
737#define MCF548X_CTM_CTCRVn_PCT_OFF (0x05000000)
738
739/*********************************************************************
740*
741* DMA Serial Peripheral Interface (DSPI)
742*
743*********************************************************************/
744
745/* Register read/write macros */
746#define MCF548X_DSPI_DMCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A00)))
747#define MCF548X_DSPI_DTCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A08)))
748#define MCF548X_DSPI_DCTAR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A0C)))
749#define MCF548X_DSPI_DCTAR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A10)))
750#define MCF548X_DSPI_DCTAR2 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A14)))
751#define MCF548X_DSPI_DCTAR3 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A18)))
752#define MCF548X_DSPI_DCTAR4 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A1C)))
753#define MCF548X_DSPI_DCTAR5 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A20)))
754#define MCF548X_DSPI_DCTAR6 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A24)))
755#define MCF548X_DSPI_DCTAR7 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A28)))
756#define MCF548X_DSPI_DCTARn(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A0CU+((x)*0x004))))
757#define MCF548X_DSPI_DSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A2C)))
758#define MCF548X_DSPI_DIRSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A30)))
759#define MCF548X_DSPI_DTFR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A34)))
760#define MCF548X_DSPI_DRFR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A38)))
761#define MCF548X_DSPI_DTFDR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A3C)))
762#define MCF548X_DSPI_DTFDR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A40)))
763#define MCF548X_DSPI_DTFDR2 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A44)))
764#define MCF548X_DSPI_DTFDR3 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A48)))
765#define MCF548X_DSPI_DTFDRn(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A3CU+((x)*0x004))))
766#define MCF548X_DSPI_DRFDR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A7C)))
767#define MCF548X_DSPI_DRFDR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A80)))
768#define MCF548X_DSPI_DRFDR2 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A84)))
769#define MCF548X_DSPI_DRFDR3 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A88)))
770#define MCF548X_DSPI_DRFDRn(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008A7CU+((x)*0x004))))
771
772/* Bit definitions and macros for MCF548X_DSPI_DMCR */
773#define MCF548X_DSPI_DMCR_HALT (0x00000001)
774#define MCF548X_DSPI_DMCR_SMPL_PT(x) (((x)&0x00000003)<<8)
775#define MCF548X_DSPI_DMCR_CRXF (0x00000400)
776#define MCF548X_DSPI_DMCR_CTXF (0x00000800)
777#define MCF548X_DSPI_DMCR_DRXF (0x00001000)
778#define MCF548X_DSPI_DMCR_DTXF (0x00002000)
779#define MCF548X_DSPI_DMCR_CSIS0 (0x00010000)
780#define MCF548X_DSPI_DMCR_CSIS2 (0x00040000)
781#define MCF548X_DSPI_DMCR_CSIS3 (0x00080000)
782#define MCF548X_DSPI_DMCR_CSIS5 (0x00200000)
783#define MCF548X_DSPI_DMCR_ROOE (0x01000000)
784#define MCF548X_DSPI_DMCR_PCSSE (0x02000000)
785#define MCF548X_DSPI_DMCR_MTFE (0x04000000)
786#define MCF548X_DSPI_DMCR_FRZ (0x08000000)
787#define MCF548X_DSPI_DMCR_DCONF(x) (((x)&0x00000003)<<28)
788#define MCF548X_DSPI_DMCR_CSCK (0x40000000)
789#define MCF548X_DSPI_DMCR_MSTR (0x80000000)
790
791/* Bit definitions and macros for MCF548X_DSPI_DTCR */
792#define MCF548X_DSPI_DTCR_SPI_TCNT(x) (((x)&0x0000FFFF)<<16)
793
794/* Bit definitions and macros for MCF548X_DSPI_DCTARn */
795#define MCF548X_DSPI_DCTARn_BR(x) (((x)&0x0000000F)<<0)
796#define MCF548X_DSPI_DCTARn_DT(x) (((x)&0x0000000F)<<4)
797#define MCF548X_DSPI_DCTARn_ASC(x) (((x)&0x0000000F)<<8)
798#define MCF548X_DSPI_DCTARn_CSSCK(x) (((x)&0x0000000F)<<12)
799#define MCF548X_DSPI_DCTARn_PBR(x) (((x)&0x00000003)<<16)
800#define MCF548X_DSPI_DCTARn_PDT(x) (((x)&0x00000003)<<18)
801#define MCF548X_DSPI_DCTARn_PASC(x) (((x)&0x00000003)<<20)
802#define MCF548X_DSPI_DCTARn_PCSSCK(x) (((x)&0x00000003)<<22)
803#define MCF548X_DSPI_DCTARn_LSBFE (0x01000000)
804#define MCF548X_DSPI_DCTARn_CPHA (0x02000000)
805#define MCF548X_DSPI_DCTARn_CPOL (0x04000000)
806#define MCF548X_DSPI_DCTARn_TRSZ(x) (((x)&0x0000000F)<<27)
807#define MCF548X_DSPI_DCTARn_PCSSCK_1CLK (0x00000000)
808#define MCF548X_DSPI_DCTARn_PCSSCK_3CLK (0x00400000)
809#define MCF548X_DSPI_DCTARn_PCSSCK_5CLK (0x00800000)
810#define MCF548X_DSPI_DCTARn_PCSSCK_7CLK (0x00A00000)
811#define MCF548X_DSPI_DCTARn_PASC_1CLK (0x00000000)
812#define MCF548X_DSPI_DCTARn_PASC_3CLK (0x00100000)
813#define MCF548X_DSPI_DCTARn_PASC_5CLK (0x00200000)
814#define MCF548X_DSPI_DCTARn_PASC_7CLK (0x00300000)
815#define MCF548X_DSPI_DCTARn_PDT_1CLK (0x00000000)
816#define MCF548X_DSPI_DCTARn_PDT_3CLK (0x00040000)
817#define MCF548X_DSPI_DCTARn_PDT_5CLK (0x00080000)
818#define MCF548X_DSPI_DCTARn_PDT_7CLK (0x000A0000)
819#define MCF548X_DSPI_DCTARn_PBR_1CLK (0x00000000)
820#define MCF548X_DSPI_DCTARn_PBR_3CLK (0x00010000)
821#define MCF548X_DSPI_DCTARn_PBR_5CLK (0x00020000)
822#define MCF548X_DSPI_DCTARn_PBR_7CLK (0x00030000)
823
824/* Bit definitions and macros for MCF548X_DSPI_DSR */
825#define MCF548X_DSPI_DSR_RXPTR(x) (((x)&0x0000000F)<<0)
826#define MCF548X_DSPI_DSR_RXCTR(x) (((x)&0x0000000F)<<4)
827#define MCF548X_DSPI_DSR_TXPTR(x) (((x)&0x0000000F)<<8)
828#define MCF548X_DSPI_DSR_TXCTR(x) (((x)&0x0000000F)<<12)
829#define MCF548X_DSPI_DSR_RFDF (0x00020000)
830#define MCF548X_DSPI_DSR_RFOF (0x00080000)
831#define MCF548X_DSPI_DSR_TFFF (0x02000000)
832#define MCF548X_DSPI_DSR_TFUF (0x08000000)
833#define MCF548X_DSPI_DSR_EOQF (0x10000000)
834#define MCF548X_DSPI_DSR_TXRXS (0x40000000)
835#define MCF548X_DSPI_DSR_TCF (0x80000000)
836
837/* Bit definitions and macros for MCF548X_DSPI_DIRSR */
838#define MCF548X_DSPI_DIRSR_RFDFS (0x00010000)
839#define MCF548X_DSPI_DIRSR_RFDFE (0x00020000)
840#define MCF548X_DSPI_DIRSR_RFOFE (0x00080000)
841#define MCF548X_DSPI_DIRSR_TFFFS (0x01000000)
842#define MCF548X_DSPI_DIRSR_TFFFE (0x02000000)
843#define MCF548X_DSPI_DIRSR_TFUFE (0x08000000)
844#define MCF548X_DSPI_DIRSR_EOQFE (0x10000000)
845#define MCF548X_DSPI_DIRSR_TCFE (0x80000000)
846
847/* Bit definitions and macros for MCF548X_DSPI_DTFR */
848#define MCF548X_DSPI_DTFR_TXDATA(x) (((x)&0x0000FFFF)<<0)
849#define MCF548X_DSPI_DTFR_CS0 (0x00010000)
850#define MCF548X_DSPI_DTFR_CS2 (0x00040000)
851#define MCF548X_DSPI_DTFR_CS3 (0x00080000)
852#define MCF548X_DSPI_DTFR_CS5 (0x00200000)
853#define MCF548X_DSPI_DTFR_CTCNT (0x04000000)
854#define MCF548X_DSPI_DTFR_EOQ (0x08000000)
855#define MCF548X_DSPI_DTFR_CTAS(x) (((x)&0x00000007)<<28)
856#define MCF548X_DSPI_DTFR_CONT (0x80000000)
857
858/* Bit definitions and macros for MCF548X_DSPI_DRFR */
859#define MCF548X_DSPI_DRFR_RXDATA(x) (((x)&0x0000FFFF)<<0)
860
861/* Bit definitions and macros for MCF548X_DSPI_DTFDRn */
862#define MCF548X_DSPI_DTFDRn_TXDATA(x) (((x)&0x0000FFFF)<<0)
863#define MCF548X_DSPI_DTFDRn_TXCMD(x) (((x)&0x0000FFFF)<<16)
864
865/* Bit definitions and macros for MCF548X_DSPI_DRFDRn */
866#define MCF548X_DSPI_DRFDRn_RXDATA(x) (((x)&0x0000FFFF)<<0)
867
868
869/*********************************************************************
870*
871* Edge Port Module (EPORT)
872*
873*********************************************************************/
874
875/* Register read/write macros */
876#define MCF548X_EPORT_EPPAR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x000F00)))
877#define MCF548X_EPORT_EPDDR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000F04)))
878#define MCF548X_EPORT_EPIER (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000F05)))
879#define MCF548X_EPORT_EPDR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000F08)))
880#define MCF548X_EPORT_EPPDR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000F09)))
881#define MCF548X_EPORT_EPFR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000F0C)))
882
883/* Bit definitions and macros for MCF548X_EPORT_EPPAR */
884#define MCF548X_EPORT_EPPAR_EPPA1(x) (((x)&0x0003)<<2)
885#define MCF548X_EPORT_EPPAR_EPPA2(x) (((x)&0x0003)<<4)
886#define MCF548X_EPORT_EPPAR_EPPA3(x) (((x)&0x0003)<<6)
887#define MCF548X_EPORT_EPPAR_EPPA4(x) (((x)&0x0003)<<8)
888#define MCF548X_EPORT_EPPAR_EPPA5(x) (((x)&0x0003)<<10)
889#define MCF548X_EPORT_EPPAR_EPPA6(x) (((x)&0x0003)<<12)
890#define MCF548X_EPORT_EPPAR_EPPA7(x) (((x)&0x0003)<<14)
891#define MCF548X_EPORT_EPPAR_EPPAx_LEVEL (0)
892#define MCF548X_EPORT_EPPAR_EPPAx_RISING (1)
893#define MCF548X_EPORT_EPPAR_EPPAx_FALLING (2)
894#define MCF548X_EPORT_EPPAR_EPPAx_BOTH (3)
895
896/* Bit definitions and macros for MCF548X_EPORT_EPDDR */
897#define MCF548X_EPORT_EPDDR_EPDD1 (0x02)
898#define MCF548X_EPORT_EPDDR_EPDD2 (0x04)
899#define MCF548X_EPORT_EPDDR_EPDD3 (0x08)
900#define MCF548X_EPORT_EPDDR_EPDD4 (0x10)
901#define MCF548X_EPORT_EPDDR_EPDD5 (0x20)
902#define MCF548X_EPORT_EPDDR_EPDD6 (0x40)
903#define MCF548X_EPORT_EPDDR_EPDD7 (0x80)
904
905/* Bit definitions and macros for MCF548X_EPORT_EPIER */
906#define MCF548X_EPORT_EPIER_EPIE1 (0x02)
907#define MCF548X_EPORT_EPIER_EPIE2 (0x04)
908#define MCF548X_EPORT_EPIER_EPIE3 (0x08)
909#define MCF548X_EPORT_EPIER_EPIE4 (0x10)
910#define MCF548X_EPORT_EPIER_EPIE5 (0x20)
911#define MCF548X_EPORT_EPIER_EPIE6 (0x40)
912#define MCF548X_EPORT_EPIER_EPIE7 (0x80)
913
914/* Bit definitions and macros for MCF548X_EPORT_EPDR */
915#define MCF548X_EPORT_EPDR_EPD1 (0x02)
916#define MCF548X_EPORT_EPDR_EPD2 (0x04)
917#define MCF548X_EPORT_EPDR_EPD3 (0x08)
918#define MCF548X_EPORT_EPDR_EPD4 (0x10)
919#define MCF548X_EPORT_EPDR_EPD5 (0x20)
920#define MCF548X_EPORT_EPDR_EPD6 (0x40)
921#define MCF548X_EPORT_EPDR_EPD7 (0x80)
922
923/* Bit definitions and macros for MCF548X_EPORT_EPPDR */
924#define MCF548X_EPORT_EPPDR_EPPD1 (0x02)
925#define MCF548X_EPORT_EPPDR_EPPD2 (0x04)
926#define MCF548X_EPORT_EPPDR_EPPD3 (0x08)
927#define MCF548X_EPORT_EPPDR_EPPD4 (0x10)
928#define MCF548X_EPORT_EPPDR_EPPD5 (0x20)
929#define MCF548X_EPORT_EPPDR_EPPD6 (0x40)
930#define MCF548X_EPORT_EPPDR_EPPD7 (0x80)
931
932/* Bit definitions and macros for MCF548X_EPORT_EPFR */
933#define MCF548X_EPORT_EPFR_EPF1 (0x02)
934#define MCF548X_EPORT_EPFR_EPF2 (0x04)
935#define MCF548X_EPORT_EPFR_EPF3 (0x08)
936#define MCF548X_EPORT_EPFR_EPF4 (0x10)
937#define MCF548X_EPORT_EPFR_EPF5 (0x20)
938#define MCF548X_EPORT_EPFR_EPF6 (0x40)
939#define MCF548X_EPORT_EPFR_EPF7 (0x80)
940
941/*********************************************************************
942*
943* FlexBus Chip Selects (FBCS)
944*
945*********************************************************************/
946
947/* Register read/write macros */
948#define MCF548X_FBCS_CSAR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000500)))
949#define MCF548X_FBCS_CSMR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000504)))
950#define MCF548X_FBCS_CSCR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000508)))
951#define MCF548X_FBCS_CSAR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00050C)))
952#define MCF548X_FBCS_CSMR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000510)))
953#define MCF548X_FBCS_CSCR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000514)))
954#define MCF548X_FBCS_CSAR2 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000518)))
955#define MCF548X_FBCS_CSMR2 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00051C)))
956#define MCF548X_FBCS_CSCR2 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000520)))
957#define MCF548X_FBCS_CSAR3 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000524)))
958#define MCF548X_FBCS_CSMR3 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000528)))
959#define MCF548X_FBCS_CSCR3 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00052C)))
960#define MCF548X_FBCS_CSAR4 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000530)))
961#define MCF548X_FBCS_CSMR4 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000534)))
962#define MCF548X_FBCS_CSCR4 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000538)))
963#define MCF548X_FBCS_CSAR5 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00053C)))
964#define MCF548X_FBCS_CSMR5 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000540)))
965#define MCF548X_FBCS_CSCR5 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000544)))
966#define MCF548X_FBCS_CSAR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000500U+((x)*0x00C))))
967#define MCF548X_FBCS_CSMR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000504U+((x)*0x00C))))
968#define MCF548X_FBCS_CSCR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000508U+((x)*0x00C))))
969
970/* Bit definitions and macros for MCF548X_FBCS_CSAR */
971#define MCF548X_FBCS_CSAR_BA(x) ((x)&0xFFFF0000)
972
973/* Bit definitions and macros for MCF548X_FBCS_CSMR */
974#define MCF548X_FBCS_CSMR_V (0x00000001)
975#define MCF548X_FBCS_CSMR_WP (0x00000100)
976#define MCF548X_FBCS_CSMR_BAM(x) (((x)&0x0000FFFF)<<16)
977#define MCF548X_FBCS_CSMR_BAM_4G (0xFFFF0000)
978#define MCF548X_FBCS_CSMR_BAM_2G (0x7FFF0000)
979#define MCF548X_FBCS_CSMR_BAM_1G (0x3FFF0000)
980#define MCF548X_FBCS_CSMR_BAM_1024M (0x3FFF0000)
981#define MCF548X_FBCS_CSMR_BAM_512M (0x1FFF0000)
982#define MCF548X_FBCS_CSMR_BAM_256M (0x0FFF0000)
983#define MCF548X_FBCS_CSMR_BAM_128M (0x07FF0000)
984#define MCF548X_FBCS_CSMR_BAM_64M (0x03FF0000)
985#define MCF548X_FBCS_CSMR_BAM_32M (0x01FF0000)
986#define MCF548X_FBCS_CSMR_BAM_16M (0x00FF0000)
987#define MCF548X_FBCS_CSMR_BAM_8M (0x007F0000)
988#define MCF548X_FBCS_CSMR_BAM_4M (0x003F0000)
989#define MCF548X_FBCS_CSMR_BAM_2M (0x001F0000)
990#define MCF548X_FBCS_CSMR_BAM_1M (0x000F0000)
991#define MCF548X_FBCS_CSMR_BAM_1024K (0x000F0000)
992#define MCF548X_FBCS_CSMR_BAM_512K (0x00070000)
993#define MCF548X_FBCS_CSMR_BAM_256K (0x00030000)
994#define MCF548X_FBCS_CSMR_BAM_128K (0x00010000)
995#define MCF548X_FBCS_CSMR_BAM_64K (0x00000000)
996
997/* Bit definitions and macros for MCF548X_FBCS_CSCR */
998#define MCF548X_FBCS_CSCR_BSTW (0x00000008)
999#define MCF548X_FBCS_CSCR_BSTR (0x00000010)
1000#define MCF548X_FBCS_CSCR_PS(x) (((x)&0x00000003)<<6)
1001#define MCF548X_FBCS_CSCR_AA (0x00000100)
1002#define MCF548X_FBCS_CSCR_WS(x) (((x)&0x0000003F)<<10)
1003#define MCF548X_FBCS_CSCR_WRAH(x) (((x)&0x00000003)<<16)
1004#define MCF548X_FBCS_CSCR_RDAH(x) (((x)&0x00000003)<<18)
1005#define MCF548X_FBCS_CSCR_ASET(x) (((x)&0x00000003)<<20)
1006#define MCF548X_FBCS_CSCR_SWSEN (0x00800000)
1007#define MCF548X_FBCS_CSCR_SWS(x) (((x)&0x0000003F)<<26)
1008#define MCF548X_FBCS_CSCR_PS_8 (0x00000040)
1009#define MCF548X_FBCS_CSCR_PS_16 (0x00000080)
1010#define MCF548X_FBCS_CSCR_PS_32 (0x00000000)
1011
1012
1013/*********************************************************************
1014*
1015* General Purpose I/O (GPIO)
1016*
1017*********************************************************************/
1018
1019/* Register read/write macros */
1020#define MCF548X_GPIO_PODR_FBCTL (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A00)))
1021#define MCF548X_GPIO_PODR_FBCS (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A01)))
1022#define MCF548X_GPIO_PODR_DMA (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A02)))
1023#define MCF548X_GPIO_PODR_FEC0H (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A04)))
1024#define MCF548X_GPIO_PODR_FEC0L (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A05)))
1025#define MCF548X_GPIO_PODR_FEC1H (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A06)))
1026#define MCF548X_GPIO_PODR_FEC1L (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A07)))
1027#define MCF548X_GPIO_PODR_FECI2C (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A08)))
1028#define MCF548X_GPIO_PODR_PCIBG (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A09)))
1029#define MCF548X_GPIO_PODR_PCIBR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A0A)))
1030#define MCF548X_GPIO_PODR_PSC3PSC2 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A0C)))
1031#define MCF548X_GPIO_PODR_PSC1PSC0 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A0D)))
1032#define MCF548X_GPIO_PODR_DSPI (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A0E)))
1033#define MCF548X_GPIO_PDDR_FBCTL (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A10)))
1034#define MCF548X_GPIO_PDDR_FBCS (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A11)))
1035#define MCF548X_GPIO_PDDR_DMA (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A12)))
1036#define MCF548X_GPIO_PDDR_FEC0H (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A14)))
1037#define MCF548X_GPIO_PDDR_FEC0L (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A15)))
1038#define MCF548X_GPIO_PDDR_FEC1H (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A16)))
1039#define MCF548X_GPIO_PDDR_FEC1L (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A17)))
1040#define MCF548X_GPIO_PDDR_FECI2C (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A18)))
1041#define MCF548X_GPIO_PDDR_PCIBG (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A19)))
1042#define MCF548X_GPIO_PDDR_PCIBR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A1A)))
1043#define MCF548X_GPIO_PDDR_PSC3PSC2 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A1C)))
1044#define MCF548X_GPIO_PDDR_PSC1PSC0 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A1D)))
1045#define MCF548X_GPIO_PDDR_DSPI (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A1E)))
1046#define MCF548X_GPIO_PPDSDR_FBCTL (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A20)))
1047#define MCF548X_GPIO_PPDSDR_FBCS (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A21)))
1048#define MCF548X_GPIO_PPDSDR_DMA (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A22)))
1049#define MCF548X_GPIO_PPDSDR_FEC0H (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A24)))
1050#define MCF548X_GPIO_PPDSDR_FEC0L (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A25)))
1051#define MCF548X_GPIO_PPDSDR_FEC1H (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A26)))
1052#define MCF548X_GPIO_PPDSDR_FEC1L (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A27)))
1053#define MCF548X_GPIO_PPDSDR_FECI2C (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A28)))
1054#define MCF548X_GPIO_PPDSDR_PCIBG (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A29)))
1055#define MCF548X_GPIO_PPDSDR_PCIBR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A2A)))
1056#define MCF548X_GPIO_PPDSDR_PSC3PSC2 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A2C)))
1057#define MCF548X_GPIO_PPDSDR_PSC1PSC0 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A2D)))
1058#define MCF548X_GPIO_PPDSDR_DSPI (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A2E)))
1059#define MCF548X_GPIO_PCLRR_FBCTL (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A30)))
1060#define MCF548X_GPIO_PCLRR_FBCS (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A31)))
1061#define MCF548X_GPIO_PCLRR_DMA (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A32)))
1062#define MCF548X_GPIO_PCLRR_FEC0H (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A34)))
1063#define MCF548X_GPIO_PCLRR_FEC0L (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A35)))
1064#define MCF548X_GPIO_PCLRR_FEC1H (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A36)))
1065#define MCF548X_GPIO_PCLRR_FEC1L (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A37)))
1066#define MCF548X_GPIO_PCLRR_FECI2C (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A38)))
1067#define MCF548X_GPIO_PCLRR_PCIBG (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A39)))
1068#define MCF548X_GPIO_PCLRR_PCIBR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A3A)))
1069#define MCF548X_GPIO_PCLRR_PSC3PSC2 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A3C)))
1070#define MCF548X_GPIO_PCLRR_PSC1PSC0 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A3D)))
1071#define MCF548X_GPIO_PCLRR_DSPI (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A3E)))
1072#define MCF548X_GPIO_PAR_FBCTL (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x000A40)))
1073#define MCF548X_GPIO_PAR_FBCS (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A42)))
1074#define MCF548X_GPIO_PAR_DMA (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A43)))
1075#define MCF548X_GPIO_PAR_FECI2CIRQ (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x000A44)))
1076#define MCF548X_GPIO_PAR_PCIBG (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x000A48)))
1077#define MCF548X_GPIO_PAR_PCIBR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x000A4A)))
1078#define MCF548X_GPIO_PAR_PSC3 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A4C)))
1079#define MCF548X_GPIO_PAR_PSC2 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A4D)))
1080#define MCF548X_GPIO_PAR_PSC1 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A4E)))
1081#define MCF548X_GPIO_PAR_PSC0 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A4F)))
1082#define MCF548X_GPIO_PAR_DSPI (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x000A50)))
1083#define MCF548X_GPIO_PAR_TIMER (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000A52)))
1084
1085/* Bit definitions and macros for MCF548X_GPIO_PODR_FBCTL */
1086#define MCF548X_GPIO_PODR_FBCTL_PODR_FBCTL0 (0x01)
1087#define MCF548X_GPIO_PODR_FBCTL_PODR_FBCTL1 (0x02)
1088#define MCF548X_GPIO_PODR_FBCTL_PODR_FBCTL2 (0x04)
1089#define MCF548X_GPIO_PODR_FBCTL_PODR_FBCTL3 (0x08)
1090#define MCF548X_GPIO_PODR_FBCTL_PODR_FBCTL4 (0x10)
1091#define MCF548X_GPIO_PODR_FBCTL_PODR_FBCTL5 (0x20)
1092#define MCF548X_GPIO_PODR_FBCTL_PODR_FBCTL6 (0x40)
1093#define MCF548X_GPIO_PODR_FBCTL_PODR_FBCTL7 (0x80)
1094
1095/* Bit definitions and macros for MCF548X_GPIO_PODR_FBCS */
1096#define MCF548X_GPIO_PODR_FBCS_PODR_FBCS1 (0x02)
1097#define MCF548X_GPIO_PODR_FBCS_PODR_FBCS2 (0x04)
1098#define MCF548X_GPIO_PODR_FBCS_PODR_FBCS3 (0x08)
1099#define MCF548X_GPIO_PODR_FBCS_PODR_FBCS4 (0x10)
1100#define MCF548X_GPIO_PODR_FBCS_PODR_FBCS5 (0x20)
1101
1102/* Bit definitions and macros for MCF548X_GPIO_PODR_DMA */
1103#define MCF548X_GPIO_PODR_DMA_PODR_DMA0 (0x01)
1104#define MCF548X_GPIO_PODR_DMA_PODR_DMA1 (0x02)
1105#define MCF548X_GPIO_PODR_DMA_PODR_DMA2 (0x04)
1106#define MCF548X_GPIO_PODR_DMA_PODR_DMA3 (0x08)
1107
1108/* Bit definitions and macros for MCF548X_GPIO_PODR_FEC0H */
1109#define MCF548X_GPIO_PODR_FEC0H_PODR_FEC0H0 (0x01)
1110#define MCF548X_GPIO_PODR_FEC0H_PODR_FEC0H1 (0x02)
1111#define MCF548X_GPIO_PODR_FEC0H_PODR_FEC0H2 (0x04)
1112#define MCF548X_GPIO_PODR_FEC0H_PODR_FEC0H3 (0x08)
1113#define MCF548X_GPIO_PODR_FEC0H_PODR_FEC0H4 (0x10)
1114#define MCF548X_GPIO_PODR_FEC0H_PODR_FEC0H5 (0x20)
1115#define MCF548X_GPIO_PODR_FEC0H_PODR_FEC0H6 (0x40)
1116#define MCF548X_GPIO_PODR_FEC0H_PODR_FEC0H7 (0x80)
1117
1118/* Bit definitions and macros for MCF548X_GPIO_PODR_FEC0L */
1119#define MCF548X_GPIO_PODR_FEC0L_PODR_FEC0L0 (0x01)
1120#define MCF548X_GPIO_PODR_FEC0L_PODR_FEC0L1 (0x02)
1121#define MCF548X_GPIO_PODR_FEC0L_PODR_FEC0L2 (0x04)
1122#define MCF548X_GPIO_PODR_FEC0L_PODR_FEC0L3 (0x08)
1123#define MCF548X_GPIO_PODR_FEC0L_PODR_FEC0L4 (0x10)
1124#define MCF548X_GPIO_PODR_FEC0L_PODR_FEC0L5 (0x20)
1125#define MCF548X_GPIO_PODR_FEC0L_PODR_FEC0L6 (0x40)
1126#define MCF548X_GPIO_PODR_FEC0L_PODR_FEC0L7 (0x80)
1127
1128/* Bit definitions and macros for MCF548X_GPIO_PODR_FEC1H */
1129#define MCF548X_GPIO_PODR_FEC1H_PODR_FEC1H0 (0x01)
1130#define MCF548X_GPIO_PODR_FEC1H_PODR_FEC1H1 (0x02)
1131#define MCF548X_GPIO_PODR_FEC1H_PODR_FEC1H2 (0x04)
1132#define MCF548X_GPIO_PODR_FEC1H_PODR_FEC1H3 (0x08)
1133#define MCF548X_GPIO_PODR_FEC1H_PODR_FEC1H4 (0x10)
1134#define MCF548X_GPIO_PODR_FEC1H_PODR_FEC1H5 (0x20)
1135#define MCF548X_GPIO_PODR_FEC1H_PODR_FEC1H6 (0x40)
1136#define MCF548X_GPIO_PODR_FEC1H_PODR_FEC1H7 (0x80)
1137
1138/* Bit definitions and macros for MCF548X_GPIO_PODR_FEC1L */
1139#define MCF548X_GPIO_PODR_FEC1L_PODR_FEC1L0 (0x01)
1140#define MCF548X_GPIO_PODR_FEC1L_PODR_FEC1L1 (0x02)
1141#define MCF548X_GPIO_PODR_FEC1L_PODR_FEC1L2 (0x04)
1142#define MCF548X_GPIO_PODR_FEC1L_PODR_FEC1L3 (0x08)
1143#define MCF548X_GPIO_PODR_FEC1L_PODR_FEC1L4 (0x10)
1144#define MCF548X_GPIO_PODR_FEC1L_PODR_FEC1L5 (0x20)
1145#define MCF548X_GPIO_PODR_FEC1L_PODR_FEC1L6 (0x40)
1146#define MCF548X_GPIO_PODR_FEC1L_PODR_FEC1L7 (0x80)
1147
1148/* Bit definitions and macros for MCF548X_GPIO_PODR_FECI2C */
1149#define MCF548X_GPIO_PODR_FECI2C_PODR_FECI2C0 (0x01)
1150#define MCF548X_GPIO_PODR_FECI2C_PODR_FECI2C1 (0x02)
1151#define MCF548X_GPIO_PODR_FECI2C_PODR_FECI2C2 (0x04)
1152#define MCF548X_GPIO_PODR_FECI2C_PODR_FECI2C3 (0x08)
1153
1154/* Bit definitions and macros for MCF548X_GPIO_PODR_PCIBG */
1155#define MCF548X_GPIO_PODR_PCIBG_PODR_PCIBG0 (0x01)
1156#define MCF548X_GPIO_PODR_PCIBG_PODR_PCIBG1 (0x02)
1157#define MCF548X_GPIO_PODR_PCIBG_PODR_PCIBG2 (0x04)
1158#define MCF548X_GPIO_PODR_PCIBG_PODR_PCIBG3 (0x08)
1159#define MCF548X_GPIO_PODR_PCIBG_PODR_PCIBG4 (0x10)
1160
1161/* Bit definitions and macros for MCF548X_GPIO_PODR_PCIBR */
1162#define MCF548X_GPIO_PODR_PCIBR_PODR_PCIBR0 (0x01)
1163#define MCF548X_GPIO_PODR_PCIBR_PODR_PCIBR1 (0x02)
1164#define MCF548X_GPIO_PODR_PCIBR_PODR_PCIBR2 (0x04)
1165#define MCF548X_GPIO_PODR_PCIBR_PODR_PCIBR3 (0x08)
1166#define MCF548X_GPIO_PODR_PCIBR_PODR_PCIBR4 (0x10)
1167
1168/* Bit definitions and macros for MCF548X_GPIO_PODR_PSC3PSC2 */
1169#define MCF548X_GPIO_PODR_PSC3PSC2_PODR_PSC3PSC20 (0x01)
1170#define MCF548X_GPIO_PODR_PSC3PSC2_PODR_PSC3PSC21 (0x02)
1171#define MCF548X_GPIO_PODR_PSC3PSC2_PODR_PSC3PSC22 (0x04)
1172#define MCF548X_GPIO_PODR_PSC3PSC2_PODR_PSC3PSC23 (0x08)
1173#define MCF548X_GPIO_PODR_PSC3PSC2_PODR_PSC3PSC24 (0x10)
1174#define MCF548X_GPIO_PODR_PSC3PSC2_PODR_PSC3PSC25 (0x20)
1175#define MCF548X_GPIO_PODR_PSC3PSC2_PODR_PSC3PSC26 (0x40)
1176#define MCF548X_GPIO_PODR_PSC3PSC2_PODR_PSC3PSC27 (0x80)
1177
1178/* Bit definitions and macros for MCF548X_GPIO_PODR_PSC1PSC0 */
1179#define MCF548X_GPIO_PODR_PSC1PSC0_PODR_PSC1PSC00 (0x01)
1180#define MCF548X_GPIO_PODR_PSC1PSC0_PODR_PSC1PSC01 (0x02)
1181#define MCF548X_GPIO_PODR_PSC1PSC0_PODR_PSC1PSC02 (0x04)
1182#define MCF548X_GPIO_PODR_PSC1PSC0_PODR_PSC1PSC03 (0x08)
1183#define MCF548X_GPIO_PODR_PSC1PSC0_PODR_PSC1PSC04 (0x10)
1184#define MCF548X_GPIO_PODR_PSC1PSC0_PODR_PSC1PSC05 (0x20)
1185#define MCF548X_GPIO_PODR_PSC1PSC0_PODR_PSC1PSC06 (0x40)
1186#define MCF548X_GPIO_PODR_PSC1PSC0_PODR_PSC1PSC07 (0x80)
1187
1188/* Bit definitions and macros for MCF548X_GPIO_PODR_DSPI */
1189#define MCF548X_GPIO_PODR_DSPI_PODR_DSPI0 (0x01)
1190#define MCF548X_GPIO_PODR_DSPI_PODR_DSPI1 (0x02)
1191#define MCF548X_GPIO_PODR_DSPI_PODR_DSPI2 (0x04)
1192#define MCF548X_GPIO_PODR_DSPI_PODR_DSPI3 (0x08)
1193#define MCF548X_GPIO_PODR_DSPI_PODR_DSPI4 (0x10)
1194#define MCF548X_GPIO_PODR_DSPI_PODR_DSPI5 (0x20)
1195#define MCF548X_GPIO_PODR_DSPI_PODR_DSPI6 (0x40)
1196
1197/* Bit definitions and macros for MCF548X_GPIO_PDDR_FBCTL */
1198#define MCF548X_GPIO_PDDR_FBCTL_PDDR_FBCTL0 (0x01)
1199#define MCF548X_GPIO_PDDR_FBCTL_PDDR_FBCTL1 (0x02)
1200#define MCF548X_GPIO_PDDR_FBCTL_PDDR_FBCTL2 (0x04)
1201#define MCF548X_GPIO_PDDR_FBCTL_PDDR_FBCTL3 (0x08)
1202#define MCF548X_GPIO_PDDR_FBCTL_PDDR_FBCTL4 (0x10)
1203#define MCF548X_GPIO_PDDR_FBCTL_PDDR_FBCTL5 (0x20)
1204#define MCF548X_GPIO_PDDR_FBCTL_PDDR_FBCTL6 (0x40)
1205#define MCF548X_GPIO_PDDR_FBCTL_PDDR_FBCTL7 (0x80)
1206
1207/* Bit definitions and macros for MCF548X_GPIO_PDDR_FBCS */
1208#define MCF548X_GPIO_PDDR_FBCS_PDDR_FBCS1 (0x02)
1209#define MCF548X_GPIO_PDDR_FBCS_PDDR_FBCS2 (0x04)
1210#define MCF548X_GPIO_PDDR_FBCS_PDDR_FBCS3 (0x08)
1211#define MCF548X_GPIO_PDDR_FBCS_PDDR_FBCS4 (0x10)
1212#define MCF548X_GPIO_PDDR_FBCS_PDDR_FBCS5 (0x20)
1213
1214/* Bit definitions and macros for MCF548X_GPIO_PDDR_DMA */
1215#define MCF548X_GPIO_PDDR_DMA_PDDR_DMA0 (0x01)
1216#define MCF548X_GPIO_PDDR_DMA_PDDR_DMA1 (0x02)
1217#define MCF548X_GPIO_PDDR_DMA_PDDR_DMA2 (0x04)
1218#define MCF548X_GPIO_PDDR_DMA_PDDR_DMA3 (0x08)
1219
1220/* Bit definitions and macros for MCF548X_GPIO_PDDR_FEC0H */
1221#define MCF548X_GPIO_PDDR_FEC0H_PDDR_FEC0H0 (0x01)
1222#define MCF548X_GPIO_PDDR_FEC0H_PDDR_FEC0H1 (0x02)
1223#define MCF548X_GPIO_PDDR_FEC0H_PDDR_FEC0H2 (0x04)
1224#define MCF548X_GPIO_PDDR_FEC0H_PDDR_FEC0H3 (0x08)
1225#define MCF548X_GPIO_PDDR_FEC0H_PDDR_FEC0H4 (0x10)
1226#define MCF548X_GPIO_PDDR_FEC0H_PDDR_FEC0H5 (0x20)
1227#define MCF548X_GPIO_PDDR_FEC0H_PDDR_FEC0H6 (0x40)
1228#define MCF548X_GPIO_PDDR_FEC0H_PDDR_FEC0H7 (0x80)
1229
1230/* Bit definitions and macros for MCF548X_GPIO_PDDR_FEC0L */
1231#define MCF548X_GPIO_PDDR_FEC0L_PDDR_FEC0L0 (0x01)
1232#define MCF548X_GPIO_PDDR_FEC0L_PDDR_FEC0L1 (0x02)
1233#define MCF548X_GPIO_PDDR_FEC0L_PDDR_FEC0L2 (0x04)
1234#define MCF548X_GPIO_PDDR_FEC0L_PDDR_FEC0L3 (0x08)
1235#define MCF548X_GPIO_PDDR_FEC0L_PDDR_FEC0L4 (0x10)
1236#define MCF548X_GPIO_PDDR_FEC0L_PDDR_FEC0L5 (0x20)
1237#define MCF548X_GPIO_PDDR_FEC0L_PDDR_FEC0L6 (0x40)
1238#define MCF548X_GPIO_PDDR_FEC0L_PDDR_FEC0L7 (0x80)
1239
1240/* Bit definitions and macros for MCF548X_GPIO_PDDR_FEC1H */
1241#define MCF548X_GPIO_PDDR_FEC1H_PDDR_FEC1H0 (0x01)
1242#define MCF548X_GPIO_PDDR_FEC1H_PDDR_FEC1H1 (0x02)
1243#define MCF548X_GPIO_PDDR_FEC1H_PDDR_FEC1H2 (0x04)
1244#define MCF548X_GPIO_PDDR_FEC1H_PDDR_FEC1H3 (0x08)
1245#define MCF548X_GPIO_PDDR_FEC1H_PDDR_FEC1H4 (0x10)
1246#define MCF548X_GPIO_PDDR_FEC1H_PDDR_FEC1H5 (0x20)
1247#define MCF548X_GPIO_PDDR_FEC1H_PDDR_FEC1H6 (0x40)
1248#define MCF548X_GPIO_PDDR_FEC1H_PDDR_FEC1H7 (0x80)
1249
1250/* Bit definitions and macros for MCF548X_GPIO_PDDR_FEC1L */
1251#define MCF548X_GPIO_PDDR_FEC1L_PDDR_FEC1L0 (0x01)
1252#define MCF548X_GPIO_PDDR_FEC1L_PDDR_FEC1L1 (0x02)
1253#define MCF548X_GPIO_PDDR_FEC1L_PDDR_FEC1L2 (0x04)
1254#define MCF548X_GPIO_PDDR_FEC1L_PDDR_FEC1L3 (0x08)
1255#define MCF548X_GPIO_PDDR_FEC1L_PDDR_FEC1L4 (0x10)
1256#define MCF548X_GPIO_PDDR_FEC1L_PDDR_FEC1L5 (0x20)
1257#define MCF548X_GPIO_PDDR_FEC1L_PDDR_FEC1L6 (0x40)
1258#define MCF548X_GPIO_PDDR_FEC1L_PDDR_FEC1L7 (0x80)
1259
1260/* Bit definitions and macros for MCF548X_GPIO_PDDR_FECI2C */
1261#define MCF548X_GPIO_PDDR_FECI2C_PDDR_FECI2C0 (0x01)
1262#define MCF548X_GPIO_PDDR_FECI2C_PDDR_FECI2C1 (0x02)
1263#define MCF548X_GPIO_PDDR_FECI2C_PDDR_FECI2C2 (0x04)
1264#define MCF548X_GPIO_PDDR_FECI2C_PDDR_FECI2C3 (0x08)
1265
1266/* Bit definitions and macros for MCF548X_GPIO_PDDR_PCIBG */
1267#define MCF548X_GPIO_PDDR_PCIBG_PDDR_PCIBG0 (0x01)
1268#define MCF548X_GPIO_PDDR_PCIBG_PDDR_PCIBG1 (0x02)
1269#define MCF548X_GPIO_PDDR_PCIBG_PDDR_PCIBG2 (0x04)
1270#define MCF548X_GPIO_PDDR_PCIBG_PDDR_PCIBG3 (0x08)
1271#define MCF548X_GPIO_PDDR_PCIBG_PDDR_PCIBG4 (0x10)
1272
1273/* Bit definitions and macros for MCF548X_GPIO_PDDR_PCIBR */
1274#define MCF548X_GPIO_PDDR_PCIBR_PDDR_PCIBR0 (0x01)
1275#define MCF548X_GPIO_PDDR_PCIBR_PDDR_PCIBR1 (0x02)
1276#define MCF548X_GPIO_PDDR_PCIBR_PDDR_PCIBR2 (0x04)
1277#define MCF548X_GPIO_PDDR_PCIBR_PDDR_PCIBR3 (0x08)
1278#define MCF548X_GPIO_PDDR_PCIBR_PDDR_PCIBR4 (0x10)
1279
1280/* Bit definitions and macros for MCF548X_GPIO_PDDR_PSC3PSC2 */
1281#define MCF548X_GPIO_PDDR_PSC3PSC2_PDDR_PSC3PSC20 (0x01)
1282#define MCF548X_GPIO_PDDR_PSC3PSC2_PDDR_PSC3PSC21 (0x02)
1283#define MCF548X_GPIO_PDDR_PSC3PSC2_PDDR_PSC3PSC22 (0x04)
1284#define MCF548X_GPIO_PDDR_PSC3PSC2_PDDR_PSC3PSC23 (0x08)
1285#define MCF548X_GPIO_PDDR_PSC3PSC2_PDDR_PSC3PSC24 (0x10)
1286#define MCF548X_GPIO_PDDR_PSC3PSC2_PDDR_PSC3PSC25 (0x20)
1287#define MCF548X_GPIO_PDDR_PSC3PSC2_PDDR_PSC3PSC26 (0x40)
1288#define MCF548X_GPIO_PDDR_PSC3PSC2_PDDR_PSC3PSC27 (0x80)
1289
1290/* Bit definitions and macros for MCF548X_GPIO_PDDR_PSC1PSC0 */
1291#define MCF548X_GPIO_PDDR_PSC1PSC0_PDDR_PSC1PSC00 (0x01)
1292#define MCF548X_GPIO_PDDR_PSC1PSC0_PDDR_PSC1PSC01 (0x02)
1293#define MCF548X_GPIO_PDDR_PSC1PSC0_PDDR_PSC1PSC02 (0x04)
1294#define MCF548X_GPIO_PDDR_PSC1PSC0_PDDR_PSC1PSC03 (0x08)
1295#define MCF548X_GPIO_PDDR_PSC1PSC0_PDDR_PSC1PSC04 (0x10)
1296#define MCF548X_GPIO_PDDR_PSC1PSC0_PDDR_PSC1PSC05 (0x20)
1297#define MCF548X_GPIO_PDDR_PSC1PSC0_PDDR_PSC1PSC06 (0x40)
1298#define MCF548X_GPIO_PDDR_PSC1PSC0_PDDR_PSC1PSC07 (0x80)
1299
1300/* Bit definitions and macros for MCF548X_GPIO_PDDR_DSPI */
1301#define MCF548X_GPIO_PDDR_DSPI_PDDR_DSPI0 (0x01)
1302#define MCF548X_GPIO_PDDR_DSPI_PDDR_DSPI1 (0x02)
1303#define MCF548X_GPIO_PDDR_DSPI_PDDR_DSPI2 (0x04)
1304#define MCF548X_GPIO_PDDR_DSPI_PDDR_DSPI3 (0x08)
1305#define MCF548X_GPIO_PDDR_DSPI_PDDR_DSPI4 (0x10)
1306#define MCF548X_GPIO_PDDR_DSPI_PDDR_DSPI5 (0x20)
1307#define MCF548X_GPIO_PDDR_DSPI_PDDR_DSPI6 (0x40)
1308
1309/* Bit definitions and macros for MCF548X_GPIO_PPDSDR_FBCTL */
1310#define MCF548X_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL0 (0x01)
1311#define MCF548X_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL1 (0x02)
1312#define MCF548X_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL2 (0x04)
1313#define MCF548X_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL3 (0x08)
1314#define MCF548X_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL4 (0x10)
1315#define MCF548X_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL5 (0x20)
1316#define MCF548X_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL6 (0x40)
1317#define MCF548X_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL7 (0x80)
1318
1319/* Bit definitions and macros for MCF548X_GPIO_PPDSDR_FBCS */
1320#define MCF548X_GPIO_PPDSDR_FBCS_PPDSDR_FBCS1 (0x02)
1321#define MCF548X_GPIO_PPDSDR_FBCS_PPDSDR_FBCS2 (0x04)
1322#define MCF548X_GPIO_PPDSDR_FBCS_PPDSDR_FBCS3 (0x08)
1323#define MCF548X_GPIO_PPDSDR_FBCS_PPDSDR_FBCS4 (0x10)
1324#define MCF548X_GPIO_PPDSDR_FBCS_PPDSDR_FBCS5 (0x20)
1325
1326/* Bit definitions and macros for MCF548X_GPIO_PPDSDR_DMA */
1327#define MCF548X_GPIO_PPDSDR_DMA_PPDSDR_DMA0 (0x01)
1328#define MCF548X_GPIO_PPDSDR_DMA_PPDSDR_DMA1 (0x02)
1329#define MCF548X_GPIO_PPDSDR_DMA_PPDSDR_DMA2 (0x04)
1330#define MCF548X_GPIO_PPDSDR_DMA_PPDSDR_DMA3 (0x08)
1331
1332/* Bit definitions and macros for MCF548X_GPIO_PPDSDR_FEC0H */
1333#define MCF548X_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H0 (0x01)
1334#define MCF548X_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H1 (0x02)
1335#define MCF548X_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H2 (0x04)
1336#define MCF548X_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H3 (0x08)
1337#define MCF548X_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H4 (0x10)
1338#define MCF548X_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H5 (0x20)
1339#define MCF548X_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H6 (0x40)
1340#define MCF548X_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H7 (0x80)
1341
1342/* Bit definitions and macros for MCF548X_GPIO_PPDSDR_FEC0L */
1343#define MCF548X_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L0 (0x01)
1344#define MCF548X_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L1 (0x02)
1345#define MCF548X_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L2 (0x04)
1346#define MCF548X_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L3 (0x08)
1347#define MCF548X_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L4 (0x10)
1348#define MCF548X_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L5 (0x20)
1349#define MCF548X_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L6 (0x40)
1350#define MCF548X_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L7 (0x80)
1351
1352/* Bit definitions and macros for MCF548X_GPIO_PPDSDR_FEC1H */
1353#define MCF548X_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H0 (0x01)
1354#define MCF548X_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H1 (0x02)
1355#define MCF548X_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H2 (0x04)
1356#define MCF548X_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H3 (0x08)
1357#define MCF548X_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H4 (0x10)
1358#define MCF548X_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H5 (0x20)
1359#define MCF548X_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H6 (0x40)
1360#define MCF548X_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H7 (0x80)
1361
1362/* Bit definitions and macros for MCF548X_GPIO_PPDSDR_FEC1L */
1363#define MCF548X_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L0 (0x01)
1364#define MCF548X_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L1 (0x02)
1365#define MCF548X_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L2 (0x04)
1366#define MCF548X_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L3 (0x08)
1367#define MCF548X_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L4 (0x10)
1368#define MCF548X_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L5 (0x20)
1369#define MCF548X_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L6 (0x40)
1370#define MCF548X_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L7 (0x80)
1371
1372/* Bit definitions and macros for MCF548X_GPIO_PPDSDR_FECI2C */
1373#define MCF548X_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C0 (0x01)
1374#define MCF548X_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C1 (0x02)
1375#define MCF548X_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C2 (0x04)
1376#define MCF548X_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C3 (0x08)
1377
1378/* Bit definitions and macros for MCF548X_GPIO_PPDSDR_PCIBG */
1379#define MCF548X_GPIO_PPDSDR_PCIBG_PPDSDR_PCIBG0 (0x01)
1380#define MCF548X_GPIO_PPDSDR_PCIBG_PPDSDR_PCIBG1 (0x02)
1381#define MCF548X_GPIO_PPDSDR_PCIBG_PPDSDR_PCIBG2 (0x04)
1382#define MCF548X_GPIO_PPDSDR_PCIBG_PPDSDR_PCIBG3 (0x08)
1383#define MCF548X_GPIO_PPDSDR_PCIBG_PPDSDR_PCIBG4 (0x10)
1384
1385/* Bit definitions and macros for MCF548X_GPIO_PPDSDR_PCIBR */
1386#define MCF548X_GPIO_PPDSDR_PCIBR_PPDSDR_PCIBR0 (0x01)
1387#define MCF548X_GPIO_PPDSDR_PCIBR_PPDSDR_PCIBR1 (0x02)
1388#define MCF548X_GPIO_PPDSDR_PCIBR_PPDSDR_PCIBR2 (0x04)
1389#define MCF548X_GPIO_PPDSDR_PCIBR_PPDSDR_PCIBR3 (0x08)
1390#define MCF548X_GPIO_PPDSDR_PCIBR_PPDSDR_PCIBR4 (0x10)
1391
1392/* Bit definitions and macros for MCF548X_GPIO_PPDSDR_PSC3PSC2 */
1393#define MCF548X_GPIO_PPDSDR_PSC3PSC2_PPDSDR_PSC3PSC20 (0x01)
1394#define MCF548X_GPIO_PPDSDR_PSC3PSC2_PPDSDR_PSC3PSC21 (0x02)
1395#define MCF548X_GPIO_PPDSDR_PSC3PSC2_PPDSDR_PSC3PSC22 (0x04)
1396#define MCF548X_GPIO_PPDSDR_PSC3PSC2_PPDSDR_PSC3PSC23 (0x08)
1397#define MCF548X_GPIO_PPDSDR_PSC3PSC2_PDDR_PSC3PSC24 (0x10)
1398#define MCF548X_GPIO_PPDSDR_PSC3PSC2_PDDR_PSC3PSC25 (0x20)
1399#define MCF548X_GPIO_PPDSDR_PSC3PSC2_PPDSDR_PSC3PSC26 (0x40)
1400#define MCF548X_GPIO_PPDSDR_PSC3PSC2_PPDSDR_PSC3PSC27 (0x80)
1401
1402/* Bit definitions and macros for MCF548X_GPIO_PPDSDR_PSC1PSC0 */
1403#define MCF548X_GPIO_PPDSDR_PSC1PSC0_PPDSDR_PSC1PSC00 (0x01)
1404#define MCF548X_GPIO_PPDSDR_PSC1PSC0_PDDR_PSC1PSC01 (0x02)
1405#define MCF548X_GPIO_PPDSDR_PSC1PSC0_PPDSDR_PSC1PSC02 (0x04)
1406#define MCF548X_GPIO_PPDSDR_PSC1PSC0_PDDR_PSC1PSC03 (0x08)
1407#define MCF548X_GPIO_PPDSDR_PSC1PSC0_PPDSDR_PSC1PSC04 (0x10)
1408#define MCF548X_GPIO_PPDSDR_PSC1PSC0_PPDSDR_PSC1PSC05 (0x20)
1409#define MCF548X_GPIO_PPDSDR_PSC1PSC0_PPDSDR_PSC1PSC06 (0x40)
1410#define MCF548X_GPIO_PPDSDR_PSC1PSC0_PPDSDR_PSC1PSC07 (0x80)
1411
1412/* Bit definitions and macros for MCF548X_GPIO_PPDSDR_DSPI */
1413#define MCF548X_GPIO_PPDSDR_DSPI_PPDSDR_DSPI0 (0x01)
1414#define MCF548X_GPIO_PPDSDR_DSPI_PPDSDR_DSPI1 (0x02)
1415#define MCF548X_GPIO_PPDSDR_DSPI_PPDSDR_DSPI2 (0x04)
1416#define MCF548X_GPIO_PPDSDR_DSPI_PPDSDR_DSPI3 (0x08)
1417#define MCF548X_GPIO_PPDSDR_DSPI_PDDR_DSPI4 (0x10)
1418#define MCF548X_GPIO_PPDSDR_DSPI_PPDSDR_DSPI5 (0x20)
1419#define MCF548X_GPIO_PPDSDR_DSPI_PPDSDR_DSPI6 (0x40)
1420
1421/* Bit definitions and macros for MCF548X_GPIO_PCLRR_FBCTL */
1422#define MCF548X_GPIO_PCLRR_FBCTL_PCLRR_FBCTL0 (0x01)
1423#define MCF548X_GPIO_PCLRR_FBCTL_PCLRR_FBCTL1 (0x02)
1424#define MCF548X_GPIO_PCLRR_FBCTL_PCLRR_FBCTL2 (0x04)
1425#define MCF548X_GPIO_PCLRR_FBCTL_PCLRR_FBCTL3 (0x08)
1426#define MCF548X_GPIO_PCLRR_FBCTL_PCLRR_FBCTL4 (0x10)
1427#define MCF548X_GPIO_PCLRR_FBCTL_PCLRR_FBCTL5 (0x20)
1428#define MCF548X_GPIO_PCLRR_FBCTL_PCLRR_FBCTL6 (0x40)
1429#define MCF548X_GPIO_PCLRR_FBCTL_PCLRR_FBCTL7 (0x80)
1430
1431/* Bit definitions and macros for MCF548X_GPIO_PCLRR_FBCS */
1432#define MCF548X_GPIO_PCLRR_FBCS_PCLRR_FBCS1 (0x02)
1433#define MCF548X_GPIO_PCLRR_FBCS_PCLRR_FBCS2 (0x04)
1434#define MCF548X_GPIO_PCLRR_FBCS_PCLRR_FBCS3 (0x08)
1435#define MCF548X_GPIO_PCLRR_FBCS_PCLRR_FBCS4 (0x10)
1436#define MCF548X_GPIO_PCLRR_FBCS_PCLRR_FBCS5 (0x20)
1437
1438/* Bit definitions and macros for MCF548X_GPIO_PCLRR_DMA */
1439#define MCF548X_GPIO_PCLRR_DMA_PCLRR_DMA0 (0x01)
1440#define MCF548X_GPIO_PCLRR_DMA_PCLRR_DMA1 (0x02)
1441#define MCF548X_GPIO_PCLRR_DMA_PCLRR_DMA2 (0x04)
1442#define MCF548X_GPIO_PCLRR_DMA_PCLRR_DMA3 (0x08)
1443
1444/* Bit definitions and macros for MCF548X_GPIO_PCLRR_FEC0H */
1445#define MCF548X_GPIO_PCLRR_FEC0H_PCLRR_FEC0H0 (0x01)
1446#define MCF548X_GPIO_PCLRR_FEC0H_PCLRR_FEC0H1 (0x02)
1447#define MCF548X_GPIO_PCLRR_FEC0H_PCLRR_FEC0H2 (0x04)
1448#define MCF548X_GPIO_PCLRR_FEC0H_PCLRR_FEC0H3 (0x08)
1449#define MCF548X_GPIO_PCLRR_FEC0H_PCLRR_FEC0H4 (0x10)
1450#define MCF548X_GPIO_PCLRR_FEC0H_PCLRR_FEC0H5 (0x20)
1451#define MCF548X_GPIO_PCLRR_FEC0H_PCLRR_FEC0H6 (0x40)
1452#define MCF548X_GPIO_PCLRR_FEC0H_PCLRR_FEC0H7 (0x80)
1453
1454/* Bit definitions and macros for MCF548X_GPIO_PCLRR_FEC0L */
1455#define MCF548X_GPIO_PCLRR_FEC0L_PCLRR_FEC0L0 (0x01)
1456#define MCF548X_GPIO_PCLRR_FEC0L_PODR_FEC0L1 (0x02)
1457#define MCF548X_GPIO_PCLRR_FEC0L_PCLRR_FEC0L2 (0x04)
1458#define MCF548X_GPIO_PCLRR_FEC0L_PCLRR_FEC0L3 (0x08)
1459#define MCF548X_GPIO_PCLRR_FEC0L_PODR_FEC0L4 (0x10)
1460#define MCF548X_GPIO_PCLRR_FEC0L_PODR_FEC0L5 (0x20)
1461#define MCF548X_GPIO_PCLRR_FEC0L_PODR_FEC0L6 (0x40)
1462#define MCF548X_GPIO_PCLRR_FEC0L_PCLRR_FEC0L7 (0x80)
1463
1464/* Bit definitions and macros for MCF548X_GPIO_PCLRR_FEC1H */
1465#define MCF548X_GPIO_PCLRR_FEC1H_PCLRR_FEC1H0 (0x01)
1466#define MCF548X_GPIO_PCLRR_FEC1H_PCLRR_FEC1H1 (0x02)
1467#define MCF548X_GPIO_PCLRR_FEC1H_PCLRR_FEC1H2 (0x04)
1468#define MCF548X_GPIO_PCLRR_FEC1H_PODR_FEC1H3 (0x08)
1469#define MCF548X_GPIO_PCLRR_FEC1H_PODR_FEC1H4 (0x10)
1470#define MCF548X_GPIO_PCLRR_FEC1H_PCLRR_FEC1H5 (0x20)
1471#define MCF548X_GPIO_PCLRR_FEC1H_PCLRR_FEC1H6 (0x40)
1472#define MCF548X_GPIO_PCLRR_FEC1H_PCLRR_FEC1H7 (0x80)
1473
1474/* Bit definitions and macros for MCF548X_GPIO_PCLRR_FEC1L */
1475#define MCF548X_GPIO_PCLRR_FEC1L_PCLRR_FEC1L0 (0x01)
1476#define MCF548X_GPIO_PCLRR_FEC1L_PCLRR_FEC1L1 (0x02)
1477#define MCF548X_GPIO_PCLRR_FEC1L_PCLRR_FEC1L2 (0x04)
1478#define MCF548X_GPIO_PCLRR_FEC1L_PCLRR_FEC1L3 (0x08)
1479#define MCF548X_GPIO_PCLRR_FEC1L_PODR_FEC1L4 (0x10)
1480#define MCF548X_GPIO_PCLRR_FEC1L_PCLRR_FEC1L5 (0x20)
1481#define MCF548X_GPIO_PCLRR_FEC1L_PCLRR_FEC1L6 (0x40)
1482#define MCF548X_GPIO_PCLRR_FEC1L_PCLRR_FEC1L7 (0x80)
1483
1484/* Bit definitions and macros for MCF548X_GPIO_PCLRR_FECI2C */
1485#define MCF548X_GPIO_PCLRR_FECI2C_PCLRR_FECI2C0 (0x01)
1486#define MCF548X_GPIO_PCLRR_FECI2C_PCLRR_FECI2C1 (0x02)
1487#define MCF548X_GPIO_PCLRR_FECI2C_PODR_FECI2C2 (0x04)
1488#define MCF548X_GPIO_PCLRR_FECI2C_PCLRR_FECI2C3 (0x08)
1489
1490/* Bit definitions and macros for MCF548X_GPIO_PCLRR_PCIBG */
1491#define MCF548X_GPIO_PCLRR_PCIBG_PODR_PCIBG0 (0x01)
1492#define MCF548X_GPIO_PCLRR_PCIBG_PODR_PCIBG1 (0x02)
1493#define MCF548X_GPIO_PCLRR_PCIBG_PODR_PCIBG2 (0x04)
1494#define MCF548X_GPIO_PCLRR_PCIBG_PCLRR_PCIBG3 (0x08)
1495#define MCF548X_GPIO_PCLRR_PCIBG_PCLRR_PCIBG4 (0x10)
1496
1497/* Bit definitions and macros for MCF548X_GPIO_PCLRR_PCIBR */
1498#define MCF548X_GPIO_PCLRR_PCIBR_PCLRR_PCIBR0 (0x01)
1499#define MCF548X_GPIO_PCLRR_PCIBR_PCLRR_PCIBR1 (0x02)
1500#define MCF548X_GPIO_PCLRR_PCIBR_PCLRR_PCIBR2 (0x04)
1501#define MCF548X_GPIO_PCLRR_PCIBR_PODR_PCIBR3 (0x08)
1502#define MCF548X_GPIO_PCLRR_PCIBR_PODR_PCIBR4 (0x10)
1503
1504/* Bit definitions and macros for MCF548X_GPIO_PCLRR_PSC3PSC2 */
1505#define MCF548X_GPIO_PCLRR_PSC3PSC2_PODR_PSC3PSC20 (0x01)
1506#define MCF548X_GPIO_PCLRR_PSC3PSC2_PODR_PSC3PSC21 (0x02)
1507#define MCF548X_GPIO_PCLRR_PSC3PSC2_PCLRR_PSC3PSC22 (0x04)
1508#define MCF548X_GPIO_PCLRR_PSC3PSC2_PCLRR_PSC3PSC23 (0x08)
1509#define MCF548X_GPIO_PCLRR_PSC3PSC2_PCLRR_PSC3PSC24 (0x10)
1510#define MCF548X_GPIO_PCLRR_PSC3PSC2_PODR_PSC3PSC25 (0x20)
1511#define MCF548X_GPIO_PCLRR_PSC3PSC2_PODR_PSC3PSC26 (0x40)
1512#define MCF548X_GPIO_PCLRR_PSC3PSC2_PCLRR_PSC3PSC27 (0x80)
1513
1514/* Bit definitions and macros for MCF548X_GPIO_PCLRR_PSC1PSC0 */
1515#define MCF548X_GPIO_PCLRR_PSC1PSC0_PCLRR_PSC1PSC00 (0x01)
1516#define MCF548X_GPIO_PCLRR_PSC1PSC0_PCLRR_PSC1PSC01 (0x02)
1517#define MCF548X_GPIO_PCLRR_PSC1PSC0_PCLRR_PSC1PSC02 (0x04)
1518#define MCF548X_GPIO_PCLRR_PSC1PSC0_PCLRR_PSC1PSC03 (0x08)
1519#define MCF548X_GPIO_PCLRR_PSC1PSC0_PCLRR_PSC1PSC04 (0x10)
1520#define MCF548X_GPIO_PCLRR_PSC1PSC0_PCLRR_PSC1PSC05 (0x20)
1521#define MCF548X_GPIO_PCLRR_PSC1PSC0_PODR_PSC1PSC06 (0x40)
1522#define MCF548X_GPIO_PCLRR_PSC1PSC0_PCLRR_PSC1PSC07 (0x80)
1523
1524/* Bit definitions and macros for MCF548X_GPIO_PCLRR_DSPI */
1525#define MCF548X_GPIO_PCLRR_DSPI_PCLRR_DSPI0 (0x01)
1526#define MCF548X_GPIO_PCLRR_DSPI_PCLRR_DSPI1 (0x02)
1527#define MCF548X_GPIO_PCLRR_DSPI_PCLRR_DSPI2 (0x04)
1528#define MCF548X_GPIO_PCLRR_DSPI_PCLRR_DSPI3 (0x08)
1529#define MCF548X_GPIO_PCLRR_DSPI_PCLRR_DSPI4 (0x10)
1530#define MCF548X_GPIO_PCLRR_DSPI_PCLRR_DSPI5 (0x20)
1531#define MCF548X_GPIO_PCLRR_DSPI_PCLRR_DSPI6 (0x40)
1532
1533/* Bit definitions and macros for MCF548X_GPIO_PAR_FBCTL */
1534#define MCF548X_GPIO_PAR_FBCTL_PAR_TS(x) (((x)&0x0003)<<0)
1535#define MCF548X_GPIO_PAR_FBCTL_PAR_TA (0x0004)
1536#define MCF548X_GPIO_PAR_FBCTL_PAR_RWB(x) (((x)&0x0003)<<4)
1537#define MCF548X_GPIO_PAR_FBCTL_PAR_OE (0x0040)
1538#define MCF548X_GPIO_PAR_FBCTL_PAR_BWE0 (0x0100)
1539#define MCF548X_GPIO_PAR_FBCTL_PAR_BWE1 (0x0400)
1540#define MCF548X_GPIO_PAR_FBCTL_PAR_BWE2 (0x1000)
1541#define MCF548X_GPIO_PAR_FBCTL_PAR_BWE3 (0x4000)
1542#define MCF548X_GPIO_PAR_FBCTL_PAR_TS_GPIO (0)
1543#define MCF548X_GPIO_PAR_FBCTL_PAR_TS_TBST (2)
1544#define MCF548X_GPIO_PAR_FBCTL_PAR_TS_TS (3)
1545#define MCF548X_GPIO_PAR_FBCTL_PAR_RWB_GPIO (0x0000)
1546#define MCF548X_GPIO_PAR_FBCTL_PAR_RWB_TBST (0x0020)
1547#define MCF548X_GPIO_PAR_FBCTL_PAR_RWB_RWB (0x0030)
1548
1549/* Bit definitions and macros for MCF548X_GPIO_PAR_FBCS */
1550#define MCF548X_GPIO_PAR_FBCS_PAR_CS1 (0x02)
1551#define MCF548X_GPIO_PAR_FBCS_PAR_CS2 (0x04)
1552#define MCF548X_GPIO_PAR_FBCS_PAR_CS3 (0x08)
1553#define MCF548X_GPIO_PAR_FBCS_PAR_CS4 (0x10)
1554#define MCF548X_GPIO_PAR_FBCS_PAR_CS5 (0x20)
1555
1556/* Bit definitions and macros for MCF548X_GPIO_PAR_DMA */
1557#define MCF548X_GPIO_PAR_DMA_PAR_DREQ0(x) (((x)&0x03)<<0)
1558#define MCF548X_GPIO_PAR_DMA_PAR_DREQ1(x) (((x)&0x03)<<2)
1559#define MCF548X_GPIO_PAR_DMA_PAR_DACK0(x) (((x)&0x03)<<4)
1560#define MCF548X_GPIO_PAR_DMA_PAR_DACK1(x) (((x)&0x03)<<6)
1561#define MCF548X_GPIO_PAR_DMA_PAR_DACKx_GPIO (0)
1562#define MCF548X_GPIO_PAR_DMA_PAR_DACKx_TOUT (2)
1563#define MCF548X_GPIO_PAR_DMA_PAR_DACKx_DACK (3)
1564#define MCF548X_GPIO_PAR_DMA_PAR_DREQx_GPIO (0)
1565#define MCF548X_GPIO_PAR_DMA_PAR_DREQx_TIN (2)
1566#define MCF548X_GPIO_PAR_DMA_PAR_DREQx_DREQ (3)
1567
1568/* Bit definitions and macros for MCF548X_GPIO_PAR_FECI2CIRQ */
1569#define MCF548X_GPIO_PAR_FECI2CIRQ_PAR_IRQ5 (0x0001)
1570#define MCF548X_GPIO_PAR_FECI2CIRQ_PAR_IRQ6 (0x0002)
1571#define MCF548X_GPIO_PAR_FECI2CIRQ_PAR_SCL (0x0004)
1572#define MCF548X_GPIO_PAR_FECI2CIRQ_PAR_SDA (0x0008)
1573#define MCF548X_GPIO_PAR_FECI2CIRQ_PAR_E1MDC(x) (((x)&0x0003)<<6)
1574#define MCF548X_GPIO_PAR_FECI2CIRQ_PAR_E1MDIO(x) (((x)&0x0003)<<8)
1575#define MCF548X_GPIO_PAR_FECI2CIRQ_PAR_E1MII (0x0400)
1576#define MCF548X_GPIO_PAR_FECI2CIRQ_PAR_E17 (0x0800)
1577#define MCF548X_GPIO_PAR_FECI2CIRQ_PAR_E0MDC (0x1000)
1578#define MCF548X_GPIO_PAR_FECI2CIRQ_PAR_E0MDIO (0x2000)
1579#define MCF548X_GPIO_PAR_FECI2CIRQ_PAR_E0MII (0x4000)
1580#define MCF548X_GPIO_PAR_FECI2CIRQ_PAR_E07 (0x8000)
1581#define MCF548X_GPIO_PAR_FECI2CIRQ_PAR_E1MDIO_CANRX (0x0000)
1582#define MCF548X_GPIO_PAR_FECI2CIRQ_PAR_E1MDIO_SDA (0x0200)
1583#define MCF548X_GPIO_PAR_FECI2CIRQ_PAR_E1MDIO_EMDIO (0x0300)
1584#define MCF548X_GPIO_PAR_FECI2CIRQ_PAR_E1MDC_CANTX (0x0000)
1585#define MCF548X_GPIO_PAR_FECI2CIRQ_PAR_E1MDC_SCL (0x0080)
1586#define MCF548X_GPIO_PAR_FECI2CIRQ_PAR_E1MDC_EMDC (0x00C0)
1587
1588/* Bit definitions and macros for MCF548X_GPIO_PAR_PCIBG */
1589#define MCF548X_GPIO_PAR_PCIBG_PAR_PCIBG0(x) (((x)&0x0003)<<0)
1590#define MCF548X_GPIO_PAR_PCIBG_PAR_PCIBG1(x) (((x)&0x0003)<<2)
1591#define MCF548X_GPIO_PAR_PCIBG_PAR_PCIBG2(x) (((x)&0x0003)<<4)
1592#define MCF548X_GPIO_PAR_PCIBG_PAR_PCIBG3(x) (((x)&0x0003)<<6)
1593#define MCF548X_GPIO_PAR_PCIBG_PAR_PCIBG4(x) (((x)&0x0003)<<8)
1594
1595/* Bit definitions and macros for MCF548X_GPIO_PAR_PCIBR */
1596#define MCF548X_GPIO_PAR_PCIBR_PAR_PCIBG0(x) (((x)&0x0003)<<0)
1597#define MCF548X_GPIO_PAR_PCIBR_PAR_PCIBG1(x) (((x)&0x0003)<<2)
1598#define MCF548X_GPIO_PAR_PCIBR_PAR_PCIBG2(x) (((x)&0x0003)<<4)
1599#define MCF548X_GPIO_PAR_PCIBR_PAR_PCIBG3(x) (((x)&0x0003)<<6)
1600#define MCF548X_GPIO_PAR_PCIBR_PAR_PCIBR4(x) (((x)&0x0003)<<8)
1601
1602/* Bit definitions and macros for MCF548X_GPIO_PAR_PSC3 */
1603#define MCF548X_GPIO_PAR_PSC3_PAR_TXD3 (0x04)
1604#define MCF548X_GPIO_PAR_PSC3_PAR_RXD3 (0x08)
1605#define MCF548X_GPIO_PAR_PSC3_PAR_RTS3(x) (((x)&0x03)<<4)
1606#define MCF548X_GPIO_PAR_PSC3_PAR_CTS3(x) (((x)&0x03)<<6)
1607#define MCF548X_GPIO_PAR_PSC3_PAR_CTS3_GPIO (0x00)
1608#define MCF548X_GPIO_PAR_PSC3_PAR_CTS3_BCLK (0x80)
1609#define MCF548X_GPIO_PAR_PSC3_PAR_CTS3_CTS (0xC0)
1610#define MCF548X_GPIO_PAR_PSC3_PAR_RTS3_GPIO (0x00)
1611#define MCF548X_GPIO_PAR_PSC3_PAR_RTS3_FSYNC (0x20)
1612#define MCF548X_GPIO_PAR_PSC3_PAR_RTS3_RTS (0x30)
1613#define MCF548X_GPIO_PAR_PSC3_PAR_CTS2_CANRX (0x40)
1614
1615/* Bit definitions and macros for MCF548X_GPIO_PAR_PSC2 */
1616#define MCF548X_GPIO_PAR_PSC2_PAR_TXD2 (0x04)
1617#define MCF548X_GPIO_PAR_PSC2_PAR_RXD2 (0x08)
1618#define MCF548X_GPIO_PAR_PSC2_PAR_RTS2(x) (((x)&0x03)<<4)
1619#define MCF548X_GPIO_PAR_PSC2_PAR_CTS2(x) (((x)&0x03)<<6)
1620#define MCF548X_GPIO_PAR_PSC2_PAR_CTS2_GPIO (0x00)
1621#define MCF548X_GPIO_PAR_PSC2_PAR_CTS2_BCLK (0x80)
1622#define MCF548X_GPIO_PAR_PSC2_PAR_CTS2_CTS (0xC0)
1623#define MCF548X_GPIO_PAR_PSC2_PAR_RTS2_GPIO (0x00)
1624#define MCF548X_GPIO_PAR_PSC2_PAR_RTS2_CANTX (0x10)
1625#define MCF548X_GPIO_PAR_PSC2_PAR_RTS2_FSYNC (0x20)
1626#define MCF548X_GPIO_PAR_PSC2_PAR_RTS2_RTS (0x30)
1627
1628/* Bit definitions and macros for MCF548X_GPIO_PAR_PSC1 */
1629#define MCF548X_GPIO_PAR_PSC1_PAR_TXD1 (0x04)
1630#define MCF548X_GPIO_PAR_PSC1_PAR_RXD1 (0x08)
1631#define MCF548X_GPIO_PAR_PSC1_PAR_RTS1(x) (((x)&0x03)<<4)
1632#define MCF548X_GPIO_PAR_PSC1_PAR_CTS1(x) (((x)&0x03)<<6)
1633#define MCF548X_GPIO_PAR_PSC1_PAR_CTS1_GPIO (0x00)
1634#define MCF548X_GPIO_PAR_PSC1_PAR_CTS1_BCLK (0x80)
1635#define MCF548X_GPIO_PAR_PSC1_PAR_CTS1_CTS (0xC0)
1636#define MCF548X_GPIO_PAR_PSC1_PAR_RTS1_GPIO (0x00)
1637#define MCF548X_GPIO_PAR_PSC1_PAR_RTS1_FSYNC (0x20)
1638#define MCF548X_GPIO_PAR_PSC1_PAR_RTS1_RTS (0x30)
1639
1640/* Bit definitions and macros for MCF548X_GPIO_PAR_PSC0 */
1641#define MCF548X_GPIO_PAR_PSC0_PAR_TXD0 (0x04)
1642#define MCF548X_GPIO_PAR_PSC0_PAR_RXD0 (0x08)
1643#define MCF548X_GPIO_PAR_PSC0_PAR_RTS0(x) (((x)&0x03)<<4)
1644#define MCF548X_GPIO_PAR_PSC0_PAR_CTS0(x) (((x)&0x03)<<6)
1645#define MCF548X_GPIO_PAR_PSC0_PAR_CTS0_GPIO (0x00)
1646#define MCF548X_GPIO_PAR_PSC0_PAR_CTS0_BCLK (0x80)
1647#define MCF548X_GPIO_PAR_PSC0_PAR_CTS0_CTS (0xC0)
1648#define MCF548X_GPIO_PAR_PSC0_PAR_RTS0_GPIO (0x00)
1649#define MCF548X_GPIO_PAR_PSC0_PAR_RTS0_FSYNC (0x20)
1650#define MCF548X_GPIO_PAR_PSC0_PAR_RTS0_RTS (0x30)
1651
1652/* Bit definitions and macros for MCF548X_GPIO_PAR_DSPI */
1653#define MCF548X_GPIO_PAR_DSPI_PAR_SOUT(x) (((x)&0x0003)<<0)
1654#define MCF548X_GPIO_PAR_DSPI_PAR_SIN(x) (((x)&0x0003)<<2)
1655#define MCF548X_GPIO_PAR_DSPI_PAR_SCK(x) (((x)&0x0003)<<4)
1656#define MCF548X_GPIO_PAR_DSPI_PAR_CS0(x) (((x)&0x0003)<<6)
1657#define MCF548X_GPIO_PAR_DSPI_PAR_CS2(x) (((x)&0x0003)<<8)
1658#define MCF548X_GPIO_PAR_DSPI_PAR_CS3(x) (((x)&0x0003)<<10)
1659#define MCF548X_GPIO_PAR_DSPI_PAR_CS5 (0x1000)
1660#define MCF548X_GPIO_PAR_DSPI_PAR_CS3_GPIO (0x0000)
1661#define MCF548X_GPIO_PAR_DSPI_PAR_CS3_CANTX (0x0400)
1662#define MCF548X_GPIO_PAR_DSPI_PAR_CS3_TOUT (0x0800)
1663#define MCF548X_GPIO_PAR_DSPI_PAR_CS3_DSPICS (0x0C00)
1664#define MCF548X_GPIO_PAR_DSPI_PAR_CS2_GPIO (0x0000)
1665#define MCF548X_GPIO_PAR_DSPI_PAR_CS2_CANTX (0x0100)
1666#define MCF548X_GPIO_PAR_DSPI_PAR_CS2_TOUT (0x0200)
1667#define MCF548X_GPIO_PAR_DSPI_PAR_CS2_DSPICS (0x0300)
1668#define MCF548X_GPIO_PAR_DSPI_PAR_CS0_GPIO (0x0000)
1669#define MCF548X_GPIO_PAR_DSPI_PAR_CS0_FSYNC (0x0040)
1670#define MCF548X_GPIO_PAR_DSPI_PAR_CS0_RTS (0x0080)
1671#define MCF548X_GPIO_PAR_DSPI_PAR_CS0_DSPICS (0x00C0)
1672#define MCF548X_GPIO_PAR_DSPI_PAR_SCK_GPIO (0x0000)
1673#define MCF548X_GPIO_PAR_DSPI_PAR_SCK_BCLK (0x0010)
1674#define MCF548X_GPIO_PAR_DSPI_PAR_SCK_CTS (0x0020)
1675#define MCF548X_GPIO_PAR_DSPI_PAR_SCK_SCK (0x0030)
1676#define MCF548X_GPIO_PAR_DSPI_PAR_SIN_GPIO (0x0000)
1677#define MCF548X_GPIO_PAR_DSPI_PAR_SIN_RXD (0x0008)
1678#define MCF548X_GPIO_PAR_DSPI_PAR_SIN_SIN (0x000C)
1679#define MCF548X_GPIO_PAR_DSPI_PAR_SOUT_GPIO (0x0000)
1680#define MCF548X_GPIO_PAR_DSPI_PAR_SOUT_TXD (0x0002)
1681#define MCF548X_GPIO_PAR_DSPI_PAR_SOUT_SOUT (0x0003)
1682
1683/* Bit definitions and macros for MCF548X_GPIO_PAR_TIMER */
1684#define MCF548X_GPIO_PAR_TIMER_PAR_TOUT2 (0x01)
1685#define MCF548X_GPIO_PAR_TIMER_PAR_TIN2(x) (((x)&0x03)<<1)
1686#define MCF548X_GPIO_PAR_TIMER_PAR_TOUT3 (0x08)
1687#define MCF548X_GPIO_PAR_TIMER_PAR_TIN3(x) (((x)&0x03)<<4)
1688#define MCF548X_GPIO_PAR_TIMER_PAR_TIN3_CANRX (0x00)
1689#define MCF548X_GPIO_PAR_TIMER_PAR_TIN3_IRQ (0x20)
1690#define MCF548X_GPIO_PAR_TIMER_PAR_TIN3_TIN (0x30)
1691#define MCF548X_GPIO_PAR_TIMER_PAR_TIN2_CANRX (0x00)
1692#define MCF548X_GPIO_PAR_TIMER_PAR_TIN2_IRQ (0x04)
1693#define MCF548X_GPIO_PAR_TIMER_PAR_TIN2_TIN (0x06)
1694
1695/*********************************************************************
1696*
1697* General Purpose Timers (GPT)
1698*
1699*********************************************************************/
1700
1701/* Register read/write macros */
1702#define MCF548X_GPT_GMS0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000800)))
1703#define MCF548X_GPT_GCIR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000804)))
1704#define MCF548X_GPT_GPWM0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000808)))
1705#define MCF548X_GPT_GSR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00080C)))
1706#define MCF548X_GPT_GMS1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000810)))
1707#define MCF548X_GPT_GCIR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000814)))
1708#define MCF548X_GPT_GPWM1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000818)))
1709#define MCF548X_GPT_GSR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00081C)))
1710#define MCF548X_GPT_GMS2 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000820)))
1711#define MCF548X_GPT_GCIR2 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000824)))
1712#define MCF548X_GPT_GPWM2 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000828)))
1713#define MCF548X_GPT_GSR2 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00082C)))
1714#define MCF548X_GPT_GMS3 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000830)))
1715#define MCF548X_GPT_GCIR3 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000834)))
1716#define MCF548X_GPT_GPWM3 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000838)))
1717#define MCF548X_GPT_GSR3 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00083C)))
1718#define MCF548X_GPT_GMS(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000800U+((x)*0x010))))
1719#define MCF548X_GPT_GCIR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000804U+((x)*0x010))))
1720#define MCF548X_GPT_GPWM(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000808U+((x)*0x010))))
1721#define MCF548X_GPT_GSR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00080CU+((x)*0x010))))
1722
1723/* Bit definitions and macros for MCF548X_GPT_GMS */
1724#define MCF548X_GPT_GMS_TMS(x) (((x)&0x00000007)<<0)
1725#define MCF548X_GPT_GMS_GPIO(x) (((x)&0x00000003)<<4)
1726#define MCF548X_GPT_GMS_IEN (0x00000100)
1727#define MCF548X_GPT_GMS_OD (0x00000200)
1728#define MCF548X_GPT_GMS_SC (0x00000400)
1729#define MCF548X_GPT_GMS_CE (0x00001000)
1730#define MCF548X_GPT_GMS_WDEN (0x00008000)
1731#define MCF548X_GPT_GMS_ICT(x) (((x)&0x00000003)<<16)
1732#define MCF548X_GPT_GMS_OCT(x) (((x)&0x00000003)<<20)
1733#define MCF548X_GPT_GMS_OCPW(x) (((x)&0x000000FF)<<24)
1734#define MCF548X_GPT_GMS_OCT_FRCLOW (0x00000000)
1735#define MCF548X_GPT_GMS_OCT_PULSEHI (0x00100000)
1736#define MCF548X_GPT_GMS_OCT_PULSELO (0x00200000)
1737#define MCF548X_GPT_GMS_OCT_TOGGLE (0x00300000)
1738#define MCF548X_GPT_GMS_ICT_ANY (0x00000000)
1739#define MCF548X_GPT_GMS_ICT_RISE (0x00010000)
1740#define MCF548X_GPT_GMS_ICT_FALL (0x00020000)
1741#define MCF548X_GPT_GMS_ICT_PULSE (0x00030000)
1742#define MCF548X_GPT_GMS_GPIO_INPUT (0x00000000)
1743#define MCF548X_GPT_GMS_GPIO_OUTLO (0x00000020)
1744#define MCF548X_GPT_GMS_GPIO_OUTHI (0x00000030)
1745#define MCF548X_GPT_GMS_TMS_DISABLE (0x00000000)
1746#define MCF548X_GPT_GMS_TMS_INCAPT (0x00000001)
1747#define MCF548X_GPT_GMS_TMS_OUTCAPT (0x00000002)
1748#define MCF548X_GPT_GMS_TMS_PWM (0x00000003)
1749#define MCF548X_GPT_GMS_TMS_GPIO (0x00000004)
1750
1751/* Bit definitions and macros for MCF548X_GPT_GCIR */
1752#define MCF548X_GPT_GCIR_CNT(x) (((x)&0x0000FFFF)<<0)
1753#define MCF548X_GPT_GCIR_PRE(x) (((x)&0x0000FFFF)<<16)
1754
1755/* Bit definitions and macros for MCF548X_GPT_GPWM */
1756#define MCF548X_GPT_GPWM_LOAD (0x00000001)
1757#define MCF548X_GPT_GPWM_PWMOP (0x00000100)
1758#define MCF548X_GPT_GPWM_WIDTH(x) (((x)&0x0000FFFF)<<16)
1759
1760/* Bit definitions and macros for MCF548X_GPT_GSR */
1761#define MCF548X_GPT_GSR_CAPT (0x00000001)
1762#define MCF548X_GPT_GSR_COMP (0x00000002)
1763#define MCF548X_GPT_GSR_PWMP (0x00000004)
1764#define MCF548X_GPT_GSR_TEXP (0x00000008)
1765#define MCF548X_GPT_GSR_PIN (0x00000100)
1766#define MCF548X_GPT_GSR_OVF(x) (((x)&0x00000007)<<12)
1767#define MCF548X_GPT_GSR_CAPTURE(x) (((x)&0x0000FFFF)<<16)
1768
1769
1770/*********************************************************************
1771*
1772* I2C Module (I2C)
1773*
1774*********************************************************************/
1775
1776/* Register read/write macros */
1777#define MCF548X_I2C_I2AR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008F00)))
1778#define MCF548X_I2C_I2FDR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008F04)))
1779#define MCF548X_I2C_I2CR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008F08)))
1780#define MCF548X_I2C_I2SR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008F0C)))
1781#define MCF548X_I2C_I2DR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008F10)))
1782#define MCF548X_I2C_I2ICR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008F20)))
1783
1784/* Bit definitions and macros for MCF548X_I2C_I2AR */
1785#define MCF548X_I2C_I2AR_ADR(x) (((x)&0x7F)<<1)
1786
1787/* Bit definitions and macros for MCF548X_I2C_I2FDR */
1788#define MCF548X_I2C_I2FDR_IC(x) (((x)&0x3F)<<0)
1789
1790/* Bit definitions and macros for MCF548X_I2C_I2CR */
1791#define MCF548X_I2C_I2CR_RSTA (0x04)
1792#define MCF548X_I2C_I2CR_TXAK (0x08)
1793#define MCF548X_I2C_I2CR_MTX (0x10)
1794#define MCF548X_I2C_I2CR_MSTA (0x20)
1795#define MCF548X_I2C_I2CR_IIEN (0x40)
1796#define MCF548X_I2C_I2CR_IEN (0x80)
1797
1798/* Bit definitions and macros for MCF548X_I2C_I2SR */
1799#define MCF548X_I2C_I2SR_RXAK (0x01)
1800#define MCF548X_I2C_I2SR_IIF (0x02)
1801#define MCF548X_I2C_I2SR_SRW (0x04)
1802#define MCF548X_I2C_I2SR_IAL (0x10)
1803#define MCF548X_I2C_I2SR_IBB (0x20)
1804#define MCF548X_I2C_I2SR_IAAS (0x40)
1805#define MCF548X_I2C_I2SR_ICF (0x80)
1806
1807/* Bit definitions and macros for MCF548X_I2C_I2ICR */
1808#define MCF548X_I2C_I2ICR_IE (0x01)
1809#define MCF548X_I2C_I2ICR_RE (0x02)
1810#define MCF548X_I2C_I2ICR_TE (0x04)
1811#define MCF548X_I2C_I2ICR_BNBE (0x08)
1812
1813/*********************************************************************
1814*
1815* Interrupt Controller (INTC)
1816*
1817*********************************************************************/
1818
1819/* Register read/write macros */
1820#define MCF548X_INTC_IPRH (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000700)))
1821#define MCF548X_INTC_IPRL (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000704)))
1822#define MCF548X_INTC_IMRH (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000708)))
1823#define MCF548X_INTC_IMRL (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00070C)))
1824#define MCF548X_INTC_INTFRCH (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000710)))
1825#define MCF548X_INTC_INTFRCL (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000714)))
1826#define MCF548X_INTC_IRLR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000718)))
1827#define MCF548X_INTC_IACKLPR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000719)))
1828#define MCF548X_INTC_ICR0 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000740)))
1829#define MCF548X_INTC_ICR1 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000741)))
1830#define MCF548X_INTC_ICR2 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000742)))
1831#define MCF548X_INTC_ICR3 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000743)))
1832#define MCF548X_INTC_ICR4 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000744)))
1833#define MCF548X_INTC_ICR5 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000745)))
1834#define MCF548X_INTC_ICR6 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000746)))
1835#define MCF548X_INTC_ICR7 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000747)))
1836#define MCF548X_INTC_ICR8 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000748)))
1837#define MCF548X_INTC_ICR9 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000749)))
1838#define MCF548X_INTC_ICR10 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00074A)))
1839#define MCF548X_INTC_ICR11 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00074B)))
1840#define MCF548X_INTC_ICR12 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00074C)))
1841#define MCF548X_INTC_ICR13 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00074D)))
1842#define MCF548X_INTC_ICR14 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00074E)))
1843#define MCF548X_INTC_ICR15 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00074F)))
1844#define MCF548X_INTC_ICR16 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000750)))
1845#define MCF548X_INTC_ICR17 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000751)))
1846#define MCF548X_INTC_ICR18 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000752)))
1847#define MCF548X_INTC_ICR19 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000753)))
1848#define MCF548X_INTC_ICR20 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000754)))
1849#define MCF548X_INTC_ICR21 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000755)))
1850#define MCF548X_INTC_ICR22 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000756)))
1851#define MCF548X_INTC_ICR23 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000757)))
1852#define MCF548X_INTC_ICR24 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000758)))
1853#define MCF548X_INTC_ICR25 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000759)))
1854#define MCF548X_INTC_ICR26 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00075A)))
1855#define MCF548X_INTC_ICR27 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00075B)))
1856#define MCF548X_INTC_ICR28 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00075C)))
1857#define MCF548X_INTC_ICR29 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00075D)))
1858#define MCF548X_INTC_ICR30 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00075E)))
1859#define MCF548X_INTC_ICR31 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00075F)))
1860#define MCF548X_INTC_ICR32 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000760)))
1861#define MCF548X_INTC_ICR33 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000761)))
1862#define MCF548X_INTC_ICR34 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000762)))
1863#define MCF548X_INTC_ICR35 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000763)))
1864#define MCF548X_INTC_ICR36 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000764)))
1865#define MCF548X_INTC_ICR37 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000765)))
1866#define MCF548X_INTC_ICR38 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000766)))
1867#define MCF548X_INTC_ICR39 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000767)))
1868#define MCF548X_INTC_ICR40 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000768)))
1869#define MCF548X_INTC_ICR41 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000769)))
1870#define MCF548X_INTC_ICR42 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00076A)))
1871#define MCF548X_INTC_ICR43 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00076B)))
1872#define MCF548X_INTC_ICR44 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00076C)))
1873#define MCF548X_INTC_ICR45 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00076D)))
1874#define MCF548X_INTC_ICR46 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00076E)))
1875#define MCF548X_INTC_ICR47 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00076F)))
1876#define MCF548X_INTC_ICR48 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000770)))
1877#define MCF548X_INTC_ICR49 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000771)))
1878#define MCF548X_INTC_ICR50 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000772)))
1879#define MCF548X_INTC_ICR51 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000773)))
1880#define MCF548X_INTC_ICR52 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000774)))
1881#define MCF548X_INTC_ICR53 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000775)))
1882#define MCF548X_INTC_ICR54 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000776)))
1883#define MCF548X_INTC_ICR55 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000777)))
1884#define MCF548X_INTC_ICR56 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000778)))
1885#define MCF548X_INTC_ICR57 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000779)))
1886#define MCF548X_INTC_ICR58 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00077A)))
1887#define MCF548X_INTC_ICR59 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00077B)))
1888#define MCF548X_INTC_ICR60 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00077C)))
1889#define MCF548X_INTC_ICR61 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00077D)))
1890#define MCF548X_INTC_ICR62 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00077E)))
1891#define MCF548X_INTC_ICR63 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00077F)))
1892#define MCF548X_INTC_ICRn(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x000740U+((x)*0x001))))
1893#define MCF548X_INTC_SWIACK (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x0007E0)))
1894#define MCF548X_INTC_L1IACK (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x0007E4)))
1895#define MCF548X_INTC_L2IACK (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x0007E8)))
1896#define MCF548X_INTC_L3IACK (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x0007EC)))
1897#define MCF548X_INTC_L4IACK (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x0007F0)))
1898#define MCF548X_INTC_L5IACK (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x0007F4)))
1899#define MCF548X_INTC_L6IACK (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x0007F8)))
1900#define MCF548X_INTC_L7IACK (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x0007FC)))
1901#define MCF548X_INTC_LnIACK(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x0007E4U+((x)*0x004))))
1902
1903/* Bit definitions and macros for MCF548X_INTC_IPRH */
1904#define MCF548X_INTC_IPRH_INT32 (0x00000001)
1905#define MCF548X_INTC_IPRH_INT33 (0x00000002)
1906#define MCF548X_INTC_IPRH_INT34 (0x00000004)
1907#define MCF548X_INTC_IPRH_INT35 (0x00000008)
1908#define MCF548X_INTC_IPRH_INT36 (0x00000010)
1909#define MCF548X_INTC_IPRH_INT37 (0x00000020)
1910#define MCF548X_INTC_IPRH_INT38 (0x00000040)
1911#define MCF548X_INTC_IPRH_INT39 (0x00000080)
1912#define MCF548X_INTC_IPRH_INT40 (0x00000100)
1913#define MCF548X_INTC_IPRH_INT41 (0x00000200)
1914#define MCF548X_INTC_IPRH_INT42 (0x00000400)
1915#define MCF548X_INTC_IPRH_INT43 (0x00000800)
1916#define MCF548X_INTC_IPRH_INT44 (0x00001000)
1917#define MCF548X_INTC_IPRH_INT45 (0x00002000)
1918#define MCF548X_INTC_IPRH_INT46 (0x00004000)
1919#define MCF548X_INTC_IPRH_INT47 (0x00008000)
1920#define MCF548X_INTC_IPRH_INT48 (0x00010000)
1921#define MCF548X_INTC_IPRH_INT49 (0x00020000)
1922#define MCF548X_INTC_IPRH_INT50 (0x00040000)
1923#define MCF548X_INTC_IPRH_INT51 (0x00080000)
1924#define MCF548X_INTC_IPRH_INT52 (0x00100000)
1925#define MCF548X_INTC_IPRH_INT53 (0x00200000)
1926#define MCF548X_INTC_IPRH_INT54 (0x00400000)
1927#define MCF548X_INTC_IPRH_INT55 (0x00800000)
1928#define MCF548X_INTC_IPRH_INT56 (0x01000000)
1929#define MCF548X_INTC_IPRH_INT57 (0x02000000)
1930#define MCF548X_INTC_IPRH_INT58 (0x04000000)
1931#define MCF548X_INTC_IPRH_INT59 (0x08000000)
1932#define MCF548X_INTC_IPRH_INT60 (0x10000000)
1933#define MCF548X_INTC_IPRH_INT61 (0x20000000)
1934#define MCF548X_INTC_IPRH_INT62 (0x40000000)
1935#define MCF548X_INTC_IPRH_INT63 (0x80000000)
1936
1937/* Bit definitions and macros for MCF548X_INTC_IPRL */
1938#define MCF548X_INTC_IPRL_INT1 (0x00000002)
1939#define MCF548X_INTC_IPRL_INT2 (0x00000004)
1940#define MCF548X_INTC_IPRL_INT3 (0x00000008)
1941#define MCF548X_INTC_IPRL_INT4 (0x00000010)
1942#define MCF548X_INTC_IPRL_INT5 (0x00000020)
1943#define MCF548X_INTC_IPRL_INT6 (0x00000040)
1944#define MCF548X_INTC_IPRL_INT7 (0x00000080)
1945#define MCF548X_INTC_IPRL_INT8 (0x00000100)
1946#define MCF548X_INTC_IPRL_INT9 (0x00000200)
1947#define MCF548X_INTC_IPRL_INT10 (0x00000400)
1948#define MCF548X_INTC_IPRL_INT11 (0x00000800)
1949#define MCF548X_INTC_IPRL_INT12 (0x00001000)
1950#define MCF548X_INTC_IPRL_INT13 (0x00002000)
1951#define MCF548X_INTC_IPRL_INT14 (0x00004000)
1952#define MCF548X_INTC_IPRL_INT15 (0x00008000)
1953#define MCF548X_INTC_IPRL_INT16 (0x00010000)
1954#define MCF548X_INTC_IPRL_INT17 (0x00020000)
1955#define MCF548X_INTC_IPRL_INT18 (0x00040000)
1956#define MCF548X_INTC_IPRL_INT19 (0x00080000)
1957#define MCF548X_INTC_IPRL_INT20 (0x00100000)
1958#define MCF548X_INTC_IPRL_INT21 (0x00200000)
1959#define MCF548X_INTC_IPRL_INT22 (0x00400000)
1960#define MCF548X_INTC_IPRL_INT23 (0x00800000)
1961#define MCF548X_INTC_IPRL_INT24 (0x01000000)
1962#define MCF548X_INTC_IPRL_INT25 (0x02000000)
1963#define MCF548X_INTC_IPRL_INT26 (0x04000000)
1964#define MCF548X_INTC_IPRL_INT27 (0x08000000)
1965#define MCF548X_INTC_IPRL_INT28 (0x10000000)
1966#define MCF548X_INTC_IPRL_INT29 (0x20000000)
1967#define MCF548X_INTC_IPRL_INT30 (0x40000000)
1968#define MCF548X_INTC_IPRL_INT31 (0x80000000)
1969
1970/* Bit definitions and macros for MCF548X_INTC_IMRH */
1971#define MCF548X_INTC_IMRH_INT_MASK32 (0x00000001)
1972#define MCF548X_INTC_IMRH_INT_MASK33 (0x00000002)
1973#define MCF548X_INTC_IMRH_INT_MASK34 (0x00000004)
1974#define MCF548X_INTC_IMRH_INT_MASK35 (0x00000008)
1975#define MCF548X_INTC_IMRH_INT_MASK36 (0x00000010)
1976#define MCF548X_INTC_IMRH_INT_MASK37 (0x00000020)
1977#define MCF548X_INTC_IMRH_INT_MASK38 (0x00000040)
1978#define MCF548X_INTC_IMRH_INT_MASK39 (0x00000080)
1979#define MCF548X_INTC_IMRH_INT_MASK40 (0x00000100)
1980#define MCF548X_INTC_IMRH_INT_MASK41 (0x00000200)
1981#define MCF548X_INTC_IMRH_INT_MASK42 (0x00000400)
1982#define MCF548X_INTC_IMRH_INT_MASK43 (0x00000800)
1983#define MCF548X_INTC_IMRH_INT_MASK44 (0x00001000)
1984#define MCF548X_INTC_IMRH_INT_MASK45 (0x00002000)
1985#define MCF548X_INTC_IMRH_INT_MASK46 (0x00004000)
1986#define MCF548X_INTC_IMRH_INT_MASK47 (0x00008000)
1987#define MCF548X_INTC_IMRH_INT_MASK48 (0x00010000)
1988#define MCF548X_INTC_IMRH_INT_MASK49 (0x00020000)
1989#define MCF548X_INTC_IMRH_INT_MASK50 (0x00040000)
1990#define MCF548X_INTC_IMRH_INT_MASK51 (0x00080000)
1991#define MCF548X_INTC_IMRH_INT_MASK52 (0x00100000)
1992#define MCF548X_INTC_IMRH_INT_MASK53 (0x00200000)
1993#define MCF548X_INTC_IMRH_INT_MASK54 (0x00400000)
1994#define MCF548X_INTC_IMRH_INT_MASK55 (0x00800000)
1995#define MCF548X_INTC_IMRH_INT_MASK56 (0x01000000)
1996#define MCF548X_INTC_IMRH_INT_MASK57 (0x02000000)
1997#define MCF548X_INTC_IMRH_INT_MASK58 (0x04000000)
1998#define MCF548X_INTC_IMRH_INT_MASK59 (0x08000000)
1999#define MCF548X_INTC_IMRH_INT_MASK60 (0x10000000)
2000#define MCF548X_INTC_IMRH_INT_MASK61 (0x20000000)
2001#define MCF548X_INTC_IMRH_INT_MASK62 (0x40000000)
2002#define MCF548X_INTC_IMRH_INT_MASK63 (0x80000000)
2003
2004/* Bit definitions and macros for MCF548X_INTC_IMRL */
2005#define MCF548X_INTC_IMRL_MASKALL (0x00000001)
2006#define MCF548X_INTC_IMRL_INT_MASK1 (0x00000002)
2007#define MCF548X_INTC_IMRL_INT_MASK2 (0x00000004)
2008#define MCF548X_INTC_IMRL_INT_MASK3 (0x00000008)
2009#define MCF548X_INTC_IMRL_INT_MASK4 (0x00000010)
2010#define MCF548X_INTC_IMRL_INT_MASK5 (0x00000020)
2011#define MCF548X_INTC_IMRL_INT_MASK6 (0x00000040)
2012#define MCF548X_INTC_IMRL_INT_MASK7 (0x00000080)
2013#define MCF548X_INTC_IMRL_INT_MASK8 (0x00000100)
2014#define MCF548X_INTC_IMRL_INT_MASK9 (0x00000200)
2015#define MCF548X_INTC_IMRL_INT_MASK10 (0x00000400)
2016#define MCF548X_INTC_IMRL_INT_MASK11 (0x00000800)
2017#define MCF548X_INTC_IMRL_INT_MASK12 (0x00001000)
2018#define MCF548X_INTC_IMRL_INT_MASK13 (0x00002000)
2019#define MCF548X_INTC_IMRL_INT_MASK14 (0x00004000)
2020#define MCF548X_INTC_IMRL_INT_MASK15 (0x00008000)
2021#define MCF548X_INTC_IMRL_INT_MASK16 (0x00010000)
2022#define MCF548X_INTC_IMRL_INT_MASK17 (0x00020000)
2023#define MCF548X_INTC_IMRL_INT_MASK18 (0x00040000)
2024#define MCF548X_INTC_IMRL_INT_MASK19 (0x00080000)
2025#define MCF548X_INTC_IMRL_INT_MASK20 (0x00100000)
2026#define MCF548X_INTC_IMRL_INT_MASK21 (0x00200000)
2027#define MCF548X_INTC_IMRL_INT_MASK22 (0x00400000)
2028#define MCF548X_INTC_IMRL_INT_MASK23 (0x00800000)
2029#define MCF548X_INTC_IMRL_INT_MASK24 (0x01000000)
2030#define MCF548X_INTC_IMRL_INT_MASK25 (0x02000000)
2031#define MCF548X_INTC_IMRL_INT_MASK26 (0x04000000)
2032#define MCF548X_INTC_IMRL_INT_MASK27 (0x08000000)
2033#define MCF548X_INTC_IMRL_INT_MASK28 (0x10000000)
2034#define MCF548X_INTC_IMRL_INT_MASK29 (0x20000000)
2035#define MCF548X_INTC_IMRL_INT_MASK30 (0x40000000)
2036#define MCF548X_INTC_IMRL_INT_MASK31 (0x80000000)
2037
2038/* Bit definitions and macros for MCF548X_INTC_INTFRCH */
2039#define MCF548X_INTC_INTFRCH_INTFRC32 (0x00000001)
2040#define MCF548X_INTC_INTFRCH_INTFRC33 (0x00000002)
2041#define MCF548X_INTC_INTFRCH_INTFRC34 (0x00000004)
2042#define MCF548X_INTC_INTFRCH_INTFRC35 (0x00000008)
2043#define MCF548X_INTC_INTFRCH_INTFRC36 (0x00000010)
2044#define MCF548X_INTC_INTFRCH_INTFRC37 (0x00000020)
2045#define MCF548X_INTC_INTFRCH_INTFRC38 (0x00000040)
2046#define MCF548X_INTC_INTFRCH_INTFRC39 (0x00000080)
2047#define MCF548X_INTC_INTFRCH_INTFRC40 (0x00000100)
2048#define MCF548X_INTC_INTFRCH_INTFRC41 (0x00000200)
2049#define MCF548X_INTC_INTFRCH_INTFRC42 (0x00000400)
2050#define MCF548X_INTC_INTFRCH_INTFRC43 (0x00000800)
2051#define MCF548X_INTC_INTFRCH_INTFRC44 (0x00001000)
2052#define MCF548X_INTC_INTFRCH_INTFRC45 (0x00002000)
2053#define MCF548X_INTC_INTFRCH_INTFRC46 (0x00004000)
2054#define MCF548X_INTC_INTFRCH_INTFRC47 (0x00008000)
2055#define MCF548X_INTC_INTFRCH_INTFRC48 (0x00010000)
2056#define MCF548X_INTC_INTFRCH_INTFRC49 (0x00020000)
2057#define MCF548X_INTC_INTFRCH_INTFRC50 (0x00040000)
2058#define MCF548X_INTC_INTFRCH_INTFRC51 (0x00080000)
2059#define MCF548X_INTC_INTFRCH_INTFRC52 (0x00100000)
2060#define MCF548X_INTC_INTFRCH_INTFRC53 (0x00200000)
2061#define MCF548X_INTC_INTFRCH_INTFRC54 (0x00400000)
2062#define MCF548X_INTC_INTFRCH_INTFRC55 (0x00800000)
2063#define MCF548X_INTC_INTFRCH_INTFRC56 (0x01000000)
2064#define MCF548X_INTC_INTFRCH_INTFRC57 (0x02000000)
2065#define MCF548X_INTC_INTFRCH_INTFRC58 (0x04000000)
2066#define MCF548X_INTC_INTFRCH_INTFRC59 (0x08000000)
2067#define MCF548X_INTC_INTFRCH_INTFRC60 (0x10000000)
2068#define MCF548X_INTC_INTFRCH_INTFRC61 (0x20000000)
2069#define MCF548X_INTC_INTFRCH_INTFRC62 (0x40000000)
2070#define MCF548X_INTC_INTFRCH_INTFRC63 (0x80000000)
2071
2072/* Bit definitions and macros for MCF548X_INTC_INTFRCL */
2073#define MCF548X_INTC_INTFRCL_INTFRC1 (0x00000002)
2074#define MCF548X_INTC_INTFRCL_INTFRC2 (0x00000004)
2075#define MCF548X_INTC_INTFRCL_INTFRC3 (0x00000008)
2076#define MCF548X_INTC_INTFRCL_INTFRC4 (0x00000010)
2077#define MCF548X_INTC_INTFRCL_INTFRC5 (0x00000020)
2078#define MCF548X_INTC_INTFRCL_INT6 (0x00000040)
2079#define MCF548X_INTC_INTFRCL_INT7 (0x00000080)
2080#define MCF548X_INTC_INTFRCL_INT8 (0x00000100)
2081#define MCF548X_INTC_INTFRCL_INT9 (0x00000200)
2082#define MCF548X_INTC_INTFRCL_INT10 (0x00000400)
2083#define MCF548X_INTC_INTFRCL_INTFRC11 (0x00000800)
2084#define MCF548X_INTC_INTFRCL_INTFRC12 (0x00001000)
2085#define MCF548X_INTC_INTFRCL_INTFRC13 (0x00002000)
2086#define MCF548X_INTC_INTFRCL_INTFRC14 (0x00004000)
2087#define MCF548X_INTC_INTFRCL_INT15 (0x00008000)
2088#define MCF548X_INTC_INTFRCL_INTFRC16 (0x00010000)
2089#define MCF548X_INTC_INTFRCL_INTFRC17 (0x00020000)
2090#define MCF548X_INTC_INTFRCL_INTFRC18 (0x00040000)
2091#define MCF548X_INTC_INTFRCL_INTFRC19 (0x00080000)
2092#define MCF548X_INTC_INTFRCL_INTFRC20 (0x00100000)
2093#define MCF548X_INTC_INTFRCL_INTFRC21 (0x00200000)
2094#define MCF548X_INTC_INTFRCL_INTFRC22 (0x00400000)
2095#define MCF548X_INTC_INTFRCL_INTFRC23 (0x00800000)
2096#define MCF548X_INTC_INTFRCL_INTFRC24 (0x01000000)
2097#define MCF548X_INTC_INTFRCL_INTFRC25 (0x02000000)
2098#define MCF548X_INTC_INTFRCL_INTFRC26 (0x04000000)
2099#define MCF548X_INTC_INTFRCL_INTFRC27 (0x08000000)
2100#define MCF548X_INTC_INTFRCL_INTFRC28 (0x10000000)
2101#define MCF548X_INTC_INTFRCL_INTFRC29 (0x20000000)
2102#define MCF548X_INTC_INTFRCL_INTFRC30 (0x40000000)
2103#define MCF548X_INTC_INTFRCL_INTFRC31 (0x80000000)
2104
2105/* Bit definitions and macros for MCF548X_INTC_IRLR */
2106#define MCF548X_INTC_IRLR_IRQ(x) (((x)&0x7F)<<1)
2107
2108/* Bit definitions and macros for MCF548X_INTC_IACKLPR */
2109#define MCF548X_INTC_IACKLPR_PRI(x) (((x)&0x0F)<<0)
2110#define MCF548X_INTC_IACKLPR_LEVEL(x) (((x)&0x07)<<4)
2111
2112/* Bit definitions and macros for MCF548X_INTC_ICRn */
2113#define MCF548X_INTC_ICRn_IP(x) (((x)&0x07)<<0)
2114#define MCF548X_INTC_ICRn_IL(x) (((x)&0x07)<<3)
2115
2116
2117/*********************************************************************
2118*
2119* SDRAM Controller (SDRAMC)
2120*
2121*********************************************************************/
2122
2123/* Register read/write macros */
2124#define MCF548X_SDRAMC_SDRAMDS (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000004)))
2125#define MCF548X_SDRAMC_CS0CFG (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000020)))
2126#define MCF548X_SDRAMC_CS1CFG (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000024)))
2127#define MCF548X_SDRAMC_CS2CFG (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000028)))
2128#define MCF548X_SDRAMC_CS3CFG (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00002C)))
2129#define MCF548X_SDRAMC_CSnCFG(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000020U+((x)*0x004))))
2130#define MCF548X_SDRAMC_SDMR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000100)))
2131#define MCF548X_SDRAMC_SDCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000104)))
2132#define MCF548X_SDRAMC_SDCFG1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000108)))
2133#define MCF548X_SDRAMC_SDCFG2 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00010C)))
2134
2135/* Bit definitions and macros for MCF548X_SDRAMC_SDRAMDS */
2136#define MCF548X_SDRAMC_SDRAMDS_SB_D(x) (((x)&0x00000003)<<0)
2137#define MCF548X_SDRAMC_SDRAMDS_SB_S(x) (((x)&0x00000003)<<2)
2138#define MCF548X_SDRAMC_SDRAMDS_SB_A(x) (((x)&0x00000003)<<4)
2139#define MCF548X_SDRAMC_SDRAMDS_SB_C(x) (((x)&0x00000003)<<6)
2140#define MCF548X_SDRAMC_SDRAMDS_SB_E(x) (((x)&0x00000003)<<8)
2141#define MCF548X_SDRAMC_SDRAMDS_DRIVE_8MA (0x02)
2142#define MCF548X_SDRAMC_SDRAMDS_DRIVE_16MA (0x01)
2143#define MCF548X_SDRAMC_SDRAMDS_DRIVE_24MA (0x00)
2144#define MCF548X_SDRAMC_SDRAMDS_DRIVE_NONE (0x03)
2145
2146/* Bit definitions and macros for MCF548X_SDRAMC_CSnCFG */
2147#define MCF548X_SDRAMC_CSnCFG_CSSZ(x) (((x)&0x0000001F)<<0)
2148#define MCF548X_SDRAMC_CSnCFG_CSBA(x) (((x)&0x00000FFF)<<20)
2149#define MCF548X_SDRAMC_CSnCFG_CSSZ_DIABLE (0x00000000)
2150#define MCF548X_SDRAMC_CSnCFG_CSSZ_1MBYTE (0x00000013)
2151#define MCF548X_SDRAMC_CSnCFG_CSSZ_2MBYTE (0x00000014)
2152#define MCF548X_SDRAMC_CSnCFG_CSSZ_4MBYTE (0x00000015)
2153#define MCF548X_SDRAMC_CSnCFG_CSSZ_8MBYTE (0x00000016)
2154#define MCF548X_SDRAMC_CSnCFG_CSSZ_16MBYTE (0x00000017)
2155#define MCF548X_SDRAMC_CSnCFG_CSSZ_32MBYTE (0x00000018)
2156#define MCF548X_SDRAMC_CSnCFG_CSSZ_64MBYTE (0x00000019)
2157#define MCF548X_SDRAMC_CSnCFG_CSSZ_128MBYTE (0x0000001A)
2158#define MCF548X_SDRAMC_CSnCFG_CSSZ_256MBYTE (0x0000001B)
2159#define MCF548X_SDRAMC_CSnCFG_CSSZ_512MBYTE (0x0000001C)
2160#define MCF548X_SDRAMC_CSnCFG_CSSZ_1GBYTE (0x0000001D)
2161#define MCF548X_SDRAMC_CSnCFG_CSSZ_2GBYTE (0x0000001E)
2162#define MCF548X_SDRAMC_CSnCFG_CSSZ_4GBYTE (0x0000001F)
2163
2164/* Bit definitions and macros for MCF548X_SDRAMC_SDMR */
2165#define MCF548X_SDRAMC_SDMR_CMD (0x00010000)
2166#define MCF548X_SDRAMC_SDMR_AD(x) (((x)&0x00000FFF)<<18)
2167#define MCF548X_SDRAMC_SDMR_BNKAD(x) (((x)&0x00000003)<<30)
2168#define MCF548X_SDRAMC_SDMR_BNKAD_LMR (0x00000000)
2169#define MCF548X_SDRAMC_SDMR_BNKAD_LEMR (0x40000000)
2170
2171/* Bit definitions and macros for MCF548X_SDRAMC_SDCR */
2172#define MCF548X_SDRAMC_SDCR_IPALL (0x00000002)
2173#define MCF548X_SDRAMC_SDCR_IREF (0x00000004)
2174#define MCF548X_SDRAMC_SDCR_BUFF (0x00000010)
2175#define MCF548X_SDRAMC_SDCR_DQS_OE(x) (((x)&0x0000000F)<<8)
2176#define MCF548X_SDRAMC_SDCR_RCNT(x) (((x)&0x0000003F)<<16)
2177#define MCF548X_SDRAMC_SDCR_DRIVE (0x00400000)
2178#define MCF548X_SDRAMC_SDCR_AP (0x00800000)
2179#define MCF548X_SDRAMC_SDCR_MUX(x) (((x)&0x00000003)<<24)
2180#define MCF548X_SDRAMC_SDCR_REF (0x10000000)
2181#define MCF548X_SDRAMC_SDCR_DDR (0x20000000)
2182#define MCF548X_SDRAMC_SDCR_CKE (0x40000000)
2183#define MCF548X_SDRAMC_SDCR_MODE_EN (0x80000000)
2184
2185/* Bit definitions and macros for MCF548X_SDRAMC_SDCFG1 */
2186#define MCF548X_SDRAMC_SDCFG1_WTLAT(x) (((x)&0x00000007)<<4)
2187#define MCF548X_SDRAMC_SDCFG1_REF2ACT(x) (((x)&0x0000000F)<<8)
2188#define MCF548X_SDRAMC_SDCFG1_PRE2ACT(x) (((x)&0x00000007)<<12)
2189#define MCF548X_SDRAMC_SDCFG1_ACT2RW(x) (((x)&0x00000007)<<16)
2190#define MCF548X_SDRAMC_SDCFG1_RDLAT(x) (((x)&0x0000000F)<<20)
2191#define MCF548X_SDRAMC_SDCFG1_SWT2RD(x) (((x)&0x00000007)<<24)
2192#define MCF548X_SDRAMC_SDCFG1_SRD2RW(x) (((x)&0x0000000F)<<28)
2193
2194/* Bit definitions and macros for MCF548X_SDRAMC_SDCFG2 */
2195#define MCF548X_SDRAMC_SDCFG2_BL(x) (((x)&0x0000000F)<<16)
2196#define MCF548X_SDRAMC_SDCFG2_BRD2WT(x) (((x)&0x0000000F)<<20)
2197#define MCF548X_SDRAMC_SDCFG2_BWT2RW(x) (((x)&0x0000000F)<<24)
2198#define MCF548X_SDRAMC_SDCFG2_BRD2PRE(x) (((x)&0x0000000F)<<28)
2199
2200/*********************************************************************
2201*
2202* Integrated Security Engine (SEC)
2203*
2204*********************************************************************/
2205
2206/* Register read/write macros */
2207#define MCF548X_SEC_EUACRH (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x021000)))
2208#define MCF548X_SEC_EUACRL (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x021004)))
2209#define MCF548X_SEC_EUASRH (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x021028)))
2210#define MCF548X_SEC_EUASRL (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x02102C)))
2211#define MCF548X_SEC_SIMRH (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x021008)))
2212#define MCF548X_SEC_SIMRL (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x02100C)))
2213#define MCF548X_SEC_SISRH (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x021010)))
2214#define MCF548X_SEC_SISRL (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x021014)))
2215#define MCF548X_SEC_SICRH (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x021018)))
2216#define MCF548X_SEC_SICRL (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x02101C)))
2217#define MCF548X_SEC_SIDR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x021020)))
2218#define MCF548X_SEC_SMCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x021030)))
2219#define MCF548X_SEC_MEAR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x021038)))
2220#define MCF548X_SEC_CCCR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x02200C)))
2221#define MCF548X_SEC_CCCR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x02300C)))
2222#define MCF548X_SEC_CCPSRH0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x022010)))
2223#define MCF548X_SEC_CCPSRH1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x023010)))
2224#define MCF548X_SEC_CCPSRL0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x022014)))
2225#define MCF548X_SEC_CCPSRL1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x023014)))
2226#define MCF548X_SEC_CDPR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x022044)))
2227#define MCF548X_SEC_CDPR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x023044)))
2228#define MCF548X_SEC_FR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x02204C)))
2229#define MCF548X_SEC_FR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x02304C)))
2230#define MCF548X_SEC_AFRCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x028018)))
2231#define MCF548X_SEC_AFSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x028028)))
2232#define MCF548X_SEC_AFISR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x028030)))
2233#define MCF548X_SEC_AFIMR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x028038)))
2234#define MCF548X_SEC_DRCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x02A018)))
2235#define MCF548X_SEC_DSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x02A028)))
2236#define MCF548X_SEC_DISR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x02A030)))
2237#define MCF548X_SEC_DIMR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x02A038)))
2238#define MCF548X_SEC_MDRCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x02C018)))
2239#define MCF548X_SEC_MDSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x02C028)))
2240#define MCF548X_SEC_MDISR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x02C030)))
2241#define MCF548X_SEC_MDIMR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x02C038)))
2242#define MCF548X_SEC_RNGRCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x02E018)))
2243#define MCF548X_SEC_RNGSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x02E028)))
2244#define MCF548X_SEC_RNGISR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x02E030)))
2245#define MCF548X_SEC_RNGIMR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x02E038)))
2246#define MCF548X_SEC_AESRCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x032018)))
2247#define MCF548X_SEC_AESSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x032028)))
2248#define MCF548X_SEC_AESISR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x032030)))
2249#define MCF548X_SEC_AESIMR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x032038)))
2250
2251/* Bit definitions and macros for MCF548X_SEC_EUACRH */
2252#define MCF548X_SEC_EUACRH_AFEU(x) (((x)&0x0000000F)<<0)
2253#define MCF548X_SEC_EUACRH_MDEU(x) (((x)&0x0000000F)<<8)
2254#define MCF548X_SEC_EUACRH_RNG(x) (((x)&0x0000000F)<<24)
2255#define MCF548X_SEC_EUACRH_RNG_NOASSIGN (0x00000000)
2256#define MCF548X_SEC_EUACRH_RNG_CHA0 (0x01000000)
2257#define MCF548X_SEC_EUACRH_RNG_CHA1 (0x02000000)
2258#define MCF548X_SEC_EUACRH_MDEU_NOASSIGN (0x00000000)
2259#define MCF548X_SEC_EUACRH_MDEU_CHA0 (0x00000100)
2260#define MCF548X_SEC_EUACRH_MDEU_CHA1 (0x00000200)
2261#define MCF548X_SEC_EUACRH_AFEU_NOASSIGN (0x00000000)
2262#define MCF548X_SEC_EUACRH_AFEU_CHA0 (0x00000001)
2263#define MCF548X_SEC_EUACRH_AFEU_CHA1 (0x00000002)
2264
2265/* Bit definitions and macros for MCF548X_SEC_EUACRL */
2266#define MCF548X_SEC_EUACRL_AESU(x) (((x)&0x0000000F)<<16)
2267#define MCF548X_SEC_EUACRL_DEU(x) (((x)&0x0000000F)<<24)
2268#define MCF548X_SEC_EUACRL_DEU_NOASSIGN (0x00000000)
2269#define MCF548X_SEC_EUACRL_DEU_CHA0 (0x01000000)
2270#define MCF548X_SEC_EUACRL_DEU_CHA1 (0x02000000)
2271#define MCF548X_SEC_EUACRL_AESU_NOASSIGN (0x00000000)
2272#define MCF548X_SEC_EUACRL_AESU_CHA0 (0x00010000)
2273#define MCF548X_SEC_EUACRL_AESU_CHA1 (0x00020000)
2274
2275/* Bit definitions and macros for MCF548X_SEC_EUASRH */
2276#define MCF548X_SEC_EUASRH_AFEU(x) (((x)&0x0000000F)<<0)
2277#define MCF548X_SEC_EUASRH_MDEU(x) (((x)&0x0000000F)<<8)
2278#define MCF548X_SEC_EUASRH_RNG(x) (((x)&0x0000000F)<<24)
2279
2280/* Bit definitions and macros for MCF548X_SEC_EUASRL */
2281#define MCF548X_SEC_EUASRL_AESU(x) (((x)&0x0000000F)<<16)
2282#define MCF548X_SEC_EUASRL_DEU(x) (((x)&0x0000000F)<<24)
2283
2284/* Bit definitions and macros for MCF548X_SEC_SIMRH */
2285#define MCF548X_SEC_SIMRH_AERR (0x08000000)
2286#define MCF548X_SEC_SIMRH_CHA0DN (0x10000000)
2287#define MCF548X_SEC_SIMRH_CHA0ERR (0x20000000)
2288#define MCF548X_SEC_SIMRH_CHA1DN (0x40000000)
2289#define MCF548X_SEC_SIMRH_CHA1ERR (0x80000000)
2290
2291/* Bit definitions and macros for MCF548X_SEC_SIMRL */
2292#define MCF548X_SEC_SIMRL_TEA (0x00000040)
2293#define MCF548X_SEC_SIMRL_DEUDN (0x00000100)
2294#define MCF548X_SEC_SIMRL_DEUERR (0x00000200)
2295#define MCF548X_SEC_SIMRL_AESUDN (0x00001000)
2296#define MCF548X_SEC_SIMRL_AESUERR (0x00002000)
2297#define MCF548X_SEC_SIMRL_MDEUDN (0x00010000)
2298#define MCF548X_SEC_SIMRL_MDEUERR (0x00020000)
2299#define MCF548X_SEC_SIMRL_AFEUDN (0x00100000)
2300#define MCF548X_SEC_SIMRL_AFEUERR (0x00200000)
2301#define MCF548X_SEC_SIMRL_RNGDN (0x01000000)
2302#define MCF548X_SEC_SIMRL_RNGERR (0x02000000)
2303
2304/* Bit definitions and macros for MCF548X_SEC_SISRH */
2305#define MCF548X_SEC_SISRH_AERR (0x08000000)
2306#define MCF548X_SEC_SISRH_CHA0DN (0x10000000)
2307#define MCF548X_SEC_SISRH_CHA0ERR (0x20000000)
2308#define MCF548X_SEC_SISRH_CHA1DN (0x40000000)
2309#define MCF548X_SEC_SISRH_CHA1ERR (0x80000000)
2310
2311/* Bit definitions and macros for MCF548X_SEC_SISRL */
2312#define MCF548X_SEC_SISRL_TEA (0x00000040)
2313#define MCF548X_SEC_SISRL_DEUDN (0x00000100)
2314#define MCF548X_SEC_SISRL_DEUERR (0x00000200)
2315#define MCF548X_SEC_SISRL_AESUDN (0x00001000)
2316#define MCF548X_SEC_SISRL_AESUERR (0x00002000)
2317#define MCF548X_SEC_SISRL_MDEUDN (0x00010000)
2318#define MCF548X_SEC_SISRL_MDEUERR (0x00020000)
2319#define MCF548X_SEC_SISRL_AFEUDN (0x00100000)
2320#define MCF548X_SEC_SISRL_AFEUERR (0x00200000)
2321#define MCF548X_SEC_SISRL_RNGDN (0x01000000)
2322#define MCF548X_SEC_SISRL_RNGERR (0x02000000)
2323
2324/* Bit definitions and macros for MCF548X_SEC_SICRH */
2325#define MCF548X_SEC_SICRH_AERR (0x08000000)
2326#define MCF548X_SEC_SICRH_CHA0DN (0x10000000)
2327#define MCF548X_SEC_SICRH_CHA0ERR (0x20000000)
2328#define MCF548X_SEC_SICRH_CHA1DN (0x40000000)
2329#define MCF548X_SEC_SICRH_CHA1ERR (0x80000000)
2330
2331/* Bit definitions and macros for MCF548X_SEC_SICRL */
2332#define MCF548X_SEC_SICRL_TEA (0x00000040)
2333#define MCF548X_SEC_SICRL_DEUDN (0x00000100)
2334#define MCF548X_SEC_SICRL_DEUERR (0x00000200)
2335#define MCF548X_SEC_SICRL_AESUDN (0x00001000)
2336#define MCF548X_SEC_SICRL_AESUERR (0x00002000)
2337#define MCF548X_SEC_SICRL_MDEUDN (0x00010000)
2338#define MCF548X_SEC_SICRL_MDEUERR (0x00020000)
2339#define MCF548X_SEC_SICRL_AFEUDN (0x00100000)
2340#define MCF548X_SEC_SICRL_AFEUERR (0x00200000)
2341#define MCF548X_SEC_SICRL_RNGDN (0x01000000)
2342#define MCF548X_SEC_SICRL_RNGERR (0x02000000)
2343
2344/* Bit definitions and macros for MCF548X_SEC_SMCR */
2345#define MCF548X_SEC_SMCR_CURR_CHAN(x) (((x)&0x0000000F)<<4)
2346#define MCF548X_SEC_SMCR_SWR (0x01000000)
2347#define MCF548X_SEC_SMCR_CURR_CHAN_1 (0x00000010)
2348#define MCF548X_SEC_SMCR_CURR_CHAN_2 (0x00000020)
2349
2350/* Bit definitions and macros for MCF548X_SEC_CCCRn */
2351#define MCF548X_SEC_CCCRn_RST (0x00000001)
2352#define MCF548X_SEC_CCCRn_CDIE (0x00000002)
2353#define MCF548X_SEC_CCCRn_NT (0x00000004)
2354#define MCF548X_SEC_CCCRn_NE (0x00000008)
2355#define MCF548X_SEC_CCCRn_WE (0x00000010)
2356#define MCF548X_SEC_CCCRn_BURST_SIZE(x) (((x)&0x00000007)<<8)
2357#define MCF548X_SEC_CCCRn_BURST_SIZE_2 (0x00000000)
2358#define MCF548X_SEC_CCCRn_BURST_SIZE_8 (0x00000100)
2359#define MCF548X_SEC_CCCRn_BURST_SIZE_16 (0x00000200)
2360#define MCF548X_SEC_CCCRn_BURST_SIZE_24 (0x00000300)
2361#define MCF548X_SEC_CCCRn_BURST_SIZE_32 (0x00000400)
2362#define MCF548X_SEC_CCCRn_BURST_SIZE_40 (0x00000500)
2363#define MCF548X_SEC_CCCRn_BURST_SIZE_48 (0x00000600)
2364#define MCF548X_SEC_CCCRn_BURST_SIZE_56 (0x00000700)
2365
2366/* Bit definitions and macros for MCF548X_SEC_CCPSRHn */
2367#define MCF548X_SEC_CCPSRHn_STATE(x) (((x)&0x000000FF)<<0)
2368
2369/* Bit definitions and macros for MCF548X_SEC_CCPSRLn */
2370#define MCF548X_SEC_CCPSRLn_PAIR_PTR(x) (((x)&0x000000FF)<<0)
2371#define MCF548X_SEC_CCPSRLn_EUERR (0x00000100)
2372#define MCF548X_SEC_CCPSRLn_SERR (0x00000200)
2373#define MCF548X_SEC_CCPSRLn_DERR (0x00000400)
2374#define MCF548X_SEC_CCPSRLn_PERR (0x00001000)
2375#define MCF548X_SEC_CCPSRLn_TEA (0x00002000)
2376#define MCF548X_SEC_CCPSRLn_SD (0x00010000)
2377#define MCF548X_SEC_CCPSRLn_PD (0x00020000)
2378#define MCF548X_SEC_CCPSRLn_SRD (0x00040000)
2379#define MCF548X_SEC_CCPSRLn_PRD (0x00080000)
2380#define MCF548X_SEC_CCPSRLn_SG (0x00100000)
2381#define MCF548X_SEC_CCPSRLn_PG (0x00200000)
2382#define MCF548X_SEC_CCPSRLn_SR (0x00400000)
2383#define MCF548X_SEC_CCPSRLn_PR (0x00800000)
2384#define MCF548X_SEC_CCPSRLn_MO (0x01000000)
2385#define MCF548X_SEC_CCPSRLn_MI (0x02000000)
2386#define MCF548X_SEC_CCPSRLn_STAT (0x04000000)
2387
2388/* Bit definitions and macros for MCF548X_SEC_AFRCR */
2389#define MCF548X_SEC_AFRCR_SR (0x01000000)
2390#define MCF548X_SEC_AFRCR_MI (0x02000000)
2391#define MCF548X_SEC_AFRCR_RI (0x04000000)
2392
2393/* Bit definitions and macros for MCF548X_SEC_AFSR */
2394#define MCF548X_SEC_AFSR_RD (0x01000000)
2395#define MCF548X_SEC_AFSR_ID (0x02000000)
2396#define MCF548X_SEC_AFSR_IE (0x04000000)
2397#define MCF548X_SEC_AFSR_OFE (0x08000000)
2398#define MCF548X_SEC_AFSR_IFW (0x10000000)
2399#define MCF548X_SEC_AFSR_HALT (0x20000000)
2400
2401/* Bit definitions and macros for MCF548X_SEC_AFISR */
2402#define MCF548X_SEC_AFISR_DSE (0x00010000)
2403#define MCF548X_SEC_AFISR_KSE (0x00020000)
2404#define MCF548X_SEC_AFISR_CE (0x00040000)
2405#define MCF548X_SEC_AFISR_ERE (0x00080000)
2406#define MCF548X_SEC_AFISR_IE (0x00100000)
2407#define MCF548X_SEC_AFISR_OFU (0x02000000)
2408#define MCF548X_SEC_AFISR_IFO (0x04000000)
2409#define MCF548X_SEC_AFISR_IFE (0x10000000)
2410#define MCF548X_SEC_AFISR_OFE (0x20000000)
2411#define MCF548X_SEC_AFISR_AE (0x40000000)
2412#define MCF548X_SEC_AFISR_ME (0x80000000)
2413
2414/* Bit definitions and macros for MCF548X_SEC_AFIMR */
2415#define MCF548X_SEC_AFIMR_DSE (0x00010000)
2416#define MCF548X_SEC_AFIMR_KSE (0x00020000)
2417#define MCF548X_SEC_AFIMR_CE (0x00040000)
2418#define MCF548X_SEC_AFIMR_ERE (0x00080000)
2419#define MCF548X_SEC_AFIMR_IE (0x00100000)
2420#define MCF548X_SEC_AFIMR_OFU (0x02000000)
2421#define MCF548X_SEC_AFIMR_IFO (0x04000000)
2422#define MCF548X_SEC_AFIMR_IFE (0x10000000)
2423#define MCF548X_SEC_AFIMR_OFE (0x20000000)
2424#define MCF548X_SEC_AFIMR_AE (0x40000000)
2425#define MCF548X_SEC_AFIMR_ME (0x80000000)
2426
2427/* Bit definitions and macros for MCF548X_SEC_DRCR */
2428#define MCF548X_SEC_DRCR_SR (0x01000000)
2429#define MCF548X_SEC_DRCR_MI (0x02000000)
2430#define MCF548X_SEC_DRCR_RI (0x04000000)
2431
2432/* Bit definitions and macros for MCF548X_SEC_DSR */
2433#define MCF548X_SEC_DSR_RD (0x01000000)
2434#define MCF548X_SEC_DSR_ID (0x02000000)
2435#define MCF548X_SEC_DSR_IE (0x04000000)
2436#define MCF548X_SEC_DSR_OFR (0x08000000)
2437#define MCF548X_SEC_DSR_IFW (0x10000000)
2438#define MCF548X_SEC_DSR_HALT (0x20000000)
2439
2440/* Bit definitions and macros for MCF548X_SEC_DISR */
2441#define MCF548X_SEC_DISR_DSE (0x00010000)
2442#define MCF548X_SEC_DISR_KSE (0x00020000)
2443#define MCF548X_SEC_DISR_CE (0x00040000)
2444#define MCF548X_SEC_DISR_ERE (0x00080000)
2445#define MCF548X_SEC_DISR_IE (0x00100000)
2446#define MCF548X_SEC_DISR_KPE (0x00200000)
2447#define MCF548X_SEC_DISR_OFU (0x02000000)
2448#define MCF548X_SEC_DISR_IFO (0x04000000)
2449#define MCF548X_SEC_DISR_IFE (0x10000000)
2450#define MCF548X_SEC_DISR_OFE (0x20000000)
2451#define MCF548X_SEC_DISR_AE (0x40000000)
2452#define MCF548X_SEC_DISR_ME (0x80000000)
2453
2454/* Bit definitions and macros for MCF548X_SEC_DIMR */
2455#define MCF548X_SEC_DIMR_DSE (0x00010000)
2456#define MCF548X_SEC_DIMR_KSE (0x00020000)
2457#define MCF548X_SEC_DIMR_CE (0x00040000)
2458#define MCF548X_SEC_DIMR_ERE (0x00080000)
2459#define MCF548X_SEC_DIMR_IE (0x00100000)
2460#define MCF548X_SEC_DIMR_KPE (0x00200000)
2461#define MCF548X_SEC_DIMR_OFU (0x02000000)
2462#define MCF548X_SEC_DIMR_IFO (0x04000000)
2463#define MCF548X_SEC_DIMR_IFE (0x10000000)
2464#define MCF548X_SEC_DIMR_OFE (0x20000000)
2465#define MCF548X_SEC_DIMR_AE (0x40000000)
2466#define MCF548X_SEC_DIMR_ME (0x80000000)
2467
2468/* Bit definitions and macros for MCF548X_SEC_MDRCR */
2469#define MCF548X_SEC_MDRCR_SR (0x01000000)
2470#define MCF548X_SEC_MDRCR_MI (0x02000000)
2471#define MCF548X_SEC_MDRCR_RI (0x04000000)
2472
2473/* Bit definitions and macros for MCF548X_SEC_MDSR */
2474#define MCF548X_SEC_MDSR_RD (0x01000000)
2475#define MCF548X_SEC_MDSR_ID (0x02000000)
2476#define MCF548X_SEC_MDSR_IE (0x04000000)
2477#define MCF548X_SEC_MDSR_IFW (0x10000000)
2478#define MCF548X_SEC_MDSR_HALT (0x20000000)
2479
2480/* Bit definitions and macros for MCF548X_SEC_MDISR */
2481#define MCF548X_SEC_MDISR_DSE (0x00010000)
2482#define MCF548X_SEC_MDISR_KSE (0x00020000)
2483#define MCF548X_SEC_MDISR_CE (0x00040000)
2484#define MCF548X_SEC_MDISR_ERE (0x00080000)
2485#define MCF548X_SEC_MDISR_IE (0x00100000)
2486#define MCF548X_SEC_MDISR_IFO (0x04000000)
2487#define MCF548X_SEC_MDISR_AE (0x40000000)
2488#define MCF548X_SEC_MDISR_ME (0x80000000)
2489
2490/* Bit definitions and macros for MCF548X_SEC_MDIMR */
2491#define MCF548X_SEC_MDIMR_DSE (0x00010000)
2492#define MCF548X_SEC_MDIMR_KSE (0x00020000)
2493#define MCF548X_SEC_MDIMR_CE (0x00040000)
2494#define MCF548X_SEC_MDIMR_ERE (0x00080000)
2495#define MCF548X_SEC_MDIMR_IE (0x00100000)
2496#define MCF548X_SEC_MDIMR_IFO (0x04000000)
2497#define MCF548X_SEC_MDIMR_AE (0x40000000)
2498#define MCF548X_SEC_MDIMR_ME (0x80000000)
2499
2500/* Bit definitions and macros for MCF548X_SEC_RNGRCR */
2501#define MCF548X_SEC_RNGRCR_SR (0x01000000)
2502#define MCF548X_SEC_RNGRCR_MI (0x02000000)
2503#define MCF548X_SEC_RNGRCR_RI (0x04000000)
2504
2505/* Bit definitions and macros for MCF548X_SEC_RNGSR */
2506#define MCF548X_SEC_RNGSR_RD (0x01000000)
2507#define MCF548X_SEC_RNGSR_O (0x02000000)
2508#define MCF548X_SEC_RNGSR_IE (0x04000000)
2509#define MCF548X_SEC_RNGSR_OFR (0x08000000)
2510#define MCF548X_SEC_RNGSR_HALT (0x20000000)
2511
2512/* Bit definitions and macros for MCF548X_SEC_RNGISR */
2513#define MCF548X_SEC_RNGISR_IE (0x00100000)
2514#define MCF548X_SEC_RNGISR_OFU (0x02000000)
2515#define MCF548X_SEC_RNGISR_AE (0x40000000)
2516#define MCF548X_SEC_RNGISR_ME (0x80000000)
2517
2518/* Bit definitions and macros for MCF548X_SEC_RNGIMR */
2519#define MCF548X_SEC_RNGIMR_IE (0x00100000)
2520#define MCF548X_SEC_RNGIMR_OFU (0x02000000)
2521#define MCF548X_SEC_RNGIMR_AE (0x40000000)
2522#define MCF548X_SEC_RNGIMR_ME (0x80000000)
2523
2524/* Bit definitions and macros for MCF548X_SEC_AESRCR */
2525#define MCF548X_SEC_AESRCR_SR (0x01000000)
2526#define MCF548X_SEC_AESRCR_MI (0x02000000)
2527#define MCF548X_SEC_AESRCR_RI (0x04000000)
2528
2529/* Bit definitions and macros for MCF548X_SEC_AESSR */
2530#define MCF548X_SEC_AESSR_RD (0x01000000)
2531#define MCF548X_SEC_AESSR_ID (0x02000000)
2532#define MCF548X_SEC_AESSR_IE (0x04000000)
2533#define MCF548X_SEC_AESSR_OFR (0x08000000)
2534#define MCF548X_SEC_AESSR_IFW (0x10000000)
2535#define MCF548X_SEC_AESSR_HALT (0x20000000)
2536
2537/* Bit definitions and macros for MCF548X_SEC_AESISR */
2538#define MCF548X_SEC_AESISR_DSE (0x00010000)
2539#define MCF548X_SEC_AESISR_KSE (0x00020000)
2540#define MCF548X_SEC_AESISR_CE (0x00040000)
2541#define MCF548X_SEC_AESISR_ERE (0x00080000)
2542#define MCF548X_SEC_AESISR_IE (0x00100000)
2543#define MCF548X_SEC_AESISR_OFU (0x02000000)
2544#define MCF548X_SEC_AESISR_IFO (0x04000000)
2545#define MCF548X_SEC_AESISR_IFE (0x10000000)
2546#define MCF548X_SEC_AESISR_OFE (0x20000000)
2547#define MCF548X_SEC_AESISR_AE (0x40000000)
2548#define MCF548X_SEC_AESISR_ME (0x80000000)
2549
2550/* Bit definitions and macros for MCF548X_SEC_AESIMR */
2551#define MCF548X_SEC_AESIMR_DSE (0x00010000)
2552#define MCF548X_SEC_AESIMR_KSE (0x00020000)
2553#define MCF548X_SEC_AESIMR_CE (0x00040000)
2554#define MCF548X_SEC_AESIMR_ERE (0x00080000)
2555#define MCF548X_SEC_AESIMR_IE (0x00100000)
2556#define MCF548X_SEC_AESIMR_OFU (0x02000000)
2557#define MCF548X_SEC_AESIMR_IFO (0x04000000)
2558#define MCF548X_SEC_AESIMR_IFE (0x10000000)
2559#define MCF548X_SEC_AESIMR_OFE (0x20000000)
2560#define MCF548X_SEC_AESIMR_AE (0x40000000)
2561#define MCF548X_SEC_AESIMR_ME (0x80000000)
2562
2563
2564/*********************************************************************
2565*
2566* Slice Timers (SLT)
2567*
2568*********************************************************************/
2569
2570/* Register read/write macros */
2571#define MCF548X_SLT_SLTCNT0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000900)))
2572#define MCF548X_SLT_SCR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000904)))
2573#define MCF548X_SLT_SCNT0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000908)))
2574#define MCF548X_SLT_SSR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00090C)))
2575#define MCF548X_SLT_SLTCNT1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000910)))
2576#define MCF548X_SLT_SCR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000914)))
2577#define MCF548X_SLT_SCNT1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000918)))
2578#define MCF548X_SLT_SSR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00091C)))
2579#define MCF548X_SLT_SLTCNT(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000900U+((x)*0x010))))
2580#define MCF548X_SLT_SCR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000904U+((x)*0x010))))
2581#define MCF548X_SLT_SCNT(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000908U+((x)*0x010))))
2582#define MCF548X_SLT_SSR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00090CU+((x)*0x010))))
2583
2584/* Bit definitions and macros for MCF548X_SLT_SCR */
2585#define MCF548X_SLT_SCR_TEN (0x01000000)
2586#define MCF548X_SLT_SCR_IEN (0x02000000)
2587#define MCF548X_SLT_SCR_RUN (0x04000000)
2588
2589/* Bit definitions and macros for MCF548X_SLT_SSR */
2590#define MCF548X_SLT_SSR_ST (0x01000000)
2591#define MCF548X_SLT_SSR_BE (0x02000000)
2592
2593
2594/*********************************************************************
2595*
2596* Universal Serial Bus (USB)
2597*
2598*********************************************************************/
2599
2600/* Register read/write macros */
2601#define MCF548X_USB_USBAISR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B000)))
2602#define MCF548X_USB_USBAIMR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B001)))
2603#define MCF548X_USB_EPINFO (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B003)))
2604#define MCF548X_USB_CFGR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B004)))
2605#define MCF548X_USB_CFGAR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B005)))
2606#define MCF548X_USB_SPEEDR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B006)))
2607#define MCF548X_USB_FRMNUMR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B00E)))
2608#define MCF548X_USB_EPTNR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B010)))
2609#define MCF548X_USB_IFUR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B014)))
2610#define MCF548X_USB_IFR0 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B040)))
2611#define MCF548X_USB_IFR1 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B042)))
2612#define MCF548X_USB_IFR2 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B044)))
2613#define MCF548X_USB_IFR3 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B046)))
2614#define MCF548X_USB_IFR4 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B048)))
2615#define MCF548X_USB_IFR5 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B04A)))
2616#define MCF548X_USB_IFR6 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B04C)))
2617#define MCF548X_USB_IFR7 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B04E)))
2618#define MCF548X_USB_IFR8 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B050)))
2619#define MCF548X_USB_IFR9 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B052)))
2620#define MCF548X_USB_IFR10 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B054)))
2621#define MCF548X_USB_IFR11 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B056)))
2622#define MCF548X_USB_IFR12 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B058)))
2623#define MCF548X_USB_IFR13 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B05A)))
2624#define MCF548X_USB_IFR14 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B05C)))
2625#define MCF548X_USB_IFR15 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B05E)))
2626#define MCF548X_USB_IFR16 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B060)))
2627#define MCF548X_USB_IFR17 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B062)))
2628#define MCF548X_USB_IFR18 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B064)))
2629#define MCF548X_USB_IFR19 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B066)))
2630#define MCF548X_USB_IFR20 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B068)))
2631#define MCF548X_USB_IFR21 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B06A)))
2632#define MCF548X_USB_IFR22 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B06C)))
2633#define MCF548X_USB_IFR23 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B06E)))
2634#define MCF548X_USB_IFR24 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B070)))
2635#define MCF548X_USB_IFR25 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B072)))
2636#define MCF548X_USB_IFR26 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B074)))
2637#define MCF548X_USB_IFR27 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B076)))
2638#define MCF548X_USB_IFR28 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B078)))
2639#define MCF548X_USB_IFR29 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B07A)))
2640#define MCF548X_USB_IFR30 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B07C)))
2641#define MCF548X_USB_IFR31 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B07E)))
2642#define MCF548X_USB_IFRn(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B040U+((x)*0x002))))
2643#define MCF548X_USB_PPCNT (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B080)))
2644#define MCF548X_USB_DPCNT (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B082)))
2645#define MCF548X_USB_CRCECNT (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B084)))
2646#define MCF548X_USB_BSECNT (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B086)))
2647#define MCF548X_USB_PIDECNT (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B088)))
2648#define MCF548X_USB_FRMECNT (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B08A)))
2649#define MCF548X_USB_TXPCNT (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B08C)))
2650#define MCF548X_USB_CNTOVR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B08E)))
2651#define MCF548X_USB_EP0ACR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B101)))
2652#define MCF548X_USB_EP0MPSR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B102)))
2653#define MCF548X_USB_EP0IFR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B104)))
2654#define MCF548X_USB_EP0SR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B105)))
2655#define MCF548X_USB_BMRTR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B106)))
2656#define MCF548X_USB_BRTR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B107)))
2657#define MCF548X_USB_WVALUER (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B108)))
2658#define MCF548X_USB_WINDEXR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B10A)))
2659#define MCF548X_USB_WLENGTH (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B10C)))
2660#define MCF548X_USB_EP1OUTACR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B131)))
2661#define MCF548X_USB_EP2OUTACR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B161)))
2662#define MCF548X_USB_EP3OUTACR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B191)))
2663#define MCF548X_USB_EP4OUTACR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B1C1)))
2664#define MCF548X_USB_EP5OUTACR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B1F1)))
2665#define MCF548X_USB_EP6OUTACR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B221)))
2666#define MCF548X_USB_EPnOUTACR(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B131U+((x)*0x030))))
2667#define MCF548X_USB_EP1OUTMPSR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B132)))
2668#define MCF548X_USB_EP2OUTMPSR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B162)))
2669#define MCF548X_USB_EP3OUTMPSR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B192)))
2670#define MCF548X_USB_EP4OUTMPSR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B1C2)))
2671#define MCF548X_USB_EP5OUTMPSR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B1F2)))
2672#define MCF548X_USB_EP6OUTMPSR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B222)))
2673#define MCF548X_USB_EPnOUTMPSR(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B132U+((x)*0x030))))
2674#define MCF548X_USB_EP1OUTIFR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B134)))
2675#define MCF548X_USB_EP2OUTIFR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B164)))
2676#define MCF548X_USB_EP3OUTIFR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B194)))
2677#define MCF548X_USB_EP4OUTIFR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B1C4)))
2678#define MCF548X_USB_EP5OUTIFR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B1F4)))
2679#define MCF548X_USB_EP6OUTIFR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B224)))
2680#define MCF548X_USB_EPnOUTIFR(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B134U+((x)*0x030))))
2681#define MCF548X_USB_EP1OUTSR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B135)))
2682#define MCF548X_USB_EP2OUTSR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B165)))
2683#define MCF548X_USB_EP3OUTSR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B195)))
2684#define MCF548X_USB_EP4OUTSR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B1C5)))
2685#define MCF548X_USB_EP5OUTSR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B1F5)))
2686#define MCF548X_USB_EP6OUTSR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B225)))
2687#define MCF548X_USB_EPnOUTSR(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B135U+((x)*0x030))))
2688#define MCF548X_USB_EP1OUTSFR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B13E)))
2689#define MCF548X_USB_EP2OUTSFR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B16E)))
2690#define MCF548X_USB_EP3OUTSFR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B19E)))
2691#define MCF548X_USB_EP4OUTSFR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B1CE)))
2692#define MCF548X_USB_EP5OUTSFR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B1FE)))
2693#define MCF548X_USB_EP6OUTSFR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B22E)))
2694#define MCF548X_USB_EPnOUTSFR(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B13EU+((x)*0x030))))
2695#define MCF548X_USB_EP1INACR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B149)))
2696#define MCF548X_USB_EP2INACR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B179)))
2697#define MCF548X_USB_EP3INACR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B1A9)))
2698#define MCF548X_USB_EP4INACR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B1D9)))
2699#define MCF548X_USB_EP5INACR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B209)))
2700#define MCF548X_USB_EP6INACR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B239)))
2701#define MCF548X_USB_EPnINACR(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B149U+((x)*0x030))))
2702#define MCF548X_USB_EP1INMPSR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B14A)))
2703#define MCF548X_USB_EP2INMPSR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B17A)))
2704#define MCF548X_USB_EP3INMPSR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B1AA)))
2705#define MCF548X_USB_EP4INMPSR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B1DA)))
2706#define MCF548X_USB_EP5INMPSR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B20A)))
2707#define MCF548X_USB_EP6INMPSR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B23A)))
2708#define MCF548X_USB_EPnINMPSR(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B14AU+((x)*0x030))))
2709#define MCF548X_USB_EP1INIFR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B14C)))
2710#define MCF548X_USB_EP2INIFR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B17C)))
2711#define MCF548X_USB_EP3INIFR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B1AC)))
2712#define MCF548X_USB_EP4INIFR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B1DC)))
2713#define MCF548X_USB_EP5INIFR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B20C)))
2714#define MCF548X_USB_EP6INIFR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B23C)))
2715#define MCF548X_USB_EPnINIFR(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B14CU+((x)*0x030))))
2716#define MCF548X_USB_EP1INSR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B14D)))
2717#define MCF548X_USB_EP2INSR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B17D)))
2718#define MCF548X_USB_EP3INSR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B1AD)))
2719#define MCF548X_USB_EP4INSR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B1DD)))
2720#define MCF548X_USB_EP5INSR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B20D)))
2721#define MCF548X_USB_EP6INSR (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B23D)))
2722#define MCF548X_USB_EPnINSR(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00B14DU+((x)*0x030))))
2723#define MCF548X_USB_EP1INSFR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B15A)))
2724#define MCF548X_USB_EP2INSFR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B18A)))
2725#define MCF548X_USB_EP3INSFR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B1BA)))
2726#define MCF548X_USB_EP4INSFR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B1EA)))
2727#define MCF548X_USB_EP5INSFR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B21A)))
2728#define MCF548X_USB_EP6INSFR (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B24A)))
2729#define MCF548X_USB_EPnINSFR(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00B15AU+((x)*0x030))))
2730#define MCF548X_USB_USBSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B400)))
2731#define MCF548X_USB_USBCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B404)))
2732#define MCF548X_USB_DRAMCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B408)))
2733#define MCF548X_USB_DRAMDR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B40C)))
2734#define MCF548X_USB_USBISR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B410)))
2735#define MCF548X_USB_USBIMR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B414)))
2736#define MCF548X_USB_EP0STAT (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B440)))
2737#define MCF548X_USB_EP1STAT (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B470)))
2738#define MCF548X_USB_EP2STAT (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4A0)))
2739#define MCF548X_USB_EP3STAT (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4D0)))
2740#define MCF548X_USB_EP4STAT (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B500)))
2741#define MCF548X_USB_EP5STAT (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B530)))
2742#define MCF548X_USB_EP6STAT (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B560)))
2743#define MCF548X_USB_EPnSTAT(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B440U+((x)*0x030))))
2744#define MCF548X_USB_EP0ISR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B444)))
2745#define MCF548X_USB_EP1ISR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B474)))
2746#define MCF548X_USB_EP2ISR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4A4)))
2747#define MCF548X_USB_EP3ISR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4D4)))
2748#define MCF548X_USB_EP4ISR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B504)))
2749#define MCF548X_USB_EP5ISR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B534)))
2750#define MCF548X_USB_EP6ISR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B564)))
2751#define MCF548X_USB_EPnISR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B444U+((x)*0x030))))
2752#define MCF548X_USB_EP0IMR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B448)))
2753#define MCF548X_USB_EP1IMR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B478)))
2754#define MCF548X_USB_EP2IMR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4A8)))
2755#define MCF548X_USB_EP3IMR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4D8)))
2756#define MCF548X_USB_EP4IMR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B508)))
2757#define MCF548X_USB_EP5IMR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B538)))
2758#define MCF548X_USB_EP6IMR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B568)))
2759#define MCF548X_USB_EPnIMR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B448U+((x)*0x030))))
2760#define MCF548X_USB_EP0FRCFGR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B44C)))
2761#define MCF548X_USB_EP1FRCFGR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B47C)))
2762#define MCF548X_USB_EP2FRCFGR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4AC)))
2763#define MCF548X_USB_EP3FRCFGR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4DC)))
2764#define MCF548X_USB_EP4FRCFGR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B50C)))
2765#define MCF548X_USB_EP5FRCFGR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B53C)))
2766#define MCF548X_USB_EP6FRCFGR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B56C)))
2767#define MCF548X_USB_EPnFRCFGR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B44CU+((x)*0x030))))
2768#define MCF548X_USB_EP0FDR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B450)))
2769#define MCF548X_USB_EP1FDR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B480)))
2770#define MCF548X_USB_EP2FDR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4B0)))
2771#define MCF548X_USB_EP3FDR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4E0)))
2772#define MCF548X_USB_EP4FDR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B510)))
2773#define MCF548X_USB_EP5FDR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B540)))
2774#define MCF548X_USB_EP6FDR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B570)))
2775#define MCF548X_USB_EPnFDR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B450U+((x)*0x030))))
2776#define MCF548X_USB_EP0FSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B454)))
2777#define MCF548X_USB_EP1FSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B484)))
2778#define MCF548X_USB_EP2FSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4B4)))
2779#define MCF548X_USB_EP3FSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4E4)))
2780#define MCF548X_USB_EP4FSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B514)))
2781#define MCF548X_USB_EP5FSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B544)))
2782#define MCF548X_USB_EP6FSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B574)))
2783#define MCF548X_USB_EPnFSR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B454U+((x)*0x030))))
2784#define MCF548X_USB_EP0FCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B458)))
2785#define MCF548X_USB_EP1FCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B488)))
2786#define MCF548X_USB_EP2FCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4B8)))
2787#define MCF548X_USB_EP3FCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4E8)))
2788#define MCF548X_USB_EP4FCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B518)))
2789#define MCF548X_USB_EP5FCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B548)))
2790#define MCF548X_USB_EP6FCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B578)))
2791#define MCF548X_USB_EPnFCR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B458U+((x)*0x030))))
2792#define MCF548X_USB_EP0FAR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B45C)))
2793#define MCF548X_USB_EP1FAR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B48C)))
2794#define MCF548X_USB_EP2FAR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4BC)))
2795#define MCF548X_USB_EP3FAR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4EC)))
2796#define MCF548X_USB_EP4FAR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B51C)))
2797#define MCF548X_USB_EP5FAR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B54C)))
2798#define MCF548X_USB_EP6FAR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B57C)))
2799#define MCF548X_USB_EPnFAR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B45CU+((x)*0x030))))
2800#define MCF548X_USB_EP0FRP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B460)))
2801#define MCF548X_USB_EP1FRP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B490)))
2802#define MCF548X_USB_EP2FRP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4C0)))
2803#define MCF548X_USB_EP3FRP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4F0)))
2804#define MCF548X_USB_EP4FRP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B520)))
2805#define MCF548X_USB_EP5FRP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B550)))
2806#define MCF548X_USB_EP6FRP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B580)))
2807#define MCF548X_USB_EPnFRP(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B460U+((x)*0x030))))
2808#define MCF548X_USB_EP0FWP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B464)))
2809#define MCF548X_USB_EP1FWP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B494)))
2810#define MCF548X_USB_EP2FWP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4C4)))
2811#define MCF548X_USB_EP3FWP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4F4)))
2812#define MCF548X_USB_EP4FWP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B524)))
2813#define MCF548X_USB_EP5FWP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B554)))
2814#define MCF548X_USB_EP6FWP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B584)))
2815#define MCF548X_USB_EPnFWP(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B464U+((x)*0x030))))
2816#define MCF548X_USB_EP0LRFP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B468)))
2817#define MCF548X_USB_EP1LRFP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B498)))
2818#define MCF548X_USB_EP2LRFP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4C8)))
2819#define MCF548X_USB_EP3LRFP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4F8)))
2820#define MCF548X_USB_EP4LRFP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B528)))
2821#define MCF548X_USB_EP5LRFP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B558)))
2822#define MCF548X_USB_EP6LRFP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B588)))
2823#define MCF548X_USB_EPnLRFP(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B468U+((x)*0x030))))
2824#define MCF548X_USB_EP0LWFP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B46C)))
2825#define MCF548X_USB_EP1LWFP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B49C)))
2826#define MCF548X_USB_EP2LWFP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4CC)))
2827#define MCF548X_USB_EP3LWFP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B4FC)))
2828#define MCF548X_USB_EP4LWFP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B52C)))
2829#define MCF548X_USB_EP5LWFP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B55C)))
2830#define MCF548X_USB_EP6LWFP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B58C)))
2831#define MCF548X_USB_EPnLWFP(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00B46CU+((x)*0x030))))
2832
2833/* Bit definitions and macros for MCF548X_USB_USBAISR */
2834#define MCF548X_USB_USBAISR_SETUP (0x01)
2835#define MCF548X_USB_USBAISR_IN (0x02)
2836#define MCF548X_USB_USBAISR_OUT (0x04)
2837#define MCF548X_USB_USBAISR_EPHALT (0x08)
2838#define MCF548X_USB_USBAISR_TRANSERR (0x10)
2839#define MCF548X_USB_USBAISR_ACK (0x20)
2840#define MCF548X_USB_USBAISR_CTROVFL (0x40)
2841#define MCF548X_USB_USBAISR_EPSTALL (0x80)
2842
2843/* Bit definitions and macros for MCF548X_USB_USBAIMR */
2844#define MCF548X_USB_USBAIMR_SETUPEN (0x01)
2845#define MCF548X_USB_USBAIMR_INEN (0x02)
2846#define MCF548X_USB_USBAIMR_OUTEN (0x04)
2847#define MCF548X_USB_USBAIMR_EPHALTEN (0x08)
2848#define MCF548X_USB_USBAIMR_TRANSERREN (0x10)
2849#define MCF548X_USB_USBAIMR_ACKEN (0x20)
2850#define MCF548X_USB_USBAIMR_CTROVFLEN (0x40)
2851#define MCF548X_USB_USBAIMR_EPSTALLEN (0x80)
2852
2853/* Bit definitions and macros for MCF548X_USB_EPINFO */
2854#define MCF548X_USB_EPINFO_EPDIR (0x01)
2855#define MCF548X_USB_EPINFO_EPNUM(x) (((x)&0x07)<<1)
2856
2857/* Bit definitions and macros for MCF548X_USB_CFGAR */
2858#define MCF548X_USB_CFGAR_RESERVED (0xA0)
2859#define MCF548X_USB_CFGAR_RMTWKEUP (0xE0)
2860
2861/* Bit definitions and macros for MCF548X_USB_SPEEDR */
2862#define MCF548X_USB_SPEEDR_HS (0x01)
2863#define MCF548X_USB_SPEEDR_FS (0x02)
2864
2865/* Bit definitions and macros for MCF548X_USB_FRMNUMR */
2866#define MCF548X_USB_FRMNUMR_FRMNUM(x) (((x)&0x0FFF)<<0)
2867
2868/* Bit definitions and macros for MCF548X_USB_EPTNR */
2869#define MCF548X_USB_EPTNR_EP1T(x) (((x)&0x0003)<<0)
2870#define MCF548X_USB_EPTNR_EP2T(x) (((x)&0x0003)<<2)
2871#define MCF548X_USB_EPTNR_EP3T(x) (((x)&0x0003)<<4)
2872#define MCF548X_USB_EPTNR_EP4T(x) (((x)&0x0003)<<6)
2873#define MCF548X_USB_EPTNR_EP5T(x) (((x)&0x0003)<<8)
2874#define MCF548X_USB_EPTNR_EP6T(x) (((x)&0x0003)<<10)
2875#define MCF548X_USB_EPTNR_EPnT1 (0)
2876#define MCF548X_USB_EPTNR_EPnT2 (1)
2877#define MCF548X_USB_EPTNR_EPnT3 (2)
2878
2879/* Bit definitions and macros for MCF548X_USB_IFUR */
2880#define MCF548X_USB_IFUR_ALTSET(x) (((x)&0x00FF)<<0)
2881#define MCF548X_USB_IFUR_IFNUM(x) (((x)&0x00FF)<<8)
2882
2883/* Bit definitions and macros for MCF548X_USB_IFRn */
2884#define MCF548X_USB_IFRn_ALTSET(x) (((x)&0x00FF)<<0)
2885#define MCF548X_USB_IFRn_IFNUM(x) (((x)&0x00FF)<<8)
2886
2887/* Bit definitions and macros for MCF548X_USB_CNTOVR */
2888#define MCF548X_USB_CNTOVR_PPCNT (0x01)
2889#define MCF548X_USB_CNTOVR_DPCNT (0x02)
2890#define MCF548X_USB_CNTOVR_CRCECNT (0x04)
2891#define MCF548X_USB_CNTOVR_BSECNT (0x08)
2892#define MCF548X_USB_CNTOVR_PIDECNT (0x10)
2893#define MCF548X_USB_CNTOVR_FRMECNT (0x20)
2894#define MCF548X_USB_CNTOVR_TXPCNT (0x40)
2895
2896/* Bit definitions and macros for MCF548X_USB_EP0ACR */
2897#define MCF548X_USB_EP0ACR_TTYPE(x) (((x)&0x03)<<0)
2898#define MCF548X_USB_EP0ACR_TTYPE_CTRL (0)
2899#define MCF548X_USB_EP0ACR_TTYPE_ISOC (1)
2900#define MCF548X_USB_EP0ACR_TTYPE_BULK (2)
2901#define MCF548X_USB_EP0ACR_TTYPE_INT (3)
2902
2903/* Bit definitions and macros for MCF548X_USB_EP0MPSR */
2904#define MCF548X_USB_EP0MPSR_MAXPKTSZ(x) (((x)&0x07FF)<<0)
2905#define MCF548X_USB_EP0MPSR_ADDTRANS(x) (((x)&0x0003)<<11)
2906
2907/* Bit definitions and macros for MCF548X_USB_EP0SR */
2908#define MCF548X_USB_EP0SR_HALT (0x01)
2909#define MCF548X_USB_EP0SR_ACTIVE (0x02)
2910#define MCF548X_USB_EP0SR_PSTALL (0x04)
2911#define MCF548X_USB_EP0SR_CCOMP (0x08)
2912#define MCF548X_USB_EP0SR_TXZERO (0x20)
2913#define MCF548X_USB_EP0SR_INT (0x80)
2914
2915/* Bit definitions and macros for MCF548X_USB_BMRTR */
2916#define MCF548X_USB_BMRTR_DIR (0x80)
2917#define MCF548X_USB_BMRTR_TYPE_STANDARD (0x00)
2918#define MCF548X_USB_BMRTR_TYPE_CLASS (0x20)
2919#define MCF548X_USB_BMRTR_TYPE_VENDOR (0x40)
2920#define MCF548X_USB_BMRTR_REC_DEVICE (0x00)
2921#define MCF548X_USB_BMRTR_REC_INTERFACE (0x01)
2922#define MCF548X_USB_BMRTR_REC_ENDPOINT (0x02)
2923#define MCF548X_USB_BMRTR_REC_OTHER (0x03)
2924
2925/* Bit definitions and macros for MCF548X_USB_EPnOUTACR */
2926#define MCF548X_USB_EPnOUTACR_TTYPE(x) (((x)&0x03)<<0)
2927
2928/* Bit definitions and macros for MCF548X_USB_EPnOUTMPSR */
2929#define MCF548X_USB_EPnOUTMPSR_MAXPKTSZ(x) (((x)&0x07FF)<<0)
2930#define MCF548X_USB_EPnOUTMPSR_ADDTRANS(x) (((x)&0x0003)<<11)
2931
2932/* Bit definitions and macros for MCF548X_USB_EPnOUTSR */
2933#define MCF548X_USB_EPnOUTSR_HALT (0x01)
2934#define MCF548X_USB_EPnOUTSR_ACTIVE (0x02)
2935#define MCF548X_USB_EPnOUTSR_PSTALL (0x04)
2936#define MCF548X_USB_EPnOUTSR_CCOMP (0x08)
2937#define MCF548X_USB_EPnOUTSR_TXZERO (0x20)
2938#define MCF548X_USB_EPnOUTSR_INT (0x80)
2939
2940/* Bit definitions and macros for MCF548X_USB_EPnOUTSFR */
2941#define MCF548X_USB_EPnOUTSFR_FRMNUM(x) (((x)&0x07FF)<<0)
2942
2943/* Bit definitions and macros for MCF548X_USB_EPnINACR */
2944#define MCF548X_USB_EPnINACR_TTYPE(x) (((x)&0x03)<<0)
2945
2946/* Bit definitions and macros for MCF548X_USB_EPnINMPSR */
2947#define MCF548X_USB_EPnINMPSR_MAXPKTSZ(x) (((x)&0x07FF)<<0)
2948#define MCF548X_USB_EPnINMPSR_ADDTRANS(x) (((x)&0x0003)<<11)
2949
2950/* Bit definitions and macros for MCF548X_USB_EPnINSR */
2951#define MCF548X_USB_EPnINSR_HALT (0x01)
2952#define MCF548X_USB_EPnINSR_ACTIVE (0x02)
2953#define MCF548X_USB_EPnINSR_PSTALL (0x04)
2954#define MCF548X_USB_EPnINSR_CCOMP (0x08)
2955#define MCF548X_USB_EPnINSR_TXZERO (0x20)
2956#define MCF548X_USB_EPnINSR_INT (0x80)
2957
2958/* Bit definitions and macros for MCF548X_USB_EPnINSFR */
2959#define MCF548X_USB_EPnINSFR_FRMNUM(x) (((x)&0x07FF)<<0)
2960
2961/* Bit definitions and macros for MCF548X_USB_USBSR */
2962#define MCF548X_USB_USBSR_SUSP (0x00000080)
2963#define MCF548X_USB_USBSR_ISOERREP (0x0000000F)
2964
2965/* Bit definitions and macros for MCF548X_USB_USBCR */
2966#define MCF548X_USB_USBCR_RESUME (0x00000001)
2967#define MCF548X_USB_USBCR_APPLOCK (0x00000002)
2968#define MCF548X_USB_USBCR_RST (0x00000004)
2969#define MCF548X_USB_USBCR_RAMEN (0x00000008)
2970#define MCF548X_USB_USBCR_RAMSPLIT (0x00000020)
2971
2972/* Bit definitions and macros for MCF548X_USB_DRAMCR */
2973#define MCF548X_USB_DRAMCR_DADR(x) (((x)&0x000003FF)<<0)
2974#define MCF548X_USB_DRAMCR_DSIZE(x) (((x)&0x000007FF)<<16)
2975#define MCF548X_USB_DRAMCR_BSY (0x40000000)
2976#define MCF548X_USB_DRAMCR_START (0x80000000)
2977
2978/* Bit definitions and macros for MCF548X_USB_DRAMDR */
2979#define MCF548X_USB_DRAMDR_DDAT(x) (((x)&0x000000FF)<<0)
2980
2981/* Bit definitions and macros for MCF548X_USB_USBISR */
2982#define MCF548X_USB_USBISR_ISOERR (0x00000001)
2983#define MCF548X_USB_USBISR_FTUNLCK (0x00000002)
2984#define MCF548X_USB_USBISR_SUSP (0x00000004)
2985#define MCF548X_USB_USBISR_RES (0x00000008)
2986#define MCF548X_USB_USBISR_UPDSOF (0x00000010)
2987#define MCF548X_USB_USBISR_RSTSTOP (0x00000020)
2988#define MCF548X_USB_USBISR_SOF (0x00000040)
2989#define MCF548X_USB_USBISR_MSOF (0x00000080)
2990
2991/* Bit definitions and macros for MCF548X_USB_USBIMR */
2992#define MCF548X_USB_USBIMR_ISOERR (0x00000001)
2993#define MCF548X_USB_USBIMR_FTUNLCK (0x00000002)
2994#define MCF548X_USB_USBIMR_SUSP (0x00000004)
2995#define MCF548X_USB_USBIMR_RES (0x00000008)
2996#define MCF548X_USB_USBIMR_UPDSOF (0x00000010)
2997#define MCF548X_USB_USBIMR_RSTSTOP (0x00000020)
2998#define MCF548X_USB_USBIMR_SOF (0x00000040)
2999#define MCF548X_USB_USBIMR_MSOF (0x00000080)
3000
3001/* Bit definitions and macros for MCF548X_USB_EPnSTAT */
3002#define MCF548X_USB_EPnSTAT_RST (0x00000001)
3003#define MCF548X_USB_EPnSTAT_FLUSH (0x00000002)
3004#define MCF548X_USB_EPnSTAT_DIR (0x00000080)
3005#define MCF548X_USB_EPnSTAT_BYTECNT(x) (((x)&0x00000FFF)<<16)
3006
3007/* Bit definitions and macros for MCF548X_USB_EPnISR */
3008#define MCF548X_USB_EPnISR_EOF (0x00000001)
3009#define MCF548X_USB_EPnISR_EOT (0x00000004)
3010#define MCF548X_USB_EPnISR_FIFOLO (0x00000010)
3011#define MCF548X_USB_EPnISR_FIFOHI (0x00000020)
3012#define MCF548X_USB_EPnISR_ERR (0x00000040)
3013#define MCF548X_USB_EPnISR_EMT (0x00000080)
3014#define MCF548X_USB_EPnISR_FU (0x00000100)
3015
3016/* Bit definitions and macros for MCF548X_USB_EPnIMR */
3017#define MCF548X_USB_EPnIMR_EOF (0x00000001)
3018#define MCF548X_USB_EPnIMR_EOT (0x00000004)
3019#define MCF548X_USB_EPnIMR_FIFOLO (0x00000010)
3020#define MCF548X_USB_EPnIMR_FIFOHI (0x00000020)
3021#define MCF548X_USB_EPnIMR_ERR (0x00000040)
3022#define MCF548X_USB_EPnIMR_EMT (0x00000080)
3023#define MCF548X_USB_EPnIMR_FU (0x00000100)
3024
3025/* Bit definitions and macros for MCF548X_USB_EPnFRCFGR */
3026#define MCF548X_USB_EPnFRCFGR_DEPTH(x) (((x)&0x00001FFF)<<0)
3027#define MCF548X_USB_EPnFRCFGR_BASE(x) (((x)&0x00000FFF)<<16)
3028
3029/* Bit definitions and macros for MCF548X_USB_EPnFSR */
3030#define MCF548X_USB_EPnFSR_EMT (0x00010000)
3031#define MCF548X_USB_EPnFSR_ALRM (0x00020000)
3032#define MCF548X_USB_EPnFSR_FR (0x00040000)
3033#define MCF548X_USB_EPnFSR_FU (0x00080000)
3034#define MCF548X_USB_EPnFSR_OF (0x00100000)
3035#define MCF548X_USB_EPnFSR_UF (0x00200000)
3036#define MCF548X_USB_EPnFSR_RXW (0x00400000)
3037#define MCF548X_USB_EPnFSR_FAE (0x00800000)
3038#define MCF548X_USB_EPnFSR_FRM(x) (((x)&0x0000000F)<<24)
3039#define MCF548X_USB_EPnFSR_TXW (0x40000000)
3040#define MCF548X_USB_EPnFSR_IP (0x80000000)
3041
3042/* Bit definitions and macros for MCF548X_USB_EPnFCR */
3043#define MCF548X_USB_EPnFCR_COUNTER(x) (((x)&0x0000FFFF)<<0)
3044#define MCF548X_USB_EPnFCR_TXWMSK (0x00040000)
3045#define MCF548X_USB_EPnFCR_OFMSK (0x00080000)
3046#define MCF548X_USB_EPnFCR_UFMSK (0x00100000)
3047#define MCF548X_USB_EPnFCR_RXWMSK (0x00200000)
3048#define MCF548X_USB_EPnFCR_FAEMSK (0x00400000)
3049#define MCF548X_USB_EPnFCR_IPMSK (0x00800000)
3050#define MCF548X_USB_EPnFCR_GR(x) (((x)&0x00000007)<<24)
3051#define MCF548X_USB_EPnFCR_FRM (0x08000000)
3052#define MCF548X_USB_EPnFCR_TMR (0x10000000)
3053#define MCF548X_USB_EPnFCR_WFR (0x20000000)
3054#define MCF548X_USB_EPnFCR_SHAD (0x80000000)
3055
3056/* Bit definitions and macros for MCF548X_USB_EPnFAR */
3057#define MCF548X_USB_EPnFAR_ALRMP(x) (((x)&0x00000FFF)<<0)
3058
3059/* Bit definitions and macros for MCF548X_USB_EPnFRP */
3060#define MCF548X_USB_EPnFRP_RP(x) (((x)&0x00000FFF)<<0)
3061
3062/* Bit definitions and macros for MCF548X_USB_EPnFWP */
3063#define MCF548X_USB_EPnFWP_WP(x) (((x)&0x00000FFF)<<0)
3064
3065/* Bit definitions and macros for MCF548X_USB_EPnLRFP */
3066#define MCF548X_USB_EPnLRFP_LRFP(x) (((x)&0x00000FFF)<<0)
3067
3068/* Bit definitions and macros for MCF548X_USB_EPnLWFP */
3069#define MCF548X_USB_EPnLWFP_LWFP(x) (((x)&0x00000FFF)<<0)
3070
3071
3072/*********************************************************************
3073*
3074* Programmable Serial Controller (PSC)
3075*
3076*********************************************************************/
3077
3078/* Register read/write macros */
3079#define MCF548X_PSC_MR0 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008600)))
3080#define MCF548X_PSC_SR0 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008604)))
3081#define MCF548X_PSC_CSR0 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008604)))
3082#define MCF548X_PSC_CR0 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008608)))
3083#define MCF548X_PSC_RB0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00860C)))
3084#define MCF548X_PSC_TB0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00860C)))
3085#define MCF548X_PSC_TB_8BIT0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00860C)))
3086#define MCF548X_PSC_TB_16BIT0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00860C)))
3087#define MCF548X_PSC_TB_AC970 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00860C)))
3088#define MCF548X_PSC_IPCR0 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008610)))
3089#define MCF548X_PSC_ACR0 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008610)))
3090#define MCF548X_PSC_ISR0 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008614)))
3091#define MCF548X_PSC_IMR0 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008614)))
3092#define MCF548X_PSC_CTUR0 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008618)))
3093#define MCF548X_PSC_CTLR0 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00861C)))
3094#define MCF548X_PSC_IP0 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008634)))
3095#define MCF548X_PSC_OPSET0 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008638)))
3096#define MCF548X_PSC_OPRESET0 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00863C)))
3097#define MCF548X_PSC_SICR0 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008640)))
3098#define MCF548X_PSC_IRCR10 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008644)))
3099#define MCF548X_PSC_IRCR20 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008648)))
3100#define MCF548X_PSC_IRSDR0 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00864C)))
3101#define MCF548X_PSC_IRMDR0 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008650)))
3102#define MCF548X_PSC_IRFDR0 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008654)))
3103#define MCF548X_PSC_RFCNT0 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008658)))
3104#define MCF548X_PSC_TFCNT0 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00865C)))
3105#define MCF548X_PSC_RFSR0 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008664)))
3106#define MCF548X_PSC_TFSR0 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008684)))
3107#define MCF548X_PSC_RFCR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008668)))
3108#define MCF548X_PSC_TFCR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008688)))
3109#define MCF548X_PSC_RFAR0 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00866E)))
3110#define MCF548X_PSC_TFAR0 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00868E)))
3111#define MCF548X_PSC_RFRP0 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008672)))
3112#define MCF548X_PSC_TFRP0 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008692)))
3113#define MCF548X_PSC_RFWP0 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008676)))
3114#define MCF548X_PSC_TFWP0 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008696)))
3115#define MCF548X_PSC_RLRFP0 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00867A)))
3116#define MCF548X_PSC_TLRFP0 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00869A)))
3117#define MCF548X_PSC_RLWFP0 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00867E)))
3118#define MCF548X_PSC_TLWFP0 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00869E)))
3119#define MCF548X_PSC_MR1 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008700)))
3120#define MCF548X_PSC_SR1 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008704)))
3121#define MCF548X_PSC_CSR1 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008704)))
3122#define MCF548X_PSC_CR1 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008708)))
3123#define MCF548X_PSC_RB1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00870C)))
3124#define MCF548X_PSC_TB1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00870C)))
3125#define MCF548X_PSC_TB_8BIT1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00870C)))
3126#define MCF548X_PSC_TB_16BIT1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00870C)))
3127#define MCF548X_PSC_TB_AC971 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00870C)))
3128#define MCF548X_PSC_IPCR1 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008710)))
3129#define MCF548X_PSC_ACR1 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008710)))
3130#define MCF548X_PSC_ISR1 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008714)))
3131#define MCF548X_PSC_IMR1 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008714)))
3132#define MCF548X_PSC_CTUR1 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008718)))
3133#define MCF548X_PSC_CTLR1 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00871C)))
3134#define MCF548X_PSC_IP1 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008734)))
3135#define MCF548X_PSC_OPSET1 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008738)))
3136#define MCF548X_PSC_OPRESET1 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00873C)))
3137#define MCF548X_PSC_SICR1 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008740)))
3138#define MCF548X_PSC_IRCR11 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008744)))
3139#define MCF548X_PSC_IRCR21 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008748)))
3140#define MCF548X_PSC_IRSDR1 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00874C)))
3141#define MCF548X_PSC_IRMDR1 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008750)))
3142#define MCF548X_PSC_IRFDR1 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008754)))
3143#define MCF548X_PSC_RFCNT1 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008758)))
3144#define MCF548X_PSC_TFCNT1 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00875C)))
3145#define MCF548X_PSC_RFSR1 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008764)))
3146#define MCF548X_PSC_TFSR1 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008784)))
3147#define MCF548X_PSC_RFCR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008768)))
3148#define MCF548X_PSC_TFCR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008788)))
3149#define MCF548X_PSC_RFAR1 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00876E)))
3150#define MCF548X_PSC_TFAR1 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00878E)))
3151#define MCF548X_PSC_RFRP1 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008772)))
3152#define MCF548X_PSC_TFRP1 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008792)))
3153#define MCF548X_PSC_RFWP1 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008776)))
3154#define MCF548X_PSC_TFWP1 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008796)))
3155#define MCF548X_PSC_RLRFP1 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00877A)))
3156#define MCF548X_PSC_TLRFP1 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00879A)))
3157#define MCF548X_PSC_RLWFP1 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00877E)))
3158#define MCF548X_PSC_TLWFP1 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00879E)))
3159#define MCF548X_PSC_MR2 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008800)))
3160#define MCF548X_PSC_SR2 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008804)))
3161#define MCF548X_PSC_CSR2 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008804)))
3162#define MCF548X_PSC_CR2 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008808)))
3163#define MCF548X_PSC_RB2 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00880C)))
3164#define MCF548X_PSC_TB2 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00880C)))
3165#define MCF548X_PSC_TB_8BIT2 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00880C)))
3166#define MCF548X_PSC_TB_16BIT2 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00880C)))
3167#define MCF548X_PSC_TB_AC972 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00880C)))
3168#define MCF548X_PSC_IPCR2 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008810)))
3169#define MCF548X_PSC_ACR2 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008810)))
3170#define MCF548X_PSC_ISR2 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008814)))
3171#define MCF548X_PSC_IMR2 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008814)))
3172#define MCF548X_PSC_CTUR2 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008818)))
3173#define MCF548X_PSC_CTLR2 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00881C)))
3174#define MCF548X_PSC_IP2 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008834)))
3175#define MCF548X_PSC_OPSET2 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008838)))
3176#define MCF548X_PSC_OPRESET2 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00883C)))
3177#define MCF548X_PSC_SICR2 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008840)))
3178#define MCF548X_PSC_IRCR12 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008844)))
3179#define MCF548X_PSC_IRCR22 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008848)))
3180#define MCF548X_PSC_IRSDR2 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00884C)))
3181#define MCF548X_PSC_IRMDR2 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008850)))
3182#define MCF548X_PSC_IRFDR2 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008854)))
3183#define MCF548X_PSC_RFCNT2 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008858)))
3184#define MCF548X_PSC_TFCNT2 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00885C)))
3185#define MCF548X_PSC_RFSR2 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008864)))
3186#define MCF548X_PSC_TFSR2 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008884)))
3187#define MCF548X_PSC_RFCR2 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008868)))
3188#define MCF548X_PSC_TFCR2 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008888)))
3189#define MCF548X_PSC_RFAR2 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00886E)))
3190#define MCF548X_PSC_TFAR2 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00888E)))
3191#define MCF548X_PSC_RFRP2 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008872)))
3192#define MCF548X_PSC_TFRP2 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008892)))
3193#define MCF548X_PSC_RFWP2 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008876)))
3194#define MCF548X_PSC_TFWP2 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008896)))
3195#define MCF548X_PSC_RLRFP2 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00887A)))
3196#define MCF548X_PSC_TLRFP2 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00889A)))
3197#define MCF548X_PSC_RLWFP2 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00887E)))
3198#define MCF548X_PSC_TLWFP2 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00889E)))
3199#define MCF548X_PSC_MR3 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008900)))
3200#define MCF548X_PSC_SR3 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008904)))
3201#define MCF548X_PSC_CSR3 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008904)))
3202#define MCF548X_PSC_CR3 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008908)))
3203#define MCF548X_PSC_RB3 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00890C)))
3204#define MCF548X_PSC_TB3 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00890C)))
3205#define MCF548X_PSC_TB_8BIT3 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00890C)))
3206#define MCF548X_PSC_TB_16BIT3 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00890C)))
3207#define MCF548X_PSC_TB_AC973 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00890C)))
3208#define MCF548X_PSC_IPCR3 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008910)))
3209#define MCF548X_PSC_ACR3 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008910)))
3210#define MCF548X_PSC_ISR3 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008914)))
3211#define MCF548X_PSC_IMR3 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008914)))
3212#define MCF548X_PSC_CTUR3 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008918)))
3213#define MCF548X_PSC_CTLR3 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00891C)))
3214#define MCF548X_PSC_IP3 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008934)))
3215#define MCF548X_PSC_OPSET3 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008938)))
3216#define MCF548X_PSC_OPRESET3 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00893C)))
3217#define MCF548X_PSC_SICR3 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008940)))
3218#define MCF548X_PSC_IRCR13 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008944)))
3219#define MCF548X_PSC_IRCR23 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008948)))
3220#define MCF548X_PSC_IRSDR3 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00894C)))
3221#define MCF548X_PSC_IRMDR3 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008950)))
3222#define MCF548X_PSC_IRFDR3 (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008954)))
3223#define MCF548X_PSC_RFCNT3 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008958)))
3224#define MCF548X_PSC_TFCNT3 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00895C)))
3225#define MCF548X_PSC_RFSR3 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008964)))
3226#define MCF548X_PSC_TFSR3 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008984)))
3227#define MCF548X_PSC_RFCR3 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008968)))
3228#define MCF548X_PSC_TFCR3 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008988)))
3229#define MCF548X_PSC_RFAR3 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00896E)))
3230#define MCF548X_PSC_TFAR3 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00898E)))
3231#define MCF548X_PSC_RFRP3 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008972)))
3232#define MCF548X_PSC_TFRP3 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008992)))
3233#define MCF548X_PSC_RFWP3 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008976)))
3234#define MCF548X_PSC_TFWP3 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008996)))
3235#define MCF548X_PSC_RLRFP3 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00897A)))
3236#define MCF548X_PSC_TLRFP3 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00899A)))
3237#define MCF548X_PSC_RLWFP3 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00897E)))
3238#define MCF548X_PSC_TLWFP3 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00899E)))
3239#define MCF548X_PSC_MR(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008600U+((x)*0x100))))
3240#define MCF548X_PSC_SR(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008604U+((x)*0x100))))
3241#define MCF548X_PSC_CSR(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008604U+((x)*0x100))))
3242#define MCF548X_PSC_CR(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008608U+((x)*0x100))))
3243#define MCF548X_PSC_RB(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00860CU+((x)*0x100))))
3244#define MCF548X_PSC_TB(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00860CU+((x)*0x100))))
3245#define MCF548X_PSC_TB_8BIT(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00860CU+((x)*0x100))))
3246#define MCF548X_PSC_TB_16BIT(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00860CU+((x)*0x100))))
3247#define MCF548X_PSC_TB_AC97(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00860CU+((x)*0x100))))
3248#define MCF548X_PSC_IPCR(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008610U+((x)*0x100))))
3249#define MCF548X_PSC_ACR(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008610U+((x)*0x100))))
3250#define MCF548X_PSC_ISR(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008614U+((x)*0x100))))
3251#define MCF548X_PSC_IMR(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008614U+((x)*0x100))))
3252#define MCF548X_PSC_CTUR(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008618U+((x)*0x100))))
3253#define MCF548X_PSC_CTLR(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00861CU+((x)*0x100))))
3254#define MCF548X_PSC_IP(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008634U+((x)*0x100))))
3255#define MCF548X_PSC_OPSET(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008638U+((x)*0x100))))
3256#define MCF548X_PSC_OPRESET(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00863CU+((x)*0x100))))
3257#define MCF548X_PSC_SICR(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008640U+((x)*0x100))))
3258#define MCF548X_PSC_IRCR1(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008644U+((x)*0x100))))
3259#define MCF548X_PSC_IRCR2(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008648U+((x)*0x100))))
3260#define MCF548X_PSC_IRSDR(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x00864CU+((x)*0x100))))
3261#define MCF548X_PSC_IRMDR(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008650U+((x)*0x100))))
3262#define MCF548X_PSC_IRFDR(x) (*(volatile uint8_t *)((uintptr_t)__MBAR + (0x008654U+((x)*0x100))))
3263#define MCF548X_PSC_RFCNT(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008658U+((x)*0x100))))
3264#define MCF548X_PSC_TFCNT(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00865CU+((x)*0x100))))
3265#define MCF548X_PSC_RFSR(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008664U+((x)*0x100))))
3266#define MCF548X_PSC_TFSR(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008684U+((x)*0x100))))
3267#define MCF548X_PSC_RFCR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008668U+((x)*0x100))))
3268#define MCF548X_PSC_TFCR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008688U+((x)*0x100))))
3269#define MCF548X_PSC_RFAR(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00866EU+((x)*0x100))))
3270#define MCF548X_PSC_TFAR(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00868EU+((x)*0x100))))
3271#define MCF548X_PSC_RFRP(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008672U+((x)*0x100))))
3272#define MCF548X_PSC_TFRP(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008692U+((x)*0x100))))
3273#define MCF548X_PSC_RFWP(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008676U+((x)*0x100))))
3274#define MCF548X_PSC_TFWP(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008696U+((x)*0x100))))
3275#define MCF548X_PSC_RLRFP(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00867AU+((x)*0x100))))
3276#define MCF548X_PSC_TLRFP(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00869AU+((x)*0x100))))
3277#define MCF548X_PSC_RLWFP(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00867EU+((x)*0x100))))
3278#define MCF548X_PSC_TLWFP(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00869EU+((x)*0x100))))
3279
3280/* Bit definitions and macros for MCF548X_PSC_MR */
3281#define MCF548X_PSC_MR_BC(x) (((x)&0x03)<<0)
3282#define MCF548X_PSC_MR_PT (0x04)
3283#define MCF548X_PSC_MR_PM(x) (((x)&0x03)<<3)
3284#define MCF548X_PSC_MR_ERR (0x20)
3285#define MCF548X_PSC_MR_RXIRQ (0x40)
3286#define MCF548X_PSC_MR_RXRTS (0x80)
3287#define MCF548X_PSC_MR_SB(x) (((x)&0x0F)<<0)
3288#define MCF548X_PSC_MR_TXCTS (0x10)
3289#define MCF548X_PSC_MR_TXRTS (0x20)
3290#define MCF548X_PSC_MR_CM(x) (((x)&0x03)<<6)
3291#define MCF548X_PSC_MR_PM_MULTI_ADDR (0x1C)
3292#define MCF548X_PSC_MR_PM_MULTI_DATA (0x18)
3293#define MCF548X_PSC_MR_PM_NONE (0x10)
3294#define MCF548X_PSC_MR_PM_FORCE_HI (0x0C)
3295#define MCF548X_PSC_MR_PM_FORCE_LO (0x08)
3296#define MCF548X_PSC_MR_PM_ODD (0x04)
3297#define MCF548X_PSC_MR_PM_EVEN (0x00)
3298#define MCF548X_PSC_MR_BC_5 (0x00)
3299#define MCF548X_PSC_MR_BC_6 (0x01)
3300#define MCF548X_PSC_MR_BC_7 (0x02)
3301#define MCF548X_PSC_MR_BC_8 (0x03)
3302#define MCF548X_PSC_MR_CM_NORMAL (0x00)
3303#define MCF548X_PSC_MR_CM_ECHO (0x40)
3304#define MCF548X_PSC_MR_CM_LOCAL_LOOP (0x80)
3305#define MCF548X_PSC_MR_CM_REMOTE_LOOP (0xC0)
3306#define MCF548X_PSC_MR_SB_STOP_BITS_1 (0x07)
3307#define MCF548X_PSC_MR_SB_STOP_BITS_15 (0x08)
3308#define MCF548X_PSC_MR_SB_STOP_BITS_2 (0x0F)
3309
3310/* Bit definitions and macros for MCF548X_PSC_SR */
3311#define MCF548X_PSC_SR_ERR (0x0040)
3312#define MCF548X_PSC_SR_CDE_DEOF (0x0080)
3313#define MCF548X_PSC_SR_RXRDY (0x0100)
3314#define MCF548X_PSC_SR_FU (0x0200)
3315#define MCF548X_PSC_SR_TXRDY (0x0400)
3316#define MCF548X_PSC_SR_TXEMP_URERR (0x0800)
3317#define MCF548X_PSC_SR_OE (0x1000)
3318#define MCF548X_PSC_SR_PE_CRCERR (0x2000)
3319#define MCF548X_PSC_SR_FE_PHYERR (0x4000)
3320#define MCF548X_PSC_SR_RB_NEOF (0x8000)
3321
3322/* Bit definitions and macros for MCF548X_PSC_CSR */
3323#define MCF548X_PSC_CSR_TCSEL(x) (((x)&0x0F)<<0)
3324#define MCF548X_PSC_CSR_RCSEL(x) (((x)&0x0F)<<4)
3325#define MCF548X_PSC_CSR_RCSEL_SYS_CLK (0xD0)
3326#define MCF548X_PSC_CSR_RCSEL_CTM16 (0xE0)
3327#define MCF548X_PSC_CSR_RCSEL_CTM (0xF0)
3328#define MCF548X_PSC_CSR_TCSEL_SYS_CLK (0x0D)
3329#define MCF548X_PSC_CSR_TCSEL_CTM16 (0x0E)
3330#define MCF548X_PSC_CSR_TCSEL_CTM (0x0F)
3331
3332/* Bit definitions and macros for MCF548X_PSC_CR */
3333#define MCF548X_PSC_CR_RXC(x) (((x)&0x03)<<0)
3334#define MCF548X_PSC_CR_TXC(x) (((x)&0x03)<<2)
3335#define MCF548X_PSC_CR_MISC(x) (((x)&0x07)<<4)
3336#define MCF548X_PSC_CR_NONE (0x00)
3337#define MCF548X_PSC_CR_STOP_BREAK (0x70)
3338#define MCF548X_PSC_CR_START_BREAK (0x60)
3339#define MCF548X_PSC_CR_BKCHGINT (0x50)
3340#define MCF548X_PSC_CR_RESET_ERROR (0x40)
3341#define MCF548X_PSC_CR_RESET_TX (0x30)
3342#define MCF548X_PSC_CR_RESET_RX (0x20)
3343#define MCF548X_PSC_CR_RESET_MR (0x10)
3344#define MCF548X_PSC_CR_TX_DISABLED (0x08)
3345#define MCF548X_PSC_CR_TX_ENABLED (0x04)
3346#define MCF548X_PSC_CR_RX_DISABLED (0x02)
3347#define MCF548X_PSC_CR_RX_ENABLED (0x01)
3348
3349/* Bit definitions and macros for MCF548X_PSC_TB_8BIT */
3350#define MCF548X_PSC_TB_8BIT_TB3(x) (((x)&0x000000FF)<<0)
3351#define MCF548X_PSC_TB_8BIT_TB2(x) (((x)&0x000000FF)<<8)
3352#define MCF548X_PSC_TB_8BIT_TB1(x) (((x)&0x000000FF)<<16)
3353#define MCF548X_PSC_TB_8BIT_TB0(x) (((x)&0x000000FF)<<24)
3354
3355/* Bit definitions and macros for MCF548X_PSC_TB_16BIT */
3356#define MCF548X_PSC_TB_16BIT_TB1(x) (((x)&0x0000FFFF)<<0)
3357#define MCF548X_PSC_TB_16BIT_TB0(x) (((x)&0x0000FFFF)<<16)
3358
3359/* Bit definitions and macros for MCF548X_PSC_TB_AC97 */
3360#define MCF548X_PSC_TB_AC97_SOF (0x00000800)
3361#define MCF548X_PSC_TB_AC97_TB(x) (((x)&0x000FFFFF)<<12)
3362
3363/* Bit definitions and macros for MCF548X_PSC_IPCR */
3364#define MCF548X_PSC_IPCR_RESERVED (0x0C)
3365#define MCF548X_PSC_IPCR_CTS (0x0D)
3366#define MCF548X_PSC_IPCR_D_CTS (0x1C)
3367#define MCF548X_PSC_IPCR_SYNC (0x8C)
3368
3369/* Bit definitions and macros for MCF548X_PSC_ACR */
3370#define MCF548X_PSC_ACR_IEC0 (0x01)
3371#define MCF548X_PSC_ACR_CTMS(x) (((x)&0x07)<<4)
3372#define MCF548X_PSC_ACR_BRG (0x80)
3373
3374/* Bit definitions and macros for MCF548X_PSC_ISR */
3375#define MCF548X_PSC_ISR_ERR (0x0040)
3376#define MCF548X_PSC_ISR_DEOF (0x0080)
3377#define MCF548X_PSC_ISR_TXRDY (0x0100)
3378#define MCF548X_PSC_ISR_RXRDY_FU (0x0200)
3379#define MCF548X_PSC_ISR_DB (0x0400)
3380#define MCF548X_PSC_ISR_IPC (0x8000)
3381
3382/* Bit definitions and macros for MCF548X_PSC_IMR */
3383#define MCF548X_PSC_IMR_ERR (0x0040)
3384#define MCF548X_PSC_IMR_DEOF (0x0080)
3385#define MCF548X_PSC_IMR_TXRDY (0x0100)
3386#define MCF548X_PSC_IMR_RXRDY_FU (0x0200)
3387#define MCF548X_PSC_IMR_DB (0x0400)
3388#define MCF548X_PSC_IMR_IPC (0x8000)
3389
3390/* Bit definitions and macros for MCF548X_PSC_IP */
3391#define MCF548X_PSC_IP_CTS (0x01)
3392#define MCF548X_PSC_IP_TGL (0x40)
3393#define MCF548X_PSC_IP_LWPR_B (0x80)
3394
3395/* Bit definitions and macros for MCF548X_PSC_OPSET */
3396#define MCF548X_PSC_OPSET_RTS (0x01)
3397
3398/* Bit definitions and macros for MCF548X_PSC_OPRESET */
3399#define MCF548X_PSC_OPRESET_RTS (0x01)
3400
3401/* Bit definitions and macros for MCF548X_PSC_SICR */
3402#define MCF548X_PSC_SICR_SIM(x) (((x)&0x07)<<0)
3403#define MCF548X_PSC_SICR_SHDIR (0x10)
3404#define MCF548X_PSC_SICR_DTS (0x20)
3405#define MCF548X_PSC_SICR_AWR (0x40)
3406#define MCF548X_PSC_SICR_ACRB (0x80)
3407#define MCF548X_PSC_SICR_SIM_UART (0x00)
3408#define MCF548X_PSC_SICR_SIM_MODEM8 (0x01)
3409#define MCF548X_PSC_SICR_SIM_MODEM16 (0x02)
3410#define MCF548X_PSC_SICR_SIM_AC97 (0x03)
3411#define MCF548X_PSC_SICR_SIM_SIR (0x04)
3412#define MCF548X_PSC_SICR_SIM_MIR (0x05)
3413#define MCF548X_PSC_SICR_SIM_FIR (0x06)
3414
3415/* Bit definitions and macros for MCF548X_PSC_IRCR1 */
3416#define MCF548X_PSC_IRCR1_SPUL (0x01)
3417#define MCF548X_PSC_IRCR1_SIPEN (0x02)
3418#define MCF548X_PSC_IRCR1_FD (0x04)
3419
3420/* Bit definitions and macros for MCF548X_PSC_IRCR2 */
3421#define MCF548X_PSC_IRCR2_NXTEOF (0x01)
3422#define MCF548X_PSC_IRCR2_ABORT (0x02)
3423#define MCF548X_PSC_IRCR2_SIPREQ (0x04)
3424
3425/* Bit definitions and macros for MCF548X_PSC_IRMDR */
3426#define MCF548X_PSC_IRMDR_M_FDIV(x) (((x)&0x7F)<<0)
3427#define MCF548X_PSC_IRMDR_FREQ (0x80)
3428
3429/* Bit definitions and macros for MCF548X_PSC_IRFDR */
3430#define MCF548X_PSC_IRFDR_F_FDIV(x) (((x)&0x0F)<<0)
3431
3432/* Bit definitions and macros for MCF548X_PSC_RFCNT */
3433#define MCF548X_PSC_RFCNT_CNT(x) (((x)&0x01FF)<<0)
3434
3435/* Bit definitions and macros for MCF548X_PSC_TFCNT */
3436#define MCF548X_PSC_TFCNT_CNT(x) (((x)&0x01FF)<<0)
3437
3438/* Bit definitions and macros for MCF548X_PSC_RFSR */
3439#define MCF548X_PSC_RFSR_EMT (0x0001)
3440#define MCF548X_PSC_RFSR_ALARM (0x0002)
3441#define MCF548X_PSC_RFSR_FU (0x0004)
3442#define MCF548X_PSC_RFSR_FRMRY (0x0008)
3443#define MCF548X_PSC_RFSR_OF (0x0010)
3444#define MCF548X_PSC_RFSR_UF (0x0020)
3445#define MCF548X_PSC_RFSR_RXW (0x0040)
3446#define MCF548X_PSC_RFSR_FAE (0x0080)
3447#define MCF548X_PSC_RFSR_FRM(x) (((x)&0x000F)<<8)
3448#define MCF548X_PSC_RFSR_TAG (0x1000)
3449#define MCF548X_PSC_RFSR_TXW (0x4000)
3450#define MCF548X_PSC_RFSR_IP (0x8000)
3451#define MCF548X_PSC_RFSR_FRM_BYTE0 (0x0800)
3452#define MCF548X_PSC_RFSR_FRM_BYTE1 (0x0400)
3453#define MCF548X_PSC_RFSR_FRM_BYTE2 (0x0200)
3454#define MCF548X_PSC_RFSR_FRM_BYTE3 (0x0100)
3455
3456/* Bit definitions and macros for MCF548X_PSC_TFSR */
3457#define MCF548X_PSC_TFSR_EMT (0x0001)
3458#define MCF548X_PSC_TFSR_ALARM (0x0002)
3459#define MCF548X_PSC_TFSR_FU (0x0004)
3460#define MCF548X_PSC_TFSR_FRMRY (0x0008)
3461#define MCF548X_PSC_TFSR_OF (0x0010)
3462#define MCF548X_PSC_TFSR_UF (0x0020)
3463#define MCF548X_PSC_TFSR_RXW (0x0040)
3464#define MCF548X_PSC_TFSR_FAE (0x0080)
3465#define MCF548X_PSC_TFSR_FRM(x) (((x)&0x000F)<<8)
3466#define MCF548X_PSC_TFSR_TAG (0x1000)
3467#define MCF548X_PSC_TFSR_TXW (0x4000)
3468#define MCF548X_PSC_TFSR_IP (0x8000)
3469#define MCF548X_PSC_TFSR_FRM_BYTE0 (0x0800)
3470#define MCF548X_PSC_TFSR_FRM_BYTE1 (0x0400)
3471#define MCF548X_PSC_TFSR_FRM_BYTE2 (0x0200)
3472#define MCF548X_PSC_TFSR_FRM_BYTE3 (0x0100)
3473
3474/* Bit definitions and macros for MCF548X_PSC_RFCR */
3475#define MCF548X_PSC_RFCR_CNTR(x) (((x)&0x0000FFFF)<<0)
3476#define MCF548X_PSC_RFCR_TXW_MSK (0x00040000)
3477#define MCF548X_PSC_RFCR_OF_MSK (0x00080000)
3478#define MCF548X_PSC_RFCR_UF_MSK (0x00100000)
3479#define MCF548X_PSC_RFCR_RXW_MSK (0x00200000)
3480#define MCF548X_PSC_RFCR_FAE_MSK (0x00400000)
3481#define MCF548X_PSC_RFCR_IP_MSK (0x00800000)
3482#define MCF548X_PSC_RFCR_GR(x) (((x)&0x00000007)<<24)
3483#define MCF548X_PSC_RFCR_FRMEN (0x08000000)
3484#define MCF548X_PSC_RFCR_TIMER (0x10000000)
3485#define MCF548X_PSC_RFCR_WRITETAG (0x20000000)
3486#define MCF548X_PSC_RFCR_SHADOW (0x80000000)
3487
3488/* Bit definitions and macros for MCF548X_PSC_TFCR */
3489#define MCF548X_PSC_TFCR_CNTR(x) (((x)&0x0000FFFF)<<0)
3490#define MCF548X_PSC_TFCR_TXW_MSK (0x00040000)
3491#define MCF548X_PSC_TFCR_OF_MSK (0x00080000)
3492#define MCF548X_PSC_TFCR_UF_MSK (0x00100000)
3493#define MCF548X_PSC_TFCR_RXW_MSK (0x00200000)
3494#define MCF548X_PSC_TFCR_FAE_MSK (0x00400000)
3495#define MCF548X_PSC_TFCR_IP_MSK (0x00800000)
3496#define MCF548X_PSC_TFCR_GR(x) (((x)&0x00000007)<<24)
3497#define MCF548X_PSC_TFCR_FRMEN (0x08000000)
3498#define MCF548X_PSC_TFCR_TIMER (0x10000000)
3499#define MCF548X_PSC_TFCR_WRITETAG (0x20000000)
3500#define MCF548X_PSC_TFCR_SHADOW (0x80000000)
3501
3502/* Bit definitions and macros for MCF548X_PSC_RFAR */
3503#define MCF548X_PSC_RFAR_ALARM(x) (((x)&0x01FF)<<0)
3504
3505/* Bit definitions and macros for MCF548X_PSC_TFAR */
3506#define MCF548X_PSC_TFAR_ALARM(x) (((x)&0x01FF)<<0)
3507
3508/* Bit definitions and macros for MCF548X_PSC_RFRP */
3509#define MCF548X_PSC_RFRP_READ(x) (((x)&0x01FF)<<0)
3510
3511/* Bit definitions and macros for MCF548X_PSC_TFRP */
3512#define MCF548X_PSC_TFRP_READ(x) (((x)&0x01FF)<<0)
3513
3514/* Bit definitions and macros for MCF548X_PSC_RFWP */
3515#define MCF548X_PSC_RFWP_WRITE(x) (((x)&0x01FF)<<0)
3516
3517/* Bit definitions and macros for MCF548X_PSC_TFWP */
3518#define MCF548X_PSC_TFWP_WRITE(x) (((x)&0x01FF)<<0)
3519
3520/* Bit definitions and macros for MCF548X_PSC_RLRFP */
3521#define MCF548X_PSC_RLRFP_LFP(x) (((x)&0x01FF)<<0)
3522
3523/* Bit definitions and macros for MCF548X_PSC_TLRFP */
3524#define MCF548X_PSC_TLRFP_LFP(x) (((x)&0x01FF)<<0)
3525
3526/* Bit definitions and macros for MCF548X_PSC_RLWFP */
3527#define MCF548X_PSC_RLWFP_LFP(x) (((x)&0x01FF)<<0)
3528
3529/* Bit definitions and macros for MCF548X_PSC_TLWFP */
3530#define MCF548X_PSC_TLWFP_LFP(x) (((x)&0x01FF)<<0)
3531
3532
3533/*********************************************************************
3534*
3535* 32KByte System SRAM (SRAM)
3536*
3537*********************************************************************/
3538
3539/* Register read/write macros */
3540#define MCF548X_SRAM_SSCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x01FFC0)))
3541#define MCF548X_SRAM_TCCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x01FFC4)))
3542#define MCF548X_SRAM_TCCRDR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x01FFC8)))
3543#define MCF548X_SRAM_TCCRDW (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x01FFCC)))
3544#define MCF548X_SRAM_TCCRSEC (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x01FFD0)))
3545
3546/* Bit definitions and macros for MCF548X_SRAM_SSCR */
3547#define MCF548X_SRAM_SSCR_INLV (0x00010000)
3548
3549/* Bit definitions and macros for MCF548X_SRAM_TCCR */
3550#define MCF548X_SRAM_TCCR_BANK0_TC(x) (((x)&0x0000000F)<<0)
3551#define MCF548X_SRAM_TCCR_BANK1_TC(x) (((x)&0x0000000F)<<8)
3552#define MCF548X_SRAM_TCCR_BANK2_TC(x) (((x)&0x0000000F)<<16)
3553#define MCF548X_SRAM_TCCR_BANK3_TC(x) (((x)&0x0000000F)<<24)
3554
3555/* Bit definitions and macros for MCF548X_SRAM_TCCRDR */
3556#define MCF548X_SRAM_TCCRDR_BANK0_TC(x) (((x)&0x0000000F)<<0)
3557#define MCF548X_SRAM_TCCRDR_BANK1_TC(x) (((x)&0x0000000F)<<8)
3558#define MCF548X_SRAM_TCCRDR_BANK2_TC(x) (((x)&0x0000000F)<<16)
3559#define MCF548X_SRAM_TCCRDR_BANK3_TC(x) (((x)&0x0000000F)<<24)
3560
3561/* Bit definitions and macros for MCF548X_SRAM_TCCRDW */
3562#define MCF548X_SRAM_TCCRDW_BANK0_TC(x) (((x)&0x0000000F)<<0)
3563#define MCF548X_SRAM_TCCRDW_BANK1_TC(x) (((x)&0x0000000F)<<8)
3564#define MCF548X_SRAM_TCCRDW_BANK2_TC(x) (((x)&0x0000000F)<<16)
3565#define MCF548X_SRAM_TCCRDW_BANK3_TC(x) (((x)&0x0000000F)<<24)
3566
3567/* Bit definitions and macros for MCF548X_SRAM_TCCRSEC */
3568#define MCF548X_SRAM_TCCRSEC_BANK0_TC(x) (((x)&0x0000000F)<<0)
3569#define MCF548X_SRAM_TCCRSEC_BANK1_TC(x) (((x)&0x0000000F)<<8)
3570#define MCF548X_SRAM_TCCRSEC_BANK2_TC(x) (((x)&0x0000000F)<<16)
3571#define MCF548X_SRAM_TCCRSEC_BANK3_TC(x) (((x)&0x0000000F)<<24)
3572
3573
3574/*********************************************************************
3575*
3576* PCI Bus Controller (PCI)
3577*
3578*********************************************************************/
3579
3580/* Register read/write macros */
3581#define MCF548X_PCI_PCIIDR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000B00)))
3582#define MCF548X_PCI_PCISCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000B04)))
3583#define MCF548X_PCI_PCICCRIR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000B08)))
3584#define MCF548X_PCI_PCICR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000B0C)))
3585#define MCF548X_PCI_PCIBAR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000B10)))
3586#define MCF548X_PCI_PCIBAR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000B14)))
3587#define MCF548X_PCI_PCICR2 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000B3C)))
3588#define MCF548X_PCI_PCIGSCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000B60)))
3589#define MCF548X_PCI_PCITBATR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000B64)))
3590#define MCF548X_PCI_PCITBATR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000B68)))
3591#define MCF548X_PCI_PCITCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000B6C)))
3592#define MCF548X_PCI_PCIIW0BTAR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000B70)))
3593#define MCF548X_PCI_PCIIW1BTAR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000B74)))
3594#define MCF548X_PCI_PCIIW2BTAR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000B78)))
3595#define MCF548X_PCI_PCIIWCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000B80)))
3596#define MCF548X_PCI_PCIICR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000B84)))
3597#define MCF548X_PCI_PCIISR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000B88)))
3598#define MCF548X_PCI_PCICAR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000BF8)))
3599#define MCF548X_PCI_PCITPSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008400)))
3600#define MCF548X_PCI_PCITSAR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008404)))
3601#define MCF548X_PCI_PCITTCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008408)))
3602#define MCF548X_PCI_PCITER (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00840C)))
3603#define MCF548X_PCI_PCITNAR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008410)))
3604#define MCF548X_PCI_PCITLWR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008414)))
3605#define MCF548X_PCI_PCITDCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008418)))
3606#define MCF548X_PCI_PCITSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00841C)))
3607#define MCF548X_PCI_PCITFDR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008440)))
3608#define MCF548X_PCI_PCITFSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008444)))
3609#define MCF548X_PCI_PCITFCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008448)))
3610#define MCF548X_PCI_PCITFAR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00844C)))
3611#define MCF548X_PCI_PCITFRPR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008450)))
3612#define MCF548X_PCI_PCITFWPR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008454)))
3613#define MCF548X_PCI_PCIRPSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008480)))
3614#define MCF548X_PCI_PCIRSAR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008484)))
3615#define MCF548X_PCI_PCIRTCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008488)))
3616#define MCF548X_PCI_PCIRER (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00848C)))
3617#define MCF548X_PCI_PCIRNAR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008490)))
3618#define MCF548X_PCI_PCIRDCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008498)))
3619#define MCF548X_PCI_PCIRSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00849C)))
3620#define MCF548X_PCI_PCIRFDR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0084C0)))
3621#define MCF548X_PCI_PCIRFSR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0084C4)))
3622#define MCF548X_PCI_PCIRFCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0084C8)))
3623#define MCF548X_PCI_PCIRFAR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0084CC)))
3624#define MCF548X_PCI_PCIRFRPR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0084D0)))
3625#define MCF548X_PCI_PCIRFWPR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x0084D4)))
3626
3627/* Bit definitions and macros for MCF548X_PCI_PCIIDR */
3628#define MCF548X_PCI_PCIIDR_VENDORID(x) (((x)&0x0000FFFF)<<0)
3629#define MCF548X_PCI_PCIIDR_DEVICEID(x) (((x)&0x0000FFFF)<<16)
3630
3631/* Bit definitions and macros for MCF548X_PCI_PCISCR */
3632#define MCF548X_PCI_PCISCR_M (0x00000002)
3633#define MCF548X_PCI_PCISCR_B (0x00000004)
3634#define MCF548X_PCI_PCISCR_SP (0x00000008)
3635#define MCF548X_PCI_PCISCR_MW (0x00000010)
3636#define MCF548X_PCI_PCISCR_PER (0x00000040)
3637#define MCF548X_PCI_PCISCR_S (0x00000100)
3638#define MCF548X_PCI_PCISCR_F (0x00000200)
3639#define MCF548X_PCI_PCISCR_C (0x00100000)
3640#define MCF548X_PCI_PCISCR_66M (0x00200000)
3641#define MCF548X_PCI_PCISCR_R (0x00400000)
3642#define MCF548X_PCI_PCISCR_FC (0x00800000)
3643#define MCF548X_PCI_PCISCR_DP (0x01000000)
3644#define MCF548X_PCI_PCISCR_DT(x) (((x)&0x00000003)<<25)
3645#define MCF548X_PCI_PCISCR_TS (0x08000000)
3646#define MCF548X_PCI_PCISCR_TR (0x10000000)
3647#define MCF548X_PCI_PCISCR_MA (0x20000000)
3648#define MCF548X_PCI_PCISCR_SE (0x40000000)
3649#define MCF548X_PCI_PCISCR_PE (0x80000000)
3650
3651/* Bit definitions and macros for MCF548X_PCI_PCICCRIR */
3652#define MCF548X_PCI_PCICCRIR_REVID(x) (((x)&0x000000FF)<<0)
3653#define MCF548X_PCI_PCICCRIR_CLASSCODE(x) (((x)&0x00FFFFFF)<<8)
3654
3655/* Bit definitions and macros for MCF548X_PCI_PCICR1 */
3656#define MCF548X_PCI_PCICR1_CACHELINESIZE(x) (((x)&0x0000000F)<<0)
3657#define MCF548X_PCI_PCICR1_LATTIMER(x) (((x)&0x000000FF)<<8)
3658#define MCF548X_PCI_PCICR1_HEADERTYPE(x) (((x)&0x000000FF)<<16)
3659#define MCF548X_PCI_PCICR1_BIST(x) (((x)&0x000000FF)<<24)
3660
3661/* Bit definitions and macros for MCF548X_PCI_PCIBAR0 */
3662#define MCF548X_PCI_PCIBAR0_IO (0x00000001)
3663#define MCF548X_PCI_PCIBAR0_RANGE(x) (((x)&0x00000003)<<1)
3664#define MCF548X_PCI_PCIBAR0_PREF (0x00000008)
3665#define MCF548X_PCI_PCIBAR0_BAR0(x) (((x)&0x00003FFF)<<18)
3666
3667/* Bit definitions and macros for MCF548X_PCI_PCIBAR1 */
3668#define MCF548X_PCI_PCIBAR1_IO (0x00000001)
3669#define MCF548X_PCI_PCIBAR1_PREF (0x00000008)
3670#define MCF548X_PCI_PCIBAR1_BAR1(x) (((x)&0x00000003)<<30)
3671
3672/* Bit definitions and macros for MCF548X_PCI_PCICR2 */
3673#define MCF548X_PCI_PCICR2_INTLINE(x) (((x)&0x000000FF)<<0)
3674#define MCF548X_PCI_PCICR2_INTPIN(x) (((x)&0x000000FF)<<8)
3675#define MCF548X_PCI_PCICR2_MINGNT(x) (((x)&0x000000FF)<<16)
3676#define MCF548X_PCI_PCICR2_MAXLAT(x) (((x)&0x000000FF)<<24)
3677
3678/* Bit definitions and macros for MCF548X_PCI_PCIGSCR */
3679#define MCF548X_PCI_PCIGSCR_PR (0x00000001)
3680#define MCF548X_PCI_PCIGSCR_SEE (0x00001000)
3681#define MCF548X_PCI_PCIGSCR_PEE (0x00002000)
3682#define MCF548X_PCI_PCIGSCR_SE (0x10000000)
3683#define MCF548X_PCI_PCIGSCR_PE (0x20000000)
3684
3685/* Bit definitions and macros for MCF548X_PCI_PCITBATR0 */
3686#define MCF548X_PCI_PCITBATR0_EN (0x00000001)
3687#define MCF548X_PCI_PCITBATR0_BAT0(x) (((x)&0x00003FFF)<<18)
3688
3689/* Bit definitions and macros for MCF548X_PCI_PCITBATR1 */
3690#define MCF548X_PCI_PCITBATR1_EN (0x00000001)
3691#define MCF548X_PCI_PCITBATR1_BAT1(x) (((x)&0x00000003)<<30)
3692
3693/* Bit definitions and macros for MCF548X_PCI_PCITCR */
3694#define MCF548X_PCI_PCITCR_P (0x00010000)
3695#define MCF548X_PCI_PCITCR_LD (0x01000000)
3696
3697/* Bit definitions and macros for MCF548X_PCI_PCIIW0BTAR */
3698#define MCF548X_PCI_PCIIW0BTAR_WTA0(x) (((x)&0x000000FF)<<8)
3699#define MCF548X_PCI_PCIIW0BTAR_WAM0(x) (((x)&0x000000FF)<<16)
3700#define MCF548X_PCI_PCIIW0BTAR_WBA0(x) (((x)&0x000000FF)<<24)
3701
3702/* Bit definitions and macros for MCF548X_PCI_PCIIW1BTAR */
3703#define MCF548X_PCI_PCIIW1BTAR_WTA1(x) (((x)&0x000000FF)<<8)
3704#define MCF548X_PCI_PCIIW1BTAR_WAM1(x) (((x)&0x000000FF)<<16)
3705#define MCF548X_PCI_PCIIW1BTAR_WBA1(x) (((x)&0x000000FF)<<24)
3706
3707/* Bit definitions and macros for MCF548X_PCI_PCIIW2BTAR */
3708#define MCF548X_PCI_PCIIW2BTAR_WTA2(x) (((x)&0x000000FF)<<8)
3709#define MCF548X_PCI_PCIIW2BTAR_WAM2(x) (((x)&0x000000FF)<<16)
3710#define MCF548X_PCI_PCIIW2BTAR_WBA2(x) (((x)&0x000000FF)<<24)
3711
3712/* Bit definitions and macros for MCF548X_PCI_PCIIWCR */
3713#define MCF548X_PCI_PCIIWCR_WINCTRL2(x) (((x)&0x0000000F)<<8)
3714#define MCF548X_PCI_PCIIWCR_WINCTRL1(x) (((x)&0x0000000F)<<16)
3715#define MCF548X_PCI_PCIIWCR_WINCTRL0(x) (((x)&0x0000000F)<<24)
3716#define MCF548X_PCI_PCIIWCR_WINCTRL0_MEMREAD (0x01000000)
3717#define MCF548X_PCI_PCIIWCR_WINCTRL0_MEMRDLINE (0x03000000)
3718#define MCF548X_PCI_PCIIWCR_WINCTRL0_MEMRDMUL (0x05000000)
3719#define MCF548X_PCI_PCIIWCR_WINCTRL0_IO (0x09000000)
3720#define MCF548X_PCI_PCIIWCR_WINCTRL1_MEMREAD (0x00010000)
3721#define MCF548X_PCI_PCIIWCR_WINCTRL1_MEMRDLINE (0x00030000)
3722#define MCF548X_PCI_PCIIWCR_WINCTRL1_MEMRDMUL (0x00050000)
3723#define MCF548X_PCI_PCIIWCR_WINCTRL1_IO (0x00090000)
3724#define MCF548X_PCI_PCIIWCR_WINCTRL2_MEMREAD (0x00000100)
3725#define MCF548X_PCI_PCIIWCR_WINCTRL2_MEMRDLINE (0x00000300)
3726#define MCF548X_PCI_PCIIWCR_WINCTRL2_MEMRDMUL (0x00000500)
3727#define MCF548X_PCI_PCIIWCR_WINCTRL2_IO (0x00000900)
3728
3729/* Bit definitions and macros for MCF548X_PCI_PCIICR */
3730#define MCF548X_PCI_PCIICR_MAXRETRY(x) (((x)&0x000000FF)<<0)
3731#define MCF548X_PCI_PCIICR_TAE (0x01000000)
3732#define MCF548X_PCI_PCIICR_IAE (0x02000000)
3733#define MCF548X_PCI_PCIICR_REE (0x04000000)
3734
3735/* Bit definitions and macros for MCF548X_PCI_PCIISR */
3736#define MCF548X_PCI_PCIISR_TA (0x01000000)
3737#define MCF548X_PCI_PCIISR_IA (0x02000000)
3738#define MCF548X_PCI_PCIISR_RE (0x04000000)
3739
3740/* Bit definitions and macros for MCF548X_PCI_PCICAR */
3741#define MCF548X_PCI_PCICAR_DWORD(x) (((x)&0x0000003F)<<2)
3742#define MCF548X_PCI_PCICAR_FUNCNUM(x) (((x)&0x00000007)<<8)
3743#define MCF548X_PCI_PCICAR_DEVNUM(x) (((x)&0x0000001F)<<11)
3744#define MCF548X_PCI_PCICAR_BUSNUM(x) (((x)&0x000000FF)<<16)
3745#define MCF548X_PCI_PCICAR_E (0x80000000)
3746
3747/* Bit definitions and macros for MCF548X_PCI_PCITPSR */
3748#define MCF548X_PCI_PCITPSR_PKTSIZE(x) (((x)&0x0000FFFF)<<16)
3749
3750/* Bit definitions and macros for MCF548X_PCI_PCITTCR */
3751#define MCF548X_PCI_PCITTCR_DI (0x00000001)
3752#define MCF548X_PCI_PCITTCR_W (0x00000010)
3753#define MCF548X_PCI_PCITTCR_MAXBEATS(x) (((x)&0x00000007)<<8)
3754#define MCF548X_PCI_PCITTCR_MAXRETRY(x) (((x)&0x000000FF)<<16)
3755#define MCF548X_PCI_PCITTCR_PCICMD(x) (((x)&0x0000000F)<<24)
3756
3757/* Bit definitions and macros for MCF548X_PCI_PCITER */
3758#define MCF548X_PCI_PCITER_NE (0x00010000)
3759#define MCF548X_PCI_PCITER_IAE (0x00020000)
3760#define MCF548X_PCI_PCITER_TAE (0x00040000)
3761#define MCF548X_PCI_PCITER_RE (0x00080000)
3762#define MCF548X_PCI_PCITER_SE (0x00100000)
3763#define MCF548X_PCI_PCITER_FEE (0x00200000)
3764#define MCF548X_PCI_PCITER_ME (0x01000000)
3765#define MCF548X_PCI_PCITER_BE (0x08000000)
3766#define MCF548X_PCI_PCITER_CM (0x10000000)
3767#define MCF548X_PCI_PCITER_RF (0x40000000)
3768#define MCF548X_PCI_PCITER_RC (0x80000000)
3769
3770/* Bit definitions and macros for MCF548X_PCI_PCITDCR */
3771#define MCF548X_PCI_PCITDCR_PKTSDONE(x) (((x)&0x0000FFFF)<<0)
3772#define MCF548X_PCI_PCITDCR_BYTESDONE(x) (((x)&0x0000FFFF)<<16)
3773
3774/* Bit definitions and macros for MCF548X_PCI_PCITSR */
3775#define MCF548X_PCI_PCITSR_IA (0x00010000)
3776#define MCF548X_PCI_PCITSR_TA (0x00020000)
3777#define MCF548X_PCI_PCITSR_RE (0x00040000)
3778#define MCF548X_PCI_PCITSR_SE (0x00080000)
3779#define MCF548X_PCI_PCITSR_FE (0x00100000)
3780#define MCF548X_PCI_PCITSR_BE1 (0x00200000)
3781#define MCF548X_PCI_PCITSR_BE2 (0x00400000)
3782#define MCF548X_PCI_PCITSR_BE3 (0x00800000)
3783#define MCF548X_PCI_PCITSR_NT (0x01000000)
3784
3785/* Bit definitions and macros for MCF548X_PCI_PCITFSR */
3786#define MCF548X_PCI_PCITFSR_EMT (0x00010000)
3787#define MCF548X_PCI_PCITFSR_ALARM (0x00020000)
3788#define MCF548X_PCI_PCITFSR_FU (0x00040000)
3789#define MCF548X_PCI_PCITFSR_FR (0x00080000)
3790#define MCF548X_PCI_PCITFSR_OF (0x00100000)
3791#define MCF548X_PCI_PCITFSR_UF (0x00200000)
3792#define MCF548X_PCI_PCITFSR_RXW (0x00400000)
3793
3794/* Bit definitions and macros for MCF548X_PCI_PCITFCR */
3795#define MCF548X_PCI_PCITFCR_OF_MSK (0x00080000)
3796#define MCF548X_PCI_PCITFCR_UF_MSK (0x00100000)
3797#define MCF548X_PCI_PCITFCR_RXW_MSK (0x00200000)
3798#define MCF548X_PCI_PCITFCR_FAE_MSK (0x00400000)
3799#define MCF548X_PCI_PCITFCR_IP_MSK (0x00800000)
3800#define MCF548X_PCI_PCITFCR_GR(x) (((x)&0x00000007)<<24)
3801
3802/* Bit definitions and macros for MCF548X_PCI_PCITFAR */
3803#define MCF548X_PCI_PCITFAR_ALARM(x) (((x)&0x0000007F)<<0)
3804
3805/* Bit definitions and macros for MCF548X_PCI_PCITFRPR */
3806#define MCF548X_PCI_PCITFRPR_READ(x) (((x)&0x00000FFF)<<0)
3807
3808/* Bit definitions and macros for MCF548X_PCI_PCITFWPR */
3809#define MCF548X_PCI_PCITFWPR_WRITE(x) (((x)&0x00000FFF)<<0)
3810
3811/* Bit definitions and macros for MCF548X_PCI_PCIRPSR */
3812#define MCF548X_PCI_PCIRPSR_PKTSIZE(x) (((x)&0x0000FFFF)<<16)
3813
3814/* Bit definitions and macros for MCF548X_PCI_PCIRTCR */
3815#define MCF548X_PCI_PCIRTCR_DI (0x00000001)
3816#define MCF548X_PCI_PCIRTCR_W (0x00000010)
3817#define MCF548X_PCI_PCIRTCR_MAXBEATS(x) (((x)&0x00000007)<<8)
3818#define MCF548X_PCI_PCIRTCR_FB (0x00001000)
3819#define MCF548X_PCI_PCIRTCR_MAXRETRY(x) (((x)&0x000000FF)<<16)
3820#define MCF548X_PCI_PCIRTCR_PCICMD(x) (((x)&0x0000000F)<<24)
3821
3822/* Bit definitions and macros for MCF548X_PCI_PCIRER */
3823#define MCF548X_PCI_PCIRER_NE (0x00010000)
3824#define MCF548X_PCI_PCIRER_IAE (0x00020000)
3825#define MCF548X_PCI_PCIRER_TAE (0x00040000)
3826#define MCF548X_PCI_PCIRER_RE (0x00080000)
3827#define MCF548X_PCI_PCIRER_SE (0x00100000)
3828#define MCF548X_PCI_PCIRER_FEE (0x00200000)
3829#define MCF548X_PCI_PCIRER_ME (0x01000000)
3830#define MCF548X_PCI_PCIRER_BE (0x08000000)
3831#define MCF548X_PCI_PCIRER_CM (0x10000000)
3832#define MCF548X_PCI_PCIRER_FE (0x20000000)
3833#define MCF548X_PCI_PCIRER_RF (0x40000000)
3834#define MCF548X_PCI_PCIRER_RC (0x80000000)
3835
3836/* Bit definitions and macros for MCF548X_PCI_PCIRDCR */
3837#define MCF548X_PCI_PCIRDCR_PKTSDONE(x) (((x)&0x0000FFFF)<<0)
3838#define MCF548X_PCI_PCIRDCR_BYTESDONE(x) (((x)&0x0000FFFF)<<16)
3839
3840/* Bit definitions and macros for MCF548X_PCI_PCIRSR */
3841#define MCF548X_PCI_PCIRSR_IA (0x00010000)
3842#define MCF548X_PCI_PCIRSR_TA (0x00020000)
3843#define MCF548X_PCI_PCIRSR_RE (0x00040000)
3844#define MCF548X_PCI_PCIRSR_SE (0x00080000)
3845#define MCF548X_PCI_PCIRSR_FE (0x00100000)
3846#define MCF548X_PCI_PCIRSR_BE1 (0x00200000)
3847#define MCF548X_PCI_PCIRSR_BE2 (0x00400000)
3848#define MCF548X_PCI_PCIRSR_BE3 (0x00800000)
3849#define MCF548X_PCI_PCIRSR_NT (0x01000000)
3850
3851/* Bit definitions and macros for MCF548X_PCI_PCIRFSR */
3852#define MCF548X_PCI_PCIRFSR_EMT (0x00010000)
3853#define MCF548X_PCI_PCIRFSR_ALARM (0x00020000)
3854#define MCF548X_PCI_PCIRFSR_FU (0x00040000)
3855#define MCF548X_PCI_PCIRFSR_FR (0x00080000)
3856#define MCF548X_PCI_PCIRFSR_OF (0x00100000)
3857#define MCF548X_PCI_PCIRFSR_UF (0x00200000)
3858#define MCF548X_PCI_PCIRFSR_RXW (0x00400000)
3859
3860/* Bit definitions and macros for MCF548X_PCI_PCIRFCR */
3861#define MCF548X_PCI_PCIRFCR_OF_MSK (0x00080000)
3862#define MCF548X_PCI_PCIRFCR_UF_MSK (0x00100000)
3863#define MCF548X_PCI_PCIRFCR_RXW_MSK (0x00200000)
3864#define MCF548X_PCI_PCIRFCR_FAE_MSK (0x00400000)
3865#define MCF548X_PCI_PCIRFCR_IP_MSK (0x00800000)
3866#define MCF548X_PCI_PCIRFCR_GR(x) (((x)&0x00000007)<<24)
3867
3868/* Bit definitions and macros for MCF548X_PCI_PCIRFAR */
3869#define MCF548X_PCI_PCIRFAR_ALARM(x) (((x)&0x0000007F)<<0)
3870
3871/* Bit definitions and macros for MCF548X_PCI_PCIRFRPR */
3872#define MCF548X_PCI_PCIRFRPR_READ(x) (((x)&0x00000FFF)<<0)
3873
3874/* Bit definitions and macros for MCF548X_PCI_PCIRFWPR */
3875#define MCF548X_PCI_PCIRFWPR_WRITE(x) (((x)&0x00000FFF)<<0)
3876
3877
3878/*********************************************************************
3879*
3880* PCI Arbiter Module (PCIARB)
3881*
3882*********************************************************************/
3883
3884/* Register read/write macros */
3885#define MCF548X_PCIARB_PACR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000C00)))
3886#define MCF548X_PCIARB_PASR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000C04)))
3887
3888/* Bit definitions and macros for MCF548X_PCIARB_PACR */
3889#define MCF548X_PCIARB_PACR_INTMPRI (0x00000001)
3890#define MCF548X_PCIARB_PACR_EXTMPRI(x) (((x)&0x0000001F)<<1)
3891#define MCF548X_PCIARB_PACR_INTMINTEN (0x00010000)
3892#define MCF548X_PCIARB_PACR_EXTMINTEN(x) (((x)&0x0000001F)<<17)
3893#define MCF548X_PCIARB_PACR_PKMD (0x40000000)
3894#define MCF548X_PCIARB_PACR_DS (0x80000000)
3895
3896/* Bit definitions and macros for MCF548X_PCIARB_PASR */
3897#define MCF548X_PCIARB_PASR_ITLMBK (0x00010000)
3898#define MCF548X_PCIARB_PASR_EXTMBK(x) (((x)&0x0000001F)<<17)
3899
3900
3901/*********************************************************************
3902*
3903* Multi-Channel DMA (DMA)
3904*
3905*********************************************************************/
3906
3907/* Register read/write macros */
3908#define MCF548X_DMA_TASKBAR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008000)))
3909#define MCF548X_DMA_CP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008004)))
3910#define MCF548X_DMA_EP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008008)))
3911#define MCF548X_DMA_VP (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00800C)))
3912#define MCF548X_DMA_DIPR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008014)))
3913#define MCF548X_DMA_DIMR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008018)))
3914#define MCF548X_DMA_TCR0 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00801C)))
3915#define MCF548X_DMA_TCR1 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00801E)))
3916#define MCF548X_DMA_TCR2 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008020)))
3917#define MCF548X_DMA_TCR3 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008022)))
3918#define MCF548X_DMA_TCR4 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008024)))
3919#define MCF548X_DMA_TCR5 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008026)))
3920#define MCF548X_DMA_TCR6 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008028)))
3921#define MCF548X_DMA_TCR7 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00802A)))
3922#define MCF548X_DMA_TCR8 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00802C)))
3923#define MCF548X_DMA_TCR9 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00802E)))
3924#define MCF548X_DMA_TCR10 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008030)))
3925#define MCF548X_DMA_TCR11 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008032)))
3926#define MCF548X_DMA_TCR12 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008034)))
3927#define MCF548X_DMA_TCR13 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008036)))
3928#define MCF548X_DMA_TCR14 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x008038)))
3929#define MCF548X_DMA_TCR15 (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00803A)))
3930#define MCF548X_DMA_TCRn(x) (*(volatile uint16_t*)((uintptr_t)__MBAR + (0x00801CU+((x)*0x002))))
3931#define MCF548X_DMA_IMCR (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x00805C)))
3932#define MCF548X_DMA_PTDDBG (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x008080)))
3933
3934/* Bit definitions and macros for MCF548X_DMA_DIPR */
3935#define MCF548X_DMA_DIPR_TASK0 (0x00000001)
3936#define MCF548X_DMA_DIPR_TASK1 (0x00000002)
3937#define MCF548X_DMA_DIPR_TASK2 (0x00000004)
3938#define MCF548X_DMA_DIPR_TASK3 (0x00000008)
3939#define MCF548X_DMA_DIPR_TASK4 (0x00000010)
3940#define MCF548X_DMA_DIPR_TASK5 (0x00000020)
3941#define MCF548X_DMA_DIPR_TASK6 (0x00000040)
3942#define MCF548X_DMA_DIPR_TASK7 (0x00000080)
3943#define MCF548X_DMA_DIPR_TASK8 (0x00000100)
3944#define MCF548X_DMA_DIPR_TASK9 (0x00000200)
3945#define MCF548X_DMA_DIPR_TASK10 (0x00000400)
3946#define MCF548X_DMA_DIPR_TASK11 (0x00000800)
3947#define MCF548X_DMA_DIPR_TASK12 (0x00001000)
3948#define MCF548X_DMA_DIPR_TASK13 (0x00002000)
3949#define MCF548X_DMA_DIPR_TASK14 (0x00004000)
3950#define MCF548X_DMA_DIPR_TASK15 (0x00008000)
3951
3952/* Bit definitions and macros for MCF548X_DMA_DIMR */
3953#define MCF548X_DMA_DIMR_TASK0 (0x00000001)
3954#define MCF548X_DMA_DIMR_TASK1 (0x00000002)
3955#define MCF548X_DMA_DIMR_TASK2 (0x00000004)
3956#define MCF548X_DMA_DIMR_TASK3 (0x00000008)
3957#define MCF548X_DMA_DIMR_TASK4 (0x00000010)
3958#define MCF548X_DMA_DIMR_TASK5 (0x00000020)
3959#define MCF548X_DMA_DIMR_TASK6 (0x00000040)
3960#define MCF548X_DMA_DIMR_TASK7 (0x00000080)
3961#define MCF548X_DMA_DIMR_TASK8 (0x00000100)
3962#define MCF548X_DMA_DIMR_TASK9 (0x00000200)
3963#define MCF548X_DMA_DIMR_TASK10 (0x00000400)
3964#define MCF548X_DMA_DIMR_TASK11 (0x00000800)
3965#define MCF548X_DMA_DIMR_TASK12 (0x00001000)
3966#define MCF548X_DMA_DIMR_TASK13 (0x00002000)
3967#define MCF548X_DMA_DIMR_TASK14 (0x00004000)
3968#define MCF548X_DMA_DIMR_TASK15 (0x00008000)
3969
3970/* Bit definitions and macros for MCF548X_DMA_IMCR */
3971#define MCF548X_DMA_IMCR_SRC16(x) (((x)&0x00000003)<<0)
3972#define MCF548X_DMA_IMCR_SRC17(x) (((x)&0x00000003)<<2)
3973#define MCF548X_DMA_IMCR_SRC18(x) (((x)&0x00000003)<<4)
3974#define MCF548X_DMA_IMCR_SRC19(x) (((x)&0x00000003)<<6)
3975#define MCF548X_DMA_IMCR_SRC20(x) (((x)&0x00000003)<<8)
3976#define MCF548X_DMA_IMCR_SRC21(x) (((x)&0x00000003)<<10)
3977#define MCF548X_DMA_IMCR_SRC22(x) (((x)&0x00000003)<<12)
3978#define MCF548X_DMA_IMCR_SRC23(x) (((x)&0x00000003)<<14)
3979#define MCF548X_DMA_IMCR_SRC24(x) (((x)&0x00000003)<<16)
3980#define MCF548X_DMA_IMCR_SRC25(x) (((x)&0x00000003)<<18)
3981#define MCF548X_DMA_IMCR_SRC26(x) (((x)&0x00000003)<<20)
3982#define MCF548X_DMA_IMCR_SRC27(x) (((x)&0x00000003)<<22)
3983#define MCF548X_DMA_IMCR_SRC28(x) (((x)&0x00000003)<<24)
3984#define MCF548X_DMA_IMCR_SRC29(x) (((x)&0x00000003)<<26)
3985#define MCF548X_DMA_IMCR_SRC30(x) (((x)&0x00000003)<<28)
3986#define MCF548X_DMA_IMCR_SRC31(x) (((x)&0x00000003)<<30)
3987#define MCF548X_DMA_IMCR_SRC16_FEC0RX (0x00000000)
3988#define MCF548X_DMA_IMCR_SRC17_FEC0TX (0x00000000)
3989#define MCF548X_DMA_IMCR_SRC18_FEC0RX (0x00000020)
3990#define MCF548X_DMA_IMCR_SRC19_FEC0TX (0x00000080)
3991#define MCF548X_DMA_IMCR_SRC20_FEC1RX (0x00000100)
3992#define MCF548X_DMA_IMCR_SRC21_DREQ1 (0x00000000)
3993#define MCF548X_DMA_IMCR_SRC21_FEC1TX (0x00000400)
3994#define MCF548X_DMA_IMCR_SRC22_FEC0RX (0x00001000)
3995#define MCF548X_DMA_IMCR_SRC23_FEC0TX (0x00004000)
3996#define MCF548X_DMA_IMCR_SRC24_CTM0 (0x00010000)
3997#define MCF548X_DMA_IMCR_SRC24_FEC1RX (0x00020000)
3998#define MCF548X_DMA_IMCR_SRC25_CTM1 (0x00040000)
3999#define MCF548X_DMA_IMCR_SRC25_FEC1TX (0x00080000)
4000#define MCF548X_DMA_IMCR_SRC26_USBEP4 (0x00000000)
4001#define MCF548X_DMA_IMCR_SRC26_CTM2 (0x00200000)
4002#define MCF548X_DMA_IMCR_SRC27_USBEP5 (0x00000000)
4003#define MCF548X_DMA_IMCR_SRC27_CTM3 (0x00800000)
4004#define MCF548X_DMA_IMCR_SRC28_USBEP6 (0x00000000)
4005#define MCF548X_DMA_IMCR_SRC28_CTM4 (0x01000000)
4006#define MCF548X_DMA_IMCR_SRC28_DREQ1 (0x02000000)
4007#define MCF548X_DMA_IMCR_SRC28_PSC2RX (0x03000000)
4008#define MCF548X_DMA_IMCR_SRC29_DREQ1 (0x04000000)
4009#define MCF548X_DMA_IMCR_SRC29_CTM5 (0x08000000)
4010#define MCF548X_DMA_IMCR_SRC29_PSC2TX (0x0C000000)
4011#define MCF548X_DMA_IMCR_SRC30_FEC1RX (0x00000000)
4012#define MCF548X_DMA_IMCR_SRC30_CTM6 (0x10000000)
4013#define MCF548X_DMA_IMCR_SRC30_PSC3RX (0x30000000)
4014#define MCF548X_DMA_IMCR_SRC31_FEC1TX (0x00000000)
4015#define MCF548X_DMA_IMCR_SRC31_CTM7 (0x80000000)
4016#define MCF548X_DMA_IMCR_SRC31_PSC3TX (0xC0000000)
4017
4018
4019/*********************************************************************
4020*
4021* Multi-Channel DMA External Requests (DMA_EREQ)
4022*
4023*********************************************************************/
4024
4025/* Register read/write macros */
4026#define MCF548X_DMA_EREQ_EREQBAR0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000D00)))
4027#define MCF548X_DMA_EREQ_EREQMASK0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000D04)))
4028#define MCF548X_DMA_EREQ_EREQCTRL0 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000D08)))
4029#define MCF548X_DMA_EREQ_EREQBAR1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000D10)))
4030#define MCF548X_DMA_EREQ_EREQMASK1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000D14)))
4031#define MCF548X_DMA_EREQ_EREQCTRL1 (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000D18)))
4032#define MCF548X_DMA_EREQ_EREQBAR(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000D00U+((x)*0x010))))
4033#define MCF548X_DMA_EREQ_EREQMASK(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000D04U+((x)*0x010))))
4034#define MCF548X_DMA_EREQ_EREQCTRL(x) (*(volatile uint32_t*)((uintptr_t)__MBAR + (0x000D08U+((x)*0x010))))
4035
4036/* Bit definitions and macros for MCF548X_DMA_EREQ_EREQCTRL */
4037#define MCF548X_DMA_EREQ_EREQCTRL_EN (0x00000001)
4038#define MCF548X_DMA_EREQ_EREQCTRL_SYNC (0x00000002)
4039#define MCF548X_DMA_EREQ_EREQCTRL_DACKWID(x) (((x)&0x00000003)<<2)
4040#define MCF548X_DMA_EREQ_EREQCTRL_BSEL(x) (((x)&0x00000003)<<4)
4041#define MCF548X_DMA_EREQ_EREQCTRL_MD(x) (((x)&0x00000003)<<6)
4042#define MCF548X_DMA_EREQ_EREQCTRL_MD_IDLE (0x00000000)
4043#define MCF548X_DMA_EREQ_EREQCTRL_MD_LEVEL (0x00000040)
4044#define MCF548X_DMA_EREQ_EREQCTRL_MD_EDGE (0x00000080)
4045#define MCF548X_DMA_EREQ_EREQCTRL_MD_PIPED (0x000000C0)
4046#define MCF548X_DMA_EREQ_EREQCTRL_BSEL_MEM_WRITE (0x00000000)
4047#define MCF548X_DMA_EREQ_EREQCTRL_BSEL_MEM_READ (0x00000010)
4048#define MCF548X_DMA_EREQ_EREQCTRL_BSEL_PERIPH_WRITE (0x00000020)
4049#define MCF548X_DMA_EREQ_EREQCTRL_BSEL_PERIPH_READ (0x00000030)
4050#define MCF548X_DMA_EREQ_EREQCTRL_DACKWID_ONE (0x00000000)
4051#define MCF548X_DMA_EREQ_EREQCTRL_DACKWID_TWO (0x00000004)
4052#define MCF548X_DMA_EREQ_EREQCTRL_DACKWID_THREE (0x00000008)
4053#define MCF548X_DMA_EREQ_EREQCTRL_DACKWID_FOUR (0x0000000C)
4054
4055/*********************************************************************/
4056
4057#endif /* __MCF548X_H__ */
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