RTEMS 6.1-rc5
Loading...
Searching...
No Matches
Macros
idtcpu.h File Reference

CPU Related Definitions. More...

Go to the source code of this file.

Macros

#define K0BASE   0x80000000
 
#define K0SIZE   0x20000000
 
#define K1BASE   0xa0000000
 
#define K1SIZE   0x20000000
 
#define K2BASE   0xc0000000
 
#define K2SIZE   0x20000000
 
#define KUBASE   0
 
#define KUSIZE   0x80000000
 
#define R_VEC   (K1BASE+0x1fc00000) /* reset vector */
 
#define CAST(as)
 
#define K0_TO_K1(x)   (CAST(unsigned)(x)|0xA0000000) /* kseg0 to kseg1 */
 
#define K1_TO_K0(x)   (CAST(unsigned)(x)&0x9FFFFFFF) /* kseg1 to kseg0 */
 
#define K0_TO_PHYS(x)   (CAST(unsigned)(x)&0x1FFFFFFF) /* kseg0 to physical */
 
#define K1_TO_PHYS(x)   (CAST(unsigned)(x)&0x1FFFFFFF) /* kseg1 to physical */
 
#define PHYS_TO_K0(x)   (CAST(unsigned)(x)|0x80000000) /* physical to kseg0 */
 
#define PHYS_TO_K1(x)   (CAST(unsigned)(x)|0xA0000000) /* physical to kseg1 */
 
#define MINCACHE   0x200 /* 512 For 3041. */
 
#define MAXCACHE   0x40000 /* 256*1024 256k */
 
#define CAUSE_BD   0x80000000 /* Branch delay slot */
 
#define CAUSE_BT   0x40000000 /* Branch Taken */
 
#define CAUSE_CEMASK   0x30000000 /* coprocessor error */
 
#define CAUSE_CESHIFT   28
 
#define CAUSE_IPMASK   0x0000FF00 /* Pending interrupt mask */
 
#define CAUSE_IPSHIFT   8
 
#define CAUSE_EXCMASK   0x0000003C /* Cause code bits */
 
#define CAUSE_EXCSHIFT   2
 
#define C0_INX   $0 /* tlb index */
 
#define C0_RAND   $1 /* tlb random */
 
#define C0_CTXT   $4 /* tlb context */
 
#define C0_BADVADDR   $8 /* bad virtual address */
 
#define C0_TLBHI   $10 /* tlb entry hi */
 
#define C0_SR   $12 /* status register */
 
#define C0_CAUSE   $13 /* exception cause */
 
#define C0_EPC   $14 /* exception pc */
 
#define C0_PRID   $15 /* revision identifier */
 
#define C1_REVISION   $0
 
#define C1_STATUS   $31
 

Detailed Description

CPU Related Definitions.

950313: Ketan added sreg/lreg and R_SZ for 64-bit saves added Register definition for XContext reg. Look towards end of this file.