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RTEMS 6.1-rc5
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34#ifndef _DEV_MARVELL_GTI2CREG_H_
35#define _DEV_MARVELL_GTI2CREG_H_
37#define I2C_REG_SlaveAddr 0xc000
38#define I2C_REG_ExtSlaveAddr 0xc010
39#define I2C_REG_Data 0xc004
40#define I2C_REG_Control 0xc008
41#define I2C_REG_Status 0xc00c
42#define I2C_REG_BaudRate 0xc00c
43#define I2C_REG_SoftReset 0xc01c
45#define I2C_SlaveAddr_GCE 0x0001
46#define I2C_SlaveAddr_SAddr 0x7E
48#define I2C_Control_ACK 0x04
49#define I2C_Control_IFlg 0x08
50#define I2C_Control_Stop 0x10
51#define I2C_Control_Start 0x20
52#define I2C_Control_TWSIEn 0x40
53#define I2C_Control_IntEn 0x80
60#define I2C_BaudRate(M, N) (((M) << 3) | (N))
61#define I2C_BaudRate_62_5K I2C_BaudRate(4, 4)
62#define I2C_BaudRate_96_2K I2C_BaudRate(13, 3)
64#define I2C_Status_BusError 0x00
65#define I2C_Status_Started 0x08
66#define I2C_Status_ReStarted 0x10
67#define I2C_Status_AddrWriteAck 0x18
68#define I2C_Status_AddrWriteNoAck 0x20
69#define I2C_Status_MasterWriteAck 0x28
70#define I2C_Status_MasterWriteNoAck 0x30
71#define I2C_Status_MasterLostArb 0x38
73#define I2C_Status_AddrReadAck 0x40
74#define I2C_Status_AddrReadNoAck 0x48
75#define I2C_Status_MasterReadAck 0x50
76#define I2C_Status_MasterReadNoAck 0x58
77#define I2C_Status_2ndAddrWriteAck 0xd0
78#define I2C_Status_2ndAddrWriteNoAck 0xd8
79#define I2C_Status_2ndAddrReadAck 0xe0
80#define I2C_Status_2ndAddrReadNoAck 0xe8
81#define I2C_Status_Idle 0xf8