RTEMS 6.1-rc5
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fsl_sema4.h
1/*
2 * Copyright 2017-2020, 2022 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8#ifndef _FSL_SEMA4_H_
9#define _FSL_SEMA4_H_
10
11#include "fsl_common.h"
12
18/******************************************************************************
19 * Definitions
20 *****************************************************************************/
21
25#define FSL_SEMA4_DRIVER_VERSION (MAKE_VERSION(2, 0, 3))
29#define SEMA4_GATE_NUM_RESET_ALL (64U)
30
31#if defined(SEMA4_GATE_COUNT)
32
36#define SEMA4_GATEn(base, n) ((base)->GATE[(n)])
37
38#ifndef FSL_FEATURE_SEMA4_GATE_COUNT
39#define FSL_FEATURE_SEMA4_GATE_COUNT SEMA4_GATE_COUNT
40#endif
41
42#else
43
47#define SEMA4_GATEn(base, n) (((volatile uint8_t *)(&((base)->Gate00)))[(n)])
48
49#endif
50
51/*******************************************************************************
52 * API
53 ******************************************************************************/
54
55#if defined(__cplusplus)
56extern "C" {
57#endif
58
69void SEMA4_Init(SEMA4_Type *base);
70
78void SEMA4_Deinit(SEMA4_Type *base);
79
93status_t SEMA4_TryLock(SEMA4_Type *base, uint8_t gateNum, uint8_t procNum);
94
106void SEMA4_Lock(SEMA4_Type *base, uint8_t gateNum, uint8_t procNum);
107
119static inline void SEMA4_Unlock(SEMA4_Type *base, uint8_t gateNum)
120{
121 assert(gateNum < (uint8_t)FSL_FEATURE_SEMA4_GATE_COUNT);
122
123 SEMA4_GATEn(base, gateNum) = 0U;
124}
125
137static inline int32_t SEMA4_GetLockProc(SEMA4_Type *base, uint8_t gateNum)
138{
139 assert(gateNum < (uint8_t)FSL_FEATURE_SEMA4_GATE_COUNT);
140
141 return (int32_t)(SEMA4_GATEn(base, gateNum)) - 1;
142}
143
155status_t SEMA4_ResetGate(SEMA4_Type *base, uint8_t gateNum);
156
167static inline status_t SEMA4_ResetAllGates(SEMA4_Type *base)
168{
170}
171
183static inline void SEMA4_EnableGateNotifyInterrupt(SEMA4_Type *base, uint8_t procNum, uint32_t mask)
184{
185 mask = __REV(__RBIT(mask));
186 base->CPINE[procNum].CPINE |= (uint16_t)mask;
187}
188
200static inline void SEMA4_DisableGateNotifyInterrupt(SEMA4_Type *base, uint8_t procNum, uint32_t mask)
201{
202 mask = __REV(__RBIT(mask));
203 base->CPINE[procNum].CPINE &= (uint16_t)(~mask);
204}
205
219static inline uint32_t SEMA4_GetGateNotifyStatus(SEMA4_Type *base, uint8_t procNum)
220{
221 return __REV(__RBIT(base->CPNTF[procNum].CPNTF));
222}
223
235status_t SEMA4_ResetGateNotify(SEMA4_Type *base, uint8_t gateNum);
236
247static inline status_t SEMA4_ResetAllGateNotify(SEMA4_Type *base)
248{
250}
251
252#if defined(__cplusplus)
253}
254#endif
255
260#endif /* _FSL_SEMA4_H_ */
__STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
Reverse byte order (32 bit)
Definition: cmsis_gcc.h:309
__STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
Reverse bit order of value.
Definition: cmsis_gcc.h:390
int32_t status_t
Type used for all status and error return values.
Definition: fsl_common.h:225
status_t SEMA4_TryLock(SEMA4_Type *base, uint8_t gateNum, uint8_t procNum)
Tries to lock the SEMA4 gate.
Definition: fsl_sema4.c:134
status_t SEMA4_ResetGateNotify(SEMA4_Type *base, uint8_t gateNum)
Resets the SEMA4 gate IRQ notification.
Definition: fsl_sema4.c:226
void SEMA4_Init(SEMA4_Type *base)
Initializes the SEMA4 module.
Definition: fsl_sema4.c:96
#define SEMA4_GATE_NUM_RESET_ALL
The number to reset all SEMA4 gates.
Definition: fsl_sema4.h:29
status_t SEMA4_ResetGate(SEMA4_Type *base, uint8_t gateNum)
Resets the SEMA4 gate to an unlocked status.
Definition: fsl_sema4.c:187
void SEMA4_Lock(SEMA4_Type *base, uint8_t gateNum, uint8_t procNum)
Locks the SEMA4 gate.
Definition: fsl_sema4.c:169
#define SEMA4_GATEn(base, n)
SEMA4 gate n register address.
Definition: fsl_sema4.h:47
void SEMA4_Deinit(SEMA4_Type *base)
De-initializes the SEMA4 module.
Definition: fsl_sema4.c:112
Definition: MIMXRT1166_cm4.h:72888