RTEMS 6.1-rc5
Loading...
Searching...
No Matches
fsl_elcdif.h
1/*
2 * Copyright 2017-2022 NXP
3 * All rights reserved.
4 *
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9#ifndef _FSL_ELCDIF_H_
10#define _FSL_ELCDIF_H_
11
12#include "fsl_common.h"
13
14#if (defined(FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET) && (0 != FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET))
15#include "fsl_memory.h"
16#endif
17
23/*******************************************************************************
24 * Definitions
25 ******************************************************************************/
26
30#define FSL_ELCDIF_DRIVER_VERSION (MAKE_VERSION(2, 0, 5))
33/* All IRQ flags in CTRL1 register. */
34#define ELCDIF_CTRL1_IRQ_MASK \
35 (LCDIF_CTRL1_BM_ERROR_IRQ_MASK | LCDIF_CTRL1_OVERFLOW_IRQ_MASK | LCDIF_CTRL1_UNDERFLOW_IRQ_MASK | \
36 LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_MASK | LCDIF_CTRL1_VSYNC_EDGE_IRQ_MASK)
37
38/* All IRQ enable control bits in CTRL1 register. */
39#define ELCDIF_CTRL1_IRQ_EN_MASK \
40 (LCDIF_CTRL1_BM_ERROR_IRQ_EN_MASK | LCDIF_CTRL1_OVERFLOW_IRQ_EN_MASK | LCDIF_CTRL1_UNDERFLOW_IRQ_EN_MASK | \
41 LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_EN_MASK | LCDIF_CTRL1_VSYNC_EDGE_IRQ_EN_MASK)
42
43/* All IRQ flags in AS_CTRL register. */
44#if defined(LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_MASK)
45#define ELCDIF_AS_CTRL_IRQ_MASK (LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_MASK)
46#else
47#define ELCDIF_AS_CTRL_IRQ_MASK 0U
48#endif
49
50/* All IRQ enable control bits in AS_CTRL register. */
51#if defined(LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_EN_MASK)
52#define ELCDIF_AS_CTRL_IRQ_EN_MASK (LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_EN_MASK)
53#else
54#define ELCDIF_AS_CTRL_IRQ_EN_MASK 0U
55#endif
56
57#if ((0 != (ELCDIF_CTRL1_IRQ_MASK & ELCDIF_AS_CTRL_IRQ_MASK)) || \
58 (0 != (ELCDIF_AS_CTRL_IRQ_MASK & ELCDIF_AS_CTRL_IRQ_EN_MASK)))
59#error Interrupt bits overlap, need to update the interrupt functions.
60#endif
61
62#if defined(LCDIF_CTRL_ENABLE_PXP_HANDSHAKE_MASK)
63#define FSL_FEATURE_LCDIF_HAS_PXP_HANDSHAKE 1
64#else
65#define FSL_FEATURE_LCDIF_HAS_PXP_HANDSHAKE 0
66#endif
67
68#if (defined(FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET) && (0 != FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET))
69#define ELCDIF_ADDR_CPU_2_IP(addr) (MEMORY_ConvertMemoryMapAddress((uint32_t)(addr), kMEMORY_Local2DMA))
70#else
71#define ELCDIF_ADDR_CPU_2_IP(addr) (addr)
72#endif /* FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET */
73
74/* LUT memory entery number. */
75#define ELCDIF_LUT_ENTRY_NUM 256U
76
81{
88 kELCDIF_VsyncActiveHigh = LCDIF_VDCTRL0_VSYNC_POL_MASK,
89 kELCDIF_HsyncActiveHigh = LCDIF_VDCTRL0_HSYNC_POL_MASK,
90 kELCDIF_DataEnableActiveHigh = LCDIF_VDCTRL0_ENABLE_POL_MASK,
91 kELCDIF_DriveDataOnRisingClkEdge = LCDIF_VDCTRL0_DOTCLK_POL_MASK,
94};
95
100{
101 kELCDIF_BusMasterErrorInterruptEnable = LCDIF_CTRL1_BM_ERROR_IRQ_EN_MASK,
102 kELCDIF_TxFifoOverflowInterruptEnable = LCDIF_CTRL1_OVERFLOW_IRQ_EN_MASK,
103 kELCDIF_TxFifoUnderflowInterruptEnable = LCDIF_CTRL1_UNDERFLOW_IRQ_EN_MASK,
105 LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_EN_MASK,
107 LCDIF_CTRL1_VSYNC_EDGE_IRQ_EN_MASK,
108#if defined(LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_EN_MASK)
109 kELCDIF_SciSyncOnInterruptEnable =
110 LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_EN_MASK,
111#endif
112};
113
118{
119 kELCDIF_BusMasterError = LCDIF_CTRL1_BM_ERROR_IRQ_MASK,
120 kELCDIF_TxFifoOverflow = LCDIF_CTRL1_OVERFLOW_IRQ_MASK,
121 kELCDIF_TxFifoUnderflow = LCDIF_CTRL1_UNDERFLOW_IRQ_MASK,
123 LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_MASK,
124 kELCDIF_VsyncEdge = LCDIF_CTRL1_VSYNC_EDGE_IRQ_MASK,
125#if defined(LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_MASK)
126 kELCDIF_SciSyncOn = LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_MASK,
127#endif
128};
129
134{
135 kELCDIF_LFifoFull = LCDIF_STAT_LFIFO_FULL_MASK,
136 kELCDIF_LFifoEmpty = LCDIF_STAT_LFIFO_EMPTY_MASK,
137 kELCDIF_TxFifoFull = LCDIF_STAT_TXFIFO_FULL_MASK,
138 kELCDIF_TxFifoEmpty = LCDIF_STAT_TXFIFO_EMPTY_MASK,
139#if defined(LCDIF_STAT_BUSY_MASK)
140 kELCDIF_LcdControllerBusy = LCDIF_STAT_BUSY_MASK,
141#endif
142#if defined(LCDIF_STAT_DVI_CURRENT_FIELD_MASK)
143 kELCDIF_CurDviField2 = LCDIF_STAT_DVI_CURRENT_FIELD_MASK,
145#endif
146};
147
155{
163
166{
172
184{
185 uint32_t regCtrl;
186 uint32_t regCtrl1;
188
193{
194 uint16_t panelWidth;
195 uint16_t panelHeight;
196 uint8_t hsw;
197 uint8_t hfp;
198 uint8_t hbp;
199 uint8_t vsw;
200 uint8_t vfp;
201 uint8_t vbp;
202 uint32_t polarityFlags;
203 uint32_t bufferAddr;
207
212{
221
226{
227 uint32_t bufferAddr;
230
235{
244
255{
269
274{
275 uint8_t alpha;
281
291typedef enum _elcdif_lut
292{
296
297/*******************************************************************************
298 * APIs
299 ******************************************************************************/
300
301#if defined(__cplusplus)
302extern "C" {
303#endif /* __cplusplus */
304
320
347
353void ELCDIF_Deinit(LCDIF_Type *base);
354
355/* @} */
356
369
375static inline void ELCDIF_RgbModeStart(LCDIF_Type *base)
376{
377 base->CTRL_SET = LCDIF_CTRL_RUN_MASK | LCDIF_CTRL_DOTCLK_MODE_MASK;
378}
379
386
393static inline void ELCDIF_SetNextBufferAddr(LCDIF_Type *base, uint32_t bufferAddr)
394{
395 base->NEXT_BUF = ELCDIF_ADDR_CPU_2_IP(bufferAddr);
396}
397
403void ELCDIF_Reset(LCDIF_Type *base);
404
405#if !(defined(FSL_FEATURE_LCDIF_HAS_NO_RESET_PIN) && (0 != FSL_FEATURE_LCDIF_HAS_NO_RESET_PIN))
412static inline void ELCDIF_PullUpResetPin(LCDIF_Type *base, bool pullUp)
413{
414 if (pullUp)
415 {
416 base->CTRL1_SET = LCDIF_CTRL1_RESET_MASK;
417 }
418 else
419 {
420 base->CTRL1_CLR = LCDIF_CTRL1_RESET_MASK;
421 }
422}
423#endif
424
425#if (defined(FSL_FEATURE_LCDIF_HAS_PXP_HANDSHAKE) && (0 != FSL_FEATURE_LCDIF_HAS_PXP_HANDSHAKE))
432static inline void ELCDIF_EnablePxpHandShake(LCDIF_Type *base, bool enable)
433{
434 if (enable)
435 {
436 base->CTRL_SET = LCDIF_CTRL_ENABLE_PXP_HANDSHAKE_MASK;
437 }
438 else
439 {
440 base->CTRL_CLR = LCDIF_CTRL_ENABLE_PXP_HANDSHAKE_MASK;
441 }
442}
443#endif
444
445/* @} */
446
463static inline uint32_t ELCDIF_GetCrcValue(const LCDIF_Type *base)
464{
465 return base->CRC_STAT;
466}
467
478static inline uint32_t ELCDIF_GetBusMasterErrorAddr(const LCDIF_Type *base)
479{
480 return base->BM_ERROR_STAT;
481}
482
505static inline uint32_t ELCDIF_GetStatus(const LCDIF_Type *base)
506{
507 return base->STAT & (LCDIF_STAT_LFIFO_FULL_MASK | LCDIF_STAT_LFIFO_EMPTY_MASK | LCDIF_STAT_TXFIFO_FULL_MASK |
508 LCDIF_STAT_TXFIFO_EMPTY_MASK
509#if defined(LCDIF_STAT_BUSY_MASK)
510 | LCDIF_STAT_BUSY_MASK
511#endif
512#if defined(LCDIF_STAT_DVI_CURRENT_FIELD_MASK)
513 | LCDIF_STAT_DVI_CURRENT_FIELD_MASK
514#endif
515 );
516}
517
524static inline uint32_t ELCDIF_GetLFifoCount(const LCDIF_Type *base)
525{
526 return (base->STAT & LCDIF_STAT_LFIFO_COUNT_MASK) >> LCDIF_STAT_LFIFO_COUNT_SHIFT;
527}
528
529/* @} */
530
542static inline void ELCDIF_EnableInterrupts(LCDIF_Type *base, uint32_t mask)
543{
544 base->CTRL1_SET = (mask & ELCDIF_CTRL1_IRQ_EN_MASK);
545#if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && (0 != FSL_FEATURE_LCDIF_HAS_NO_AS))
546 base->AS_CTRL |= (mask & ELCDIF_AS_CTRL_IRQ_EN_MASK);
547#endif
548}
549
556static inline void ELCDIF_DisableInterrupts(LCDIF_Type *base, uint32_t mask)
557{
558 base->CTRL1_CLR = (mask & ELCDIF_CTRL1_IRQ_EN_MASK);
559#if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && (0 != FSL_FEATURE_LCDIF_HAS_NO_AS))
560 base->AS_CTRL &= ~(mask & ELCDIF_AS_CTRL_IRQ_EN_MASK);
561#endif
562}
563
570static inline uint32_t ELCDIF_GetInterruptStatus(const LCDIF_Type *base)
571{
572 uint32_t flags;
573
574 flags = (base->CTRL1 & ELCDIF_CTRL1_IRQ_MASK);
575#if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && (0 != FSL_FEATURE_LCDIF_HAS_NO_AS))
576 flags |= (base->AS_CTRL & ELCDIF_AS_CTRL_IRQ_MASK);
577#endif
578
579 return flags;
580}
581
588static inline void ELCDIF_ClearInterruptStatus(LCDIF_Type *base, uint32_t mask)
589{
590 base->CTRL1_CLR = (mask & ELCDIF_CTRL1_IRQ_MASK);
591#if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && (0 != FSL_FEATURE_LCDIF_HAS_NO_AS))
592 base->AS_CTRL &= ~(mask & ELCDIF_AS_CTRL_IRQ_MASK);
593#endif
594}
595
596/* @} */
597
598#if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && (0 != FSL_FEATURE_LCDIF_HAS_NO_AS))
611
619
626static inline void ELCDIF_SetNextAlphaSurfaceBufferAddr(LCDIF_Type *base, uint32_t bufferAddr)
627{
628 base->AS_NEXT_BUF = ELCDIF_ADDR_CPU_2_IP(bufferAddr);
629}
630
644static inline void ELCDIF_SetOverlayColorKey(LCDIF_Type *base, uint32_t colorKeyLow, uint32_t colorKeyHigh)
645{
646 base->AS_CLRKEYLOW = colorKeyLow;
647 base->AS_CLRKEYHIGH = colorKeyHigh;
648}
649
656static inline void ELCDIF_EnableOverlayColorKey(LCDIF_Type *base, bool enable)
657{
658 if (enable)
659 {
660 base->AS_CTRL |= LCDIF_AS_CTRL_ENABLE_COLORKEY_MASK;
661 }
662 else
663 {
664 base->AS_CTRL &= ~LCDIF_AS_CTRL_ENABLE_COLORKEY_MASK;
665 }
666}
667
674static inline void ELCDIF_EnableAlphaSurface(LCDIF_Type *base, bool enable)
675{
676 if (enable)
677 {
678 base->AS_CTRL |= LCDIF_AS_CTRL_AS_ENABLE_MASK;
679 }
680 else
681 {
682 base->AS_CTRL &= ~LCDIF_AS_CTRL_AS_ENABLE_MASK;
683 }
684}
685
695static inline void ELCDIF_EnableProcessSurface(LCDIF_Type *base, bool enable)
696{
697 if (enable)
698 {
699 base->AS_CTRL &= ~LCDIF_AS_CTRL_PS_DISABLE_MASK;
700 }
701 else
702 {
703 base->AS_CTRL |= LCDIF_AS_CTRL_PS_DISABLE_MASK;
704 }
705}
706
707/* @} */
708#endif /* FSL_FEATURE_LCDIF_HAS_NO_AS */
709
710#if (defined(FSL_FEATURE_LCDIF_HAS_LUT) && (0 != FSL_FEATURE_LCDIF_HAS_LUT))
729static inline void ELCDIF_EnableLut(LCDIF_Type *base, bool enable)
730{
731 if (enable)
732 {
733 base->LUT_CTRL &= ~LCDIF_LUT_CTRL_LUT_BYPASS_MASK;
734 }
735 else
736 {
737 base->LUT_CTRL |= LCDIF_LUT_CTRL_LUT_BYPASS_MASK;
738 }
739}
740
755status_t ELCDIF_UpdateLut(
756 LCDIF_Type *base, elcdif_lut_t lut, uint16_t startIndex, const uint32_t *lutData, uint16_t count);
757
758/* @} */
759#endif /* FSL_FEATURE_LCDIF_HAS_LUT */
760
761#if defined(__cplusplus)
762}
763#endif /* __cplusplus */
764
765/* @} */
766
767#endif /*_FSL_ELCDIF_H_*/
#define LCDIF_CTRL_LCD_DATABUS_WIDTH(x)
Definition: MIMXRT1052.h:27501
uint8_t hfp
Definition: fsl_elcdif.h:197
_elcdif_status_flags
eLCDIF status flags
Definition: fsl_elcdif.h:134
elcdif_as_pixel_format_t pixelFormat
Definition: fsl_elcdif.h:228
_elcdif_as_pixel_format
eLCDIF alpha surface pixel format.
Definition: fsl_elcdif.h:212
enum _elcdif_as_pixel_format elcdif_as_pixel_format_t
eLCDIF alpha surface pixel format.
uint32_t polarityFlags
Definition: fsl_elcdif.h:202
elcdif_rop_mode_t ropMode
Definition: fsl_elcdif.h:279
_elcdif_pixel_format
The pixel format.
Definition: fsl_elcdif.h:155
enum _elcdif_rop_mode elcdif_rop_mode_t
eLCDIF ROP mode during blending.
bool invertAlpha
Definition: fsl_elcdif.h:277
enum _elcdif_lut elcdif_lut_t
eLCDIF LUT
elcdif_pixel_format_t pixelFormat
Definition: fsl_elcdif.h:204
uint8_t vfp
Definition: fsl_elcdif.h:200
_elcdif_alpha_mode
eLCDIF alpha mode during blending.
Definition: fsl_elcdif.h:235
uint32_t regCtrl1
Definition: fsl_elcdif.h:186
elcdif_lcd_data_bus_t dataBus
Definition: fsl_elcdif.h:205
uint32_t bufferAddr
Definition: fsl_elcdif.h:203
_elcdif_lcd_data_bus
The LCD data bus type.
Definition: fsl_elcdif.h:166
uint8_t hsw
Definition: fsl_elcdif.h:196
uint32_t bufferAddr
Definition: fsl_elcdif.h:227
_elcdif_polarity_flags
eLCDIF signal polarity flags
Definition: fsl_elcdif.h:81
void ELCDIF_RgbModeStop(LCDIF_Type *base)
Stop display in RGB (DOTCLK) mode and wait until finished.
Definition: fsl_elcdif.c:240
struct _elcdif_as_buffer_config elcdif_as_buffer_config_t
eLCDIF alpha surface buffer configuration.
enum _elcdif_pixel_format elcdif_pixel_format_t
The pixel format.
enum _elcdif_alpha_mode elcdif_alpha_mode_t
eLCDIF alpha mode during blending.
void ELCDIF_SetAlphaSurfaceBufferConfig(LCDIF_Type *base, const elcdif_as_buffer_config_t *config)
Set the configuration for alpha surface buffer.
Definition: fsl_elcdif.c:299
struct _elcdif_rgb_mode_config elcdif_rgb_mode_config_t
eLCDIF configure structure for RGB mode (DOTCLK mode).
struct _elcdif_pixel_format_reg elcdif_pixel_format_reg_t
The register value when using different pixel format.
struct _elcdif_as_blend_config elcdif_as_blend_config_t
eLCDIF alpha surface blending configuration.
_elcdif_rop_mode
eLCDIF ROP mode during blending.
Definition: fsl_elcdif.h:255
_elcdif_interrupt_enable
The eLCDIF interrupts to enable.
Definition: fsl_elcdif.h:100
void ELCDIF_RgbModeInit(LCDIF_Type *base, const elcdif_rgb_mode_config_t *config)
Initializes the eLCDIF to work in RGB mode (DOTCLK mode).
Definition: fsl_elcdif.c:101
uint16_t panelHeight
Definition: fsl_elcdif.h:195
_elcdif_interrupt_flags
The eLCDIF interrupt status flags.
Definition: fsl_elcdif.h:118
void ELCDIF_Deinit(LCDIF_Type *base)
Deinitializes the eLCDIF peripheral.
Definition: fsl_elcdif.c:221
uint16_t panelWidth
Definition: fsl_elcdif.h:194
elcdif_alpha_mode_t alphaMode
Definition: fsl_elcdif.h:278
void ELCDIF_SetAlphaSurfaceBlendConfig(LCDIF_Type *base, const elcdif_as_blend_config_t *config)
Set the alpha surface blending configuration.
Definition: fsl_elcdif.c:314
enum _elcdif_lcd_data_bus elcdif_lcd_data_bus_t
The LCD data bus type.
void ELCDIF_RgbModeSetPixelFormat(LCDIF_Type *base, elcdif_pixel_format_t pixelFormat)
Set the pixel format in RGB (DOTCLK) mode.
Definition: fsl_elcdif.c:205
uint8_t hbp
Definition: fsl_elcdif.h:198
uint32_t regCtrl
Definition: fsl_elcdif.h:185
uint8_t vbp
Definition: fsl_elcdif.h:201
uint8_t vsw
Definition: fsl_elcdif.h:199
void ELCDIF_Reset(LCDIF_Type *base)
Reset the eLCDIF peripheral.
Definition: fsl_elcdif.c:255
void ELCDIF_RgbModeGetDefaultConfig(elcdif_rgb_mode_config_t *config)
Gets the eLCDIF default configuration structure for RGB (DOTCLK) mode.
Definition: fsl_elcdif.c:177
_elcdif_lut
eLCDIF LUT
Definition: fsl_elcdif.h:292
uint8_t alpha
Definition: fsl_elcdif.h:275
@ kELCDIF_TxFifoEmpty
Definition: fsl_elcdif.h:138
@ kELCDIF_TxFifoFull
Definition: fsl_elcdif.h:137
@ kELCDIF_LFifoEmpty
Definition: fsl_elcdif.h:136
@ kELCDIF_LFifoFull
Definition: fsl_elcdif.h:135
@ kELCDIF_AsPixelFormatARGB1555
Definition: fsl_elcdif.h:215
@ kELCDIF_AsPixelFormatARGB8888
Definition: fsl_elcdif.h:213
@ kELCDIF_AsPixelFormatRGB444
Definition: fsl_elcdif.h:218
@ kELCDIF_AsPixelFormatRGB565
Definition: fsl_elcdif.h:219
@ kELCDIF_AsPixelFormatRGB888
Definition: fsl_elcdif.h:214
@ kELCDIF_AsPixelFormatARGB4444
Definition: fsl_elcdif.h:216
@ kELCDIF_AsPixelFormatRGB555
Definition: fsl_elcdif.h:217
@ kELCDIF_PixelFormatRGB666
Definition: fsl_elcdif.h:158
@ kELCDIF_PixelFormatXRGB8888
Definition: fsl_elcdif.h:160
@ kELCDIF_PixelFormatRGB888
Definition: fsl_elcdif.h:161
@ kELCDIF_PixelFormatRAW8
Definition: fsl_elcdif.h:156
@ kELCDIF_PixelFormatRGB565
Definition: fsl_elcdif.h:157
@ kELCDIF_AlphaOverride
Definition: fsl_elcdif.h:237
@ kELCDIF_AlphaRop
Definition: fsl_elcdif.h:242
@ kELCDIF_AlphaEmbedded
Definition: fsl_elcdif.h:236
@ kELCDIF_AlphaMultiply
Definition: fsl_elcdif.h:238
@ kELCDIF_DataBus16Bit
Definition: fsl_elcdif.h:168
@ kELCDIF_DataBus18Bit
Definition: fsl_elcdif.h:169
@ kELCDIF_DataBus24Bit
Definition: fsl_elcdif.h:170
@ kELCDIF_DataBus8Bit
Definition: fsl_elcdif.h:167
@ kELCDIF_VsyncActiveHigh
Definition: fsl_elcdif.h:88
@ kELCDIF_HsyncActiveLow
Definition: fsl_elcdif.h:83
@ kELCDIF_DriveDataOnRisingClkEdge
Definition: fsl_elcdif.h:91
@ kELCDIF_DataEnableActiveHigh
Definition: fsl_elcdif.h:90
@ kELCDIF_HsyncActiveHigh
Definition: fsl_elcdif.h:89
@ kELCDIF_DriveDataOnFallingClkEdge
Definition: fsl_elcdif.h:85
@ kELCDIF_VsyncActiveLow
Definition: fsl_elcdif.h:82
@ kELCDIF_DataEnableActiveLow
Definition: fsl_elcdif.h:84
@ kELCDIF_RopMergeAs
Definition: fsl_elcdif.h:259
@ kELCDIF_RopMergeNotAs
Definition: fsl_elcdif.h:260
@ kELCDIF_RopNotMaskAs
Definition: fsl_elcdif.h:264
@ kELCDIF_RopNotCopyAs
Definition: fsl_elcdif.h:262
@ kELCDIF_RopMaskAs
Definition: fsl_elcdif.h:256
@ kELCDIF_RopNotMergeAs
Definition: fsl_elcdif.h:265
@ kELCDIF_RopNot
Definition: fsl_elcdif.h:263
@ kELCDIF_RopXorAs
Definition: fsl_elcdif.h:266
@ kELCDIF_RopNotXorAs
Definition: fsl_elcdif.h:267
@ kELCDIF_RopMaskNotAs
Definition: fsl_elcdif.h:257
@ kELCDIF_RopMaskAsNot
Definition: fsl_elcdif.h:258
@ kELCDIF_RopMergeAsNot
Definition: fsl_elcdif.h:261
@ kELCDIF_TxFifoOverflowInterruptEnable
Definition: fsl_elcdif.h:102
@ kELCDIF_CurFrameDoneInterruptEnable
Definition: fsl_elcdif.h:104
@ kELCDIF_VsyncEdgeInterruptEnable
Definition: fsl_elcdif.h:106
@ kELCDIF_BusMasterErrorInterruptEnable
Definition: fsl_elcdif.h:101
@ kELCDIF_TxFifoUnderflowInterruptEnable
Definition: fsl_elcdif.h:103
@ kELCDIF_VsyncEdge
Definition: fsl_elcdif.h:124
@ kELCDIF_TxFifoOverflow
Definition: fsl_elcdif.h:120
@ kELCDIF_BusMasterError
Definition: fsl_elcdif.h:119
@ kELCDIF_CurFrameDone
Definition: fsl_elcdif.h:122
@ kELCDIF_TxFifoUnderflow
Definition: fsl_elcdif.h:121
@ kELCDIF_Lut1
Definition: fsl_elcdif.h:294
@ kELCDIF_Lut0
Definition: fsl_elcdif.h:293
int32_t status_t
Type used for all status and error return values.
Definition: fsl_common.h:225
Definition: MIMXRT1052.h:27360
eLCDIF alpha surface blending configuration.
Definition: fsl_elcdif.h:274
eLCDIF alpha surface buffer configuration.
Definition: fsl_elcdif.h:226
The register value when using different pixel format.
Definition: fsl_elcdif.h:184
eLCDIF configure structure for RGB mode (DOTCLK mode).
Definition: fsl_elcdif.h:193
Definition: deflate.c:114