113#define DAC_ERROR_LOCK 2
115#define DACC_CHANNEL_0 0
116#define DACC_CHANNEL_1 1
131#define DACC_SoftReset(pDACC) ((pDACC)->DACC_CR = DACC_CR_SWRST)
132#define DACC_CfgModeReg(pDACC, mode) { (pDACC)->DACC_MR = (mode); }
133#define DACC_GetModeReg(pDACC) ((pDACC)->DACC_MR)
134#define DACC_CfgTrigger(pDACC, mode) { (pDACC)->DACC_TRIGR = (mode); }
136#define DACC_EnableChannel(pDACC, channel) {(pDACC)->DACC_CHER = (1 << (channel));}
137#define DACC_DisableChannel(pDACC, channel) {(pDACC)->DACC_CHDR = (1 << (channel));}
139#define DACC_EnableIt(pDACC, mode) {(pDACC)->DACC_IER = (mode);}
140#define DACC_DisableIt(pDACC, mode) {(pDACC)->DACC_IDR = (mode);}
141#define DACC_GetStatus(pDACC) ((pDACC)->DACC_ISR)
142#define DACC_GetChannelStatus(pDACC) ((pDACC)->DACC_CHSR)
143#define DACC_GetInterruptMaskStatus(pDACC) ((pDACC)->DACC_IMR)
This header file provides the interfaces of the Assert Handler.
uint32_t Dac_SendData(DacDma *pDacd, DacCmd *pCommand)
Starts a DAC transfer. This is a non blocking function. It will return as soon as the transfer is sta...
Definition: dac_dma.c:211
uint32_t Dac_ConfigureDma(DacDma *pDacd, Dacc *pDacHw, uint8_t DacId, sXdmad *pXdmad)
Initializes the DacDma structure and the corresponding DAC & DMA . hardware select value....
Definition: dac_dma.c:186
void(* DacCallback)(uint8_t, void *)
Definition: dac_dma.h:69
Dac Transfer Request prepared by the application upper layer.
Definition: dac_dma.h:76
uint8_t * pTxBuff
Definition: dac_dma.h:78
void * pArgument
Definition: dac_dma.h:88
DacCallback callback
Definition: dac_dma.h:86
uint16_t TxSize
Definition: dac_dma.h:80
uint8_t dacChannel
Definition: dac_dma.h:84
uint16_t loopback
Definition: dac_dma.h:82
uint8_t dacId
Definition: dac_dma.h:102
sXdmad * pXdmad
Definition: dac_dma.h:100
volatile int8_t semaphore
Definition: dac_dma.h:104
Dacc * pDacHw
Definition: dac_dma.h:96
DacCmd * pCurrentCommand
Definition: dac_dma.h:98
Dacc hardware registers.
Definition: component_dacc.h:41