171#define ACPI_SIG_AEST "AEST"
172#define ACPI_SIG_ASF "ASF!"
173#define ACPI_SIG_ASPT "ASPT"
174#define ACPI_SIG_BERT "BERT"
175#define ACPI_SIG_BGRT "BGRT"
176#define ACPI_SIG_BOOT "BOOT"
177#define ACPI_SIG_CEDT "CEDT"
178#define ACPI_SIG_CPEP "CPEP"
179#define ACPI_SIG_CSRT "CSRT"
180#define ACPI_SIG_DBG2 "DBG2"
181#define ACPI_SIG_DBGP "DBGP"
182#define ACPI_SIG_DMAR "DMAR"
183#define ACPI_SIG_DRTM "DRTM"
184#define ACPI_SIG_ECDT "ECDT"
185#define ACPI_SIG_EINJ "EINJ"
186#define ACPI_SIG_ERST "ERST"
187#define ACPI_SIG_FPDT "FPDT"
188#define ACPI_SIG_GTDT "GTDT"
189#define ACPI_SIG_HEST "HEST"
190#define ACPI_SIG_HMAT "HMAT"
191#define ACPI_SIG_HPET "HPET"
192#define ACPI_SIG_IBFT "IBFT"
193#define ACPI_SIG_MSCT "MSCT"
195#define ACPI_SIG_S3PT "S3PT"
196#define ACPI_SIG_PCCS "PCC"
201#define ACPI_SIG_MATR "MATR"
202#define ACPI_SIG_MSDM "MSDM"
207#ifdef ACPI_UNDEFINED_TABLES
208#define ACPI_SIG_ATKG "ATKG"
209#define ACPI_SIG_GSCI "GSCI"
210#define ACPI_SIG_IEIT "IEIT"
294 ACPI_ASF_TYPE_INFO = 0,
295 ACPI_ASF_TYPE_ALERT = 1,
296 ACPI_ASF_TYPE_CONTROL = 2,
297 ACPI_ASF_TYPE_BOOT = 3,
298 ACPI_ASF_TYPE_ADDRESS = 4,
299 ACPI_ASF_TYPE_RESERVED = 5
312 UINT8 MinPollInterval;
322#define ACPI_ASF_SMBUS_PROTOCOLS (1)
381 UINT8 Capabilities[7];
382 UINT8 CompletionCode;
387 UINT16 OemParameters;
434 ACPI_ASPT_TYPE_GLOBAL_REGS = 0,
435 ACPI_ASPT_TYPE_SEV_MBOX_REGS = 1,
436 ACPI_ASPT_TYPE_ACPI_MBOX_REGS = 2,
437 ACPI_ASPT_TYPE_UNKNOWN = 3,
450 UINT64 FeatureRegAddr;
464 UINT64 CmdRespRegAddr;
465 UINT64 CmdBufLoRegAddr;
466 UINT64 CmdBufHiRegAddr;
477 UINT64 CmdRespRegAddr;
504 UINT32 RawDataOffset;
505 UINT32 RawDataLength;
507 UINT32 ErrorSeverity;
513#define ACPI_BERT_UNCORRECTABLE (1)
514#define ACPI_BERT_CORRECTABLE (1<<1)
515#define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2)
516#define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3)
517#define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4)
521enum AcpiBertErrorSeverity
523 ACPI_BERT_ERROR_CORRECTABLE = 0,
524 ACPI_BERT_ERROR_FATAL = 1,
525 ACPI_BERT_ERROR_CORRECTED = 2,
526 ACPI_BERT_ERROR_NONE = 3,
527 ACPI_BERT_ERROR_RESERVED = 4
557#define ACPI_BGRT_DISPLAYED (1)
558#define ACPI_BGRT_ORIENTATION_OFFSET (3 << 1)
614 ACPI_CDAT_TYPE_DSMAS = 0,
615 ACPI_CDAT_TYPE_DSLBIS = 1,
616 ACPI_CDAT_TYPE_DSMSCIS = 2,
617 ACPI_CDAT_TYPE_DSIS = 3,
618 ACPI_CDAT_TYPE_DSEMTS = 4,
619 ACPI_CDAT_TYPE_SSLBIS = 5,
620 ACPI_CDAT_TYPE_RESERVED = 6
631 UINT64 DpaBaseAddress;
638#define ACPI_CDAT_DSMAS_NON_VOLATILE (1 << 2)
650 UINT64 EntryBaseUnit;
663 UINT64 SideCacheSize;
664 UINT32 CacheAttributes;
681#define ACPI_CDAT_DSIS_MEM_ATTACHED (1 << 0)
703 UINT64 EntryBaseUnit;
714 UINT16 LatencyOrBandwidth;
719#define ACPI_CDAT_SSLBIS_US_PORT 0x0100
720#define ACPI_CDAT_SSLBIS_ANY_PORT 0xffff
751 ACPI_CEDT_TYPE_CHBS = 0,
752 ACPI_CEDT_TYPE_CFMWS = 1,
753 ACPI_CEDT_TYPE_CXIMS = 2,
754 ACPI_CEDT_TYPE_RDPAS = 3,
755 ACPI_CEDT_TYPE_RESERVED = 4,
760#define ACPI_CEDT_CHBS_VERSION_CXL11 (0)
761#define ACPI_CEDT_CHBS_VERSION_CXL20 (1)
765#define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000)
766#define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x10000)
794 UINT8 InterleaveWays;
795 UINT8 InterleaveArithmetic;
800 UINT32 InterleaveTargets[];
806 UINT32 InterleaveTarget;
812#define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0)
813#define ACPI_CEDT_CFMWS_ARITHMETIC_XOR (1)
817#define ACPI_CEDT_CFMWS_RESTRICT_TYPE2 (1)
818#define ACPI_CEDT_CFMWS_RESTRICT_TYPE3 (1<<1)
819#define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE (1<<2)
820#define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1<<3)
821#define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1<<4)
851#define ACPI_CEDT_RDPAS_BUS_MASK 0xff00
852#define ACPI_CEDT_RDPAS_DEVICE_MASK 0x00f8
853#define ACPI_CEDT_RDPAS_FUNCTION_MASK 0x0007
855#define ACPI_CEDT_RDPAS_PROTOCOL_IO (0)
856#define ACPI_CEDT_RDPAS_PROTOCOL_CACHEMEM (1)
912 UINT32 SharedInfoLength;
927 UINT8 InterruptPolarity;
930 UINT8 DmaAddressWidth;
931 UINT16 BaseRequestLine;
932 UINT16 NumHandshakeSignals;
955#define ACPI_CSRT_TYPE_INTERRUPT 0x0001
956#define ACPI_CSRT_TYPE_TIMER 0x0002
957#define ACPI_CSRT_TYPE_DMA 0x0003
961#define ACPI_CSRT_XRUPT_LINE 0x0000
962#define ACPI_CSRT_XRUPT_CONTROLLER 0x0001
963#define ACPI_CSRT_TIMER 0x0000
964#define ACPI_CSRT_DMA_CHANNEL 0x0000
965#define ACPI_CSRT_DMA_CONTROLLER 0x0001
1000 UINT8 RegisterCount;
1001 UINT16 NamepathLength;
1002 UINT16 NamepathOffset;
1003 UINT16 OemDataLength;
1004 UINT16 OemDataOffset;
1008 UINT16 BaseAddressOffset;
1009 UINT16 AddressSizeOffset;
1021#define ACPI_DBG2_SERIAL_PORT 0x8000
1022#define ACPI_DBG2_1394_PORT 0x8001
1023#define ACPI_DBG2_USB_PORT 0x8002
1024#define ACPI_DBG2_NET_PORT 0x8003
1028#define ACPI_DBG2_16550_COMPATIBLE 0x0000
1029#define ACPI_DBG2_16550_SUBSET 0x0001
1030#define ACPI_DBG2_MAX311XE_SPI 0x0002
1031#define ACPI_DBG2_ARM_PL011 0x0003
1032#define ACPI_DBG2_MSM8X60 0x0004
1033#define ACPI_DBG2_16550_NVIDIA 0x0005
1034#define ACPI_DBG2_TI_OMAP 0x0006
1035#define ACPI_DBG2_APM88XXXX 0x0008
1036#define ACPI_DBG2_MSM8974 0x0009
1037#define ACPI_DBG2_SAM5250 0x000A
1038#define ACPI_DBG2_INTEL_USIF 0x000B
1039#define ACPI_DBG2_IMX6 0x000C
1040#define ACPI_DBG2_ARM_SBSA_32BIT 0x000D
1041#define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E
1042#define ACPI_DBG2_ARM_DCC 0x000F
1043#define ACPI_DBG2_BCM2835 0x0010
1044#define ACPI_DBG2_SDM845_1_8432MHZ 0x0011
1045#define ACPI_DBG2_16550_WITH_GAS 0x0012
1046#define ACPI_DBG2_SDM845_7_372MHZ 0x0013
1047#define ACPI_DBG2_INTEL_LPSS 0x0014
1048#define ACPI_DBG2_RISCV_SBI_CON 0x0015
1050#define ACPI_DBG2_1394_STANDARD 0x0000
1052#define ACPI_DBG2_USB_XHCI 0x0000
1053#define ACPI_DBG2_USB_EHCI 0x0001
1096#define ACPI_DMAR_INTR_REMAP (1)
1097#define ACPI_DMAR_X2APIC_OPT_OUT (1<<1)
1098#define ACPI_DMAR_X2APIC_MODE (1<<2)
1114 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0,
1115 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1,
1116 ACPI_DMAR_TYPE_ROOT_ATS = 2,
1117 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3,
1118 ACPI_DMAR_TYPE_NAMESPACE = 4,
1119 ACPI_DMAR_TYPE_SATC = 5,
1120 ACPI_DMAR_TYPE_RESERVED = 6
1131 UINT8 EnumerationId;
1138enum AcpiDmarScopeType
1140 ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0,
1141 ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1,
1142 ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2,
1143 ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3,
1144 ACPI_DMAR_SCOPE_TYPE_HPET = 4,
1145 ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5,
1146 ACPI_DMAR_SCOPE_TYPE_RESERVED = 6
1175#define ACPI_DMAR_INCLUDE_ALL (1)
1192#define ACPI_DMAR_ALLOW_ALL (1)
1208#define ACPI_DMAR_ALL_PORTS (1)
1218 UINT32 ProximityDomain;
1232 ACPI_FLEX_ARRAY(
char, DeviceName);
1261 UINT64 EntryBaseAddress;
1263 UINT32 EntryAddress32;
1264 UINT64 EntryAddress64;
1266 UINT64 LogAreaAddress;
1267 UINT32 LogAreaLength;
1268 UINT64 ArchDependentAddress;
1275#define ACPI_DRTM_ACCESS_ALLOWED (1)
1276#define ACPI_DRTM_ENABLE_GAP_CODE (1<<1)
1277#define ACPI_DRTM_INCOMPLETE_MEASUREMENTS (1<<2)
1278#define ACPI_DRTM_AUTHORITY_ORDER (1<<3)
1285 UINT32 ValidatedTableCount;
1286 UINT64 ValidatedTables[];
1304 UINT32 ResourceCount;
1348 UINT32 HeaderLength;
1366#define ACPI_EINJ_PRESERVE (1)
1372 ACPI_EINJ_BEGIN_OPERATION = 0,
1373 ACPI_EINJ_GET_TRIGGER_TABLE = 1,
1374 ACPI_EINJ_SET_ERROR_TYPE = 2,
1375 ACPI_EINJ_GET_ERROR_TYPE = 3,
1376 ACPI_EINJ_END_OPERATION = 4,
1377 ACPI_EINJ_EXECUTE_OPERATION = 5,
1378 ACPI_EINJ_CHECK_BUSY_STATUS = 6,
1379 ACPI_EINJ_GET_COMMAND_STATUS = 7,
1380 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 8,
1381 ACPI_EINJ_GET_EXECUTE_TIMINGS = 9,
1382 ACPI_EINJ_ACTION_RESERVED = 10,
1383 ACPI_EINJ_TRIGGER_ERROR = 0xFF
1388enum AcpiEinjInstructions
1390 ACPI_EINJ_READ_REGISTER = 0,
1391 ACPI_EINJ_READ_REGISTER_VALUE = 1,
1392 ACPI_EINJ_WRITE_REGISTER = 2,
1393 ACPI_EINJ_WRITE_REGISTER_VALUE = 3,
1395 ACPI_EINJ_FLUSH_CACHELINE = 5,
1396 ACPI_EINJ_INSTRUCTION_RESERVED = 6
1402 UINT32 VendorStructOffset;
1436enum AcpiEinjCommandStatus
1438 ACPI_EINJ_SUCCESS = 0,
1439 ACPI_EINJ_FAILURE = 1,
1440 ACPI_EINJ_INVALID_ACCESS = 2,
1441 ACPI_EINJ_STATUS_RESERVED = 3
1447#define ACPI_EINJ_PROCESSOR_CORRECTABLE (1)
1448#define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1)
1449#define ACPI_EINJ_PROCESSOR_FATAL (1<<2)
1450#define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3)
1451#define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4)
1452#define ACPI_EINJ_MEMORY_FATAL (1<<5)
1453#define ACPI_EINJ_PCIX_CORRECTABLE (1<<6)
1454#define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7)
1455#define ACPI_EINJ_PCIX_FATAL (1<<8)
1456#define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9)
1457#define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10)
1458#define ACPI_EINJ_PLATFORM_FATAL (1<<11)
1459#define ACPI_EINJ_CXL_CACHE_CORRECTABLE (1<<12)
1460#define ACPI_EINJ_CXL_CACHE_UNCORRECTABLE (1<<13)
1461#define ACPI_EINJ_CXL_CACHE_FATAL (1<<14)
1462#define ACPI_EINJ_CXL_MEM_CORRECTABLE (1<<15)
1463#define ACPI_EINJ_CXL_MEM_UNCORRECTABLE (1<<16)
1464#define ACPI_EINJ_CXL_MEM_FATAL (1<<17)
1465#define ACPI_EINJ_VENDOR_DEFINED (1<<31)
1478 UINT32 HeaderLength;
1495#define ACPI_ERST_PRESERVE (1)
1501 ACPI_ERST_BEGIN_WRITE = 0,
1502 ACPI_ERST_BEGIN_READ = 1,
1503 ACPI_ERST_BEGIN_CLEAR = 2,
1505 ACPI_ERST_SET_RECORD_OFFSET = 4,
1506 ACPI_ERST_EXECUTE_OPERATION = 5,
1507 ACPI_ERST_CHECK_BUSY_STATUS = 6,
1508 ACPI_ERST_GET_COMMAND_STATUS = 7,
1509 ACPI_ERST_GET_RECORD_ID = 8,
1510 ACPI_ERST_SET_RECORD_ID = 9,
1511 ACPI_ERST_GET_RECORD_COUNT = 10,
1512 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11,
1513 ACPI_ERST_NOT_USED = 12,
1514 ACPI_ERST_GET_ERROR_RANGE = 13,
1515 ACPI_ERST_GET_ERROR_LENGTH = 14,
1516 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15,
1517 ACPI_ERST_EXECUTE_TIMINGS = 16,
1518 ACPI_ERST_ACTION_RESERVED = 17
1523enum AcpiErstInstructions
1525 ACPI_ERST_READ_REGISTER = 0,
1526 ACPI_ERST_READ_REGISTER_VALUE = 1,
1527 ACPI_ERST_WRITE_REGISTER = 2,
1528 ACPI_ERST_WRITE_REGISTER_VALUE = 3,
1530 ACPI_ERST_LOAD_VAR1 = 5,
1531 ACPI_ERST_LOAD_VAR2 = 6,
1532 ACPI_ERST_STORE_VAR1 = 7,
1534 ACPI_ERST_SUBTRACT = 9,
1535 ACPI_ERST_ADD_VALUE = 10,
1536 ACPI_ERST_SUBTRACT_VALUE = 11,
1537 ACPI_ERST_STALL = 12,
1538 ACPI_ERST_STALL_WHILE_TRUE = 13,
1539 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14,
1540 ACPI_ERST_GOTO = 15,
1541 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16,
1542 ACPI_ERST_SET_DST_ADDRESS_BASE = 17,
1543 ACPI_ERST_MOVE_DATA = 18,
1544 ACPI_ERST_INSTRUCTION_RESERVED = 19
1549enum AcpiErstCommandStatus
1551 ACPI_ERST_SUCCESS = 0,
1552 ACPI_ERST_NO_SPACE = 1,
1553 ACPI_ERST_NOT_AVAILABLE = 2,
1554 ACPI_ERST_FAILURE = 3,
1555 ACPI_ERST_RECORD_EMPTY = 4,
1556 ACPI_ERST_NOT_FOUND = 5,
1557 ACPI_ERST_STATUS_RESERVED = 6
1599 ACPI_FPDT_TYPE_BOOT = 0,
1600 ACPI_FPDT_TYPE_S3PERF = 1
1650 ACPI_S3PT_TYPE_RESUME = 0,
1651 ACPI_S3PT_TYPE_SUSPEND = 1,
1652 ACPI_FPDT_BOOT_PERFORMANCE = 2
1660 UINT64 AverageResume;
1667 UINT64 SuspendStart;
1682 UINT64 StartupStart;
1683 UINT64 ExitServicesEntry;
1684 UINT64 ExitServicesExit;
1699 UINT64 CounterBlockAddresss;
1701 UINT32 SecureEl1Interrupt;
1702 UINT32 SecureEl1Flags;
1703 UINT32 NonSecureEl1Interrupt;
1704 UINT32 NonSecureEl1Flags;
1705 UINT32 VirtualTimerInterrupt;
1706 UINT32 VirtualTimerFlags;
1707 UINT32 NonSecureEl2Interrupt;
1708 UINT32 NonSecureEl2Flags;
1709 UINT64 CounterReadBlockAddress;
1710 UINT32 PlatformTimerCount;
1711 UINT32 PlatformTimerOffset;
1717#define ACPI_GTDT_INTERRUPT_MODE (1)
1718#define ACPI_GTDT_INTERRUPT_POLARITY (1<<1)
1719#define ACPI_GTDT_ALWAYS_ON (1<<2)
1723 UINT32 VirtualEL2TimerGsiv;
1724 UINT32 VirtualEL2TimerFlags;
1741 ACPI_GTDT_TYPE_TIMER_BLOCK = 0,
1742 ACPI_GTDT_TYPE_WATCHDOG = 1,
1743 ACPI_GTDT_TYPE_RESERVED = 2
1755 UINT64 BlockAddress;
1768 UINT64 El0BaseAddress;
1769 UINT32 TimerInterrupt;
1771 UINT32 VirtualTimerInterrupt;
1772 UINT32 VirtualTimerFlags;
1779#define ACPI_GTDT_GT_IRQ_MODE (1)
1780#define ACPI_GTDT_GT_IRQ_POLARITY (1<<1)
1784#define ACPI_GTDT_GT_IS_SECURE_TIMER (1)
1785#define ACPI_GTDT_GT_ALWAYS_ON (1<<1)
1794 UINT64 RefreshFrameAddress;
1795 UINT64 ControlFrameAddress;
1796 UINT32 TimerInterrupt;
1803#define ACPI_GTDT_WATCHDOG_IRQ_MODE (1)
1804#define ACPI_GTDT_WATCHDOG_IRQ_POLARITY (1<<1)
1805#define ACPI_GTDT_WATCHDOG_SECURE (1<<2)
1818 UINT32 ErrorSourceCount;
1837 ACPI_HEST_TYPE_IA32_CHECK = 0,
1838 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1,
1839 ACPI_HEST_TYPE_IA32_NMI = 2,
1840 ACPI_HEST_TYPE_NOT_USED3 = 3,
1841 ACPI_HEST_TYPE_NOT_USED4 = 4,
1842 ACPI_HEST_TYPE_NOT_USED5 = 5,
1843 ACPI_HEST_TYPE_AER_ROOT_PORT = 6,
1844 ACPI_HEST_TYPE_AER_ENDPOINT = 7,
1845 ACPI_HEST_TYPE_AER_BRIDGE = 8,
1846 ACPI_HEST_TYPE_GENERIC_ERROR = 9,
1847 ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10,
1848 ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11,
1849 ACPI_HEST_TYPE_RESERVED = 12
1864 UINT8 ClearStatusOnInit;
1867 UINT32 ControlRegister;
1869 UINT32 StatusRegister;
1870 UINT32 AddressRegister;
1871 UINT32 MiscRegister;
1883 UINT32 RecordsToPreallocate;
1884 UINT32 MaxSectionsPerRecord;
1888 UINT16 DeviceControl;
1890 UINT32 UncorrectableMask;
1891 UINT32 UncorrectableSeverity;
1892 UINT32 CorrectableMask;
1893 UINT32 AdvancedCapabilities;
1899#define ACPI_HEST_FIRMWARE_FIRST (1)
1900#define ACPI_HEST_GLOBAL (1<<1)
1901#define ACPI_HEST_GHES_ASSIST (1<<2)
1908#define ACPI_HEST_BUS(Bus) ((Bus) & 0xFF)
1909#define ACPI_HEST_SEGMENT(Bus) (((Bus) >> 8) & 0xFFFF)
1918 UINT16 ConfigWriteEnable;
1919 UINT32 PollInterval;
1921 UINT32 PollingThresholdValue;
1922 UINT32 PollingThresholdWindow;
1923 UINT32 ErrorThresholdValue;
1924 UINT32 ErrorThresholdWindow;
1930enum AcpiHestNotifyTypes
1932 ACPI_HEST_NOTIFY_POLLED = 0,
1933 ACPI_HEST_NOTIFY_EXTERNAL = 1,
1934 ACPI_HEST_NOTIFY_LOCAL = 2,
1935 ACPI_HEST_NOTIFY_SCI = 3,
1936 ACPI_HEST_NOTIFY_NMI = 4,
1937 ACPI_HEST_NOTIFY_CMCI = 5,
1938 ACPI_HEST_NOTIFY_MCE = 6,
1939 ACPI_HEST_NOTIFY_GPIO = 7,
1940 ACPI_HEST_NOTIFY_SEA = 8,
1941 ACPI_HEST_NOTIFY_SEI = 9,
1942 ACPI_HEST_NOTIFY_GSIV = 10,
1943 ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11,
1944 ACPI_HEST_NOTIFY_RESERVED = 12
1949#define ACPI_HEST_TYPE (1)
1950#define ACPI_HEST_POLL_INTERVAL (1<<1)
1951#define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2)
1952#define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3)
1953#define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4)
1954#define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5)
1969 UINT32 RecordsToPreallocate;
1970 UINT32 MaxSectionsPerRecord;
1971 UINT64 GlobalCapabilityData;
1972 UINT64 GlobalControlData;
1973 UINT8 NumHardwareBanks;
1987 UINT32 RecordsToPreallocate;
1988 UINT32 MaxSectionsPerRecord;
1990 UINT8 NumHardwareBanks;
2002 UINT32 RecordsToPreallocate;
2003 UINT32 MaxSectionsPerRecord;
2004 UINT32 MaxRawDataLength;
2017 UINT32 RootErrorCommand;
2038 UINT32 UncorrectableMask2;
2039 UINT32 UncorrectableSeverity2;
2040 UINT32 AdvancedCapabilities2;
2050 UINT16 RelatedSourceId;
2053 UINT32 RecordsToPreallocate;
2054 UINT32 MaxSectionsPerRecord;
2055 UINT32 MaxRawDataLength;
2058 UINT32 ErrorBlockLength;
2068 UINT16 RelatedSourceId;
2071 UINT32 RecordsToPreallocate;
2072 UINT32 MaxSectionsPerRecord;
2073 UINT32 MaxRawDataLength;
2076 UINT32 ErrorBlockLength;
2078 UINT64 ReadAckPreserve;
2079 UINT64 ReadAckWrite;
2089 UINT32 RawDataOffset;
2090 UINT32 RawDataLength;
2092 UINT32 ErrorSeverity;
2098#define ACPI_HEST_UNCORRECTABLE (1)
2099#define ACPI_HEST_CORRECTABLE (1<<1)
2100#define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2)
2101#define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3)
2102#define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4)
2109 UINT8 SectionType[16];
2110 UINT32 ErrorSeverity;
2112 UINT8 ValidationBits;
2114 UINT32 ErrorDataLength;
2124 UINT8 SectionType[16];
2125 UINT32 ErrorSeverity;
2127 UINT8 ValidationBits;
2129 UINT32 ErrorDataLength;
2138#define ACPI_HEST_GEN_ERROR_RECOVERABLE 0
2139#define ACPI_HEST_GEN_ERROR_FATAL 1
2140#define ACPI_HEST_GEN_ERROR_CORRECTED 2
2141#define ACPI_HEST_GEN_ERROR_NONE 3
2145#define ACPI_HEST_GEN_VALID_FRU_ID (1)
2146#define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1)
2147#define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2)
2158 UINT32 RecordsToPreallocate;
2159 UINT32 MaxSectionsPerRecord;
2161 UINT8 NumHardwareBanks;
2185 ACPI_HMAT_TYPE_ADDRESS_RANGE = 0,
2186 ACPI_HMAT_TYPE_LOCALITY = 1,
2187 ACPI_HMAT_TYPE_CACHE = 2,
2188 ACPI_HMAT_TYPE_RESERVED = 3
2221#define ACPI_HMAT_INITIATOR_PD_VALID (1)
2231 UINT8 MinTransferSize;
2233 UINT32 NumberOfInitiatorPDs;
2234 UINT32 NumberOfTargetPDs;
2236 UINT64 EntryBaseUnit;
2242#define ACPI_HMAT_MEMORY_HIERARCHY (0x0F)
2246#define ACPI_HMAT_MEMORY 0
2247#define ACPI_HMAT_1ST_LEVEL_CACHE 1
2248#define ACPI_HMAT_2ND_LEVEL_CACHE 2
2249#define ACPI_HMAT_3RD_LEVEL_CACHE 3
2250#define ACPI_HMAT_MINIMUM_XFER_SIZE 0x10
2251#define ACPI_HMAT_NON_SEQUENTIAL_XFERS 0x20
2256#define ACPI_HMAT_ACCESS_LATENCY 0
2257#define ACPI_HMAT_READ_LATENCY 1
2258#define ACPI_HMAT_WRITE_LATENCY 2
2259#define ACPI_HMAT_ACCESS_BANDWIDTH 3
2260#define ACPI_HMAT_READ_BANDWIDTH 4
2261#define ACPI_HMAT_WRITE_BANDWIDTH 5
2272 UINT32 CacheAttributes;
2274 UINT16 NumberOfSMBIOSHandles;
2280#define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F)
2281#define ACPI_HMAT_CACHE_LEVEL (0x000000F0)
2282#define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00)
2283#define ACPI_HMAT_WRITE_POLICY (0x0000F000)
2284#define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000)
2288#define ACPI_HMAT_CA_NONE (0)
2289#define ACPI_HMAT_CA_DIRECT_MAPPED (1)
2290#define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2)
2294#define ACPI_HMAT_CP_NONE (0)
2295#define ACPI_HMAT_CP_WB (1)
2296#define ACPI_HMAT_CP_WT (2)
2322#define ACPI_HPET_PAGE_PROTECT_MASK (3)
2326enum AcpiHpetPageProtect
2328 ACPI_HPET_NO_PAGE_PROTECT = 0,
2329 ACPI_HPET_PAGE_PROTECT4 = 1,
2330 ACPI_HPET_PAGE_PROTECT64 = 2
2371 ACPI_IBFT_TYPE_NOT_USED = 0,
2372 ACPI_IBFT_TYPE_CONTROL = 1,
2373 ACPI_IBFT_TYPE_INITIATOR = 2,
2374 ACPI_IBFT_TYPE_NIC = 3,
2375 ACPI_IBFT_TYPE_TARGET = 4,
2376 ACPI_IBFT_TYPE_EXTENSIONS = 5,
2377 ACPI_IBFT_TYPE_RESERVED = 6
2387 UINT16 InitiatorOffset;
2389 UINT16 Target0Offset;
2391 UINT16 Target1Offset;
2398 UINT8 SnsServer[16];
2399 UINT8 SlpServer[16];
2400 UINT8 PrimaryServer[16];
2401 UINT8 SecondaryServer[16];
2410 UINT8 IpAddress[16];
2411 UINT8 SubnetMaskPrefix;
2414 UINT8 PrimaryDns[16];
2415 UINT8 SecondaryDns[16];
2418 UINT8 MacAddress[6];
2428 UINT8 TargetIpAddress[16];
2429 UINT16 TargetIpSocket;
2430 UINT8 TargetBootLun[8];
2432 UINT8 NicAssociation;
2433 UINT16 TargetNameLength;
2434 UINT16 TargetNameOffset;
2435 UINT16 ChapNameLength;
2436 UINT16 ChapNameOffset;
2437 UINT16 ChapSecretLength;
2438 UINT16 ChapSecretOffset;
2439 UINT16 ReverseChapNameLength;
2440 UINT16 ReverseChapNameOffset;
2441 UINT16 ReverseChapSecretLength;
2442 UINT16 ReverseChapSecretOffset;
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