20#ifndef STM32H7xx_LL_FMAC_H
21#define STM32H7xx_LL_FMAC_H
54#define LL_FMAC_SR_SAT FMAC_SR_SAT
56#define LL_FMAC_SR_UNFL FMAC_SR_UNFL
57#define LL_FMAC_SR_OVFL FMAC_SR_OVFL
58#define LL_FMAC_SR_X1FULL FMAC_SR_X1FULL
59#define LL_FMAC_SR_YEMPTY FMAC_SR_YEMPTY
69#define LL_FMAC_CR_SATIEN FMAC_CR_SATIEN
71#define LL_FMAC_CR_UNFLIEN FMAC_CR_UNFLIEN
72#define LL_FMAC_CR_OVFLIEN FMAC_CR_OVFLIEN
73#define LL_FMAC_CR_WIEN FMAC_CR_WIEN
74#define LL_FMAC_CR_RIEN FMAC_CR_RIEN
84#define LL_FMAC_WM_0_THRESHOLD_1 0x00000000U
86#define LL_FMAC_WM_1_THRESHOLD_2 0x01000000U
88#define LL_FMAC_WM_2_THRESHOLD_4 0x02000000U
90#define LL_FMAC_WM_3_THRESHOLD_8 0x03000000U
100#define LL_FMAC_FUNC_LOAD_X1 (FMAC_PARAM_FUNC_0)
101#define LL_FMAC_FUNC_LOAD_X2 (FMAC_PARAM_FUNC_1)
102#define LL_FMAC_FUNC_LOAD_Y (FMAC_PARAM_FUNC_1 | FMAC_PARAM_FUNC_0)
103#define LL_FMAC_FUNC_CONVO_FIR (FMAC_PARAM_FUNC_3)
104#define LL_FMAC_FUNC_IIR_DIRECT_FORM_1 (FMAC_PARAM_FUNC_3 | FMAC_PARAM_FUNC_0)
113#define LL_FMAC_PROCESSING_STOP 0x00U
114#define LL_FMAC_PROCESSING_START 0x01U
142#define LL_FMAC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
150#define LL_FMAC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
183__STATIC_INLINE
void LL_FMAC_SetX1FullWatermark(
FMAC_TypeDef *FMACx, uint32_t Watermark)
198__STATIC_INLINE uint32_t LL_FMAC_GetX1FullWatermark(
const FMAC_TypeDef *FMACx)
211__STATIC_INLINE
void LL_FMAC_SetX1BufferSize(
FMAC_TypeDef *FMACx, uint8_t BufferSize)
223__STATIC_INLINE uint8_t LL_FMAC_GetX1BufferSize(
const FMAC_TypeDef *FMACx)
236__STATIC_INLINE
void LL_FMAC_SetX1Base(
FMAC_TypeDef *FMACx, uint8_t Base)
248__STATIC_INLINE uint8_t LL_FMAC_GetX1Base(
const FMAC_TypeDef *FMACx)
261__STATIC_INLINE
void LL_FMAC_SetX2BufferSize(
FMAC_TypeDef *FMACx, uint8_t BufferSize)
273__STATIC_INLINE uint8_t LL_FMAC_GetX2BufferSize(
const FMAC_TypeDef *FMACx)
286__STATIC_INLINE
void LL_FMAC_SetX2Base(
FMAC_TypeDef *FMACx, uint8_t Base)
298__STATIC_INLINE uint8_t LL_FMAC_GetX2Base(
const FMAC_TypeDef *FMACx)
314__STATIC_INLINE
void LL_FMAC_SetYEmptyWatermark(
FMAC_TypeDef *FMACx, uint32_t Watermark)
329__STATIC_INLINE uint32_t LL_FMAC_GetYEmptyWatermark(
const FMAC_TypeDef *FMACx)
342__STATIC_INLINE
void LL_FMAC_SetYBufferSize(
FMAC_TypeDef *FMACx, uint8_t BufferSize)
354__STATIC_INLINE uint8_t LL_FMAC_GetYBufferSize(
const FMAC_TypeDef *FMACx)
367__STATIC_INLINE
void LL_FMAC_SetYBase(
FMAC_TypeDef *FMACx, uint8_t Base)
379__STATIC_INLINE uint8_t LL_FMAC_GetYBase(
const FMAC_TypeDef *FMACx)
390__STATIC_INLINE
void LL_FMAC_EnableStart(
FMAC_TypeDef *FMACx)
401__STATIC_INLINE
void LL_FMAC_DisableStart(
FMAC_TypeDef *FMACx)
412__STATIC_INLINE uint32_t LL_FMAC_IsEnabledStart(
const FMAC_TypeDef *FMACx)
429__STATIC_INLINE
void LL_FMAC_SetFunction(
FMAC_TypeDef *FMACx, uint32_t Function)
445__STATIC_INLINE uint32_t LL_FMAC_GetFunction(
const FMAC_TypeDef *FMACx)
458__STATIC_INLINE
void LL_FMAC_SetParamR(
FMAC_TypeDef *FMACx, uint8_t Param)
469__STATIC_INLINE uint8_t LL_FMAC_GetParamR(
const FMAC_TypeDef *FMACx)
482__STATIC_INLINE
void LL_FMAC_SetParamQ(
FMAC_TypeDef *FMACx, uint8_t Param)
493__STATIC_INLINE uint8_t LL_FMAC_GetParamQ(
const FMAC_TypeDef *FMACx)
506__STATIC_INLINE
void LL_FMAC_SetParamP(
FMAC_TypeDef *FMACx, uint8_t Param)
518__STATIC_INLINE uint8_t LL_FMAC_GetParamP(
const FMAC_TypeDef *FMACx)
538__STATIC_INLINE
void LL_FMAC_EnableReset(
FMAC_TypeDef *FMACx)
549__STATIC_INLINE uint32_t LL_FMAC_IsEnabledReset(
const FMAC_TypeDef *FMACx)
569__STATIC_INLINE
void LL_FMAC_EnableClipping(
FMAC_TypeDef *FMACx)
580__STATIC_INLINE
void LL_FMAC_DisableClipping(
FMAC_TypeDef *FMACx)
591__STATIC_INLINE uint32_t LL_FMAC_IsEnabledClipping(
const FMAC_TypeDef *FMACx)
611__STATIC_INLINE
void LL_FMAC_EnableDMAReq_WRITE(
FMAC_TypeDef *FMACx)
622__STATIC_INLINE
void LL_FMAC_DisableDMAReq_WRITE(
FMAC_TypeDef *FMACx)
633__STATIC_INLINE uint32_t LL_FMAC_IsEnabledDMAReq_WRITE(
const FMAC_TypeDef *FMACx)
644__STATIC_INLINE
void LL_FMAC_EnableDMAReq_READ(
FMAC_TypeDef *FMACx)
655__STATIC_INLINE
void LL_FMAC_DisableDMAReq_READ(
FMAC_TypeDef *FMACx)
666__STATIC_INLINE uint32_t LL_FMAC_IsEnabledDMAReq_READ(
const FMAC_TypeDef *FMACx)
686__STATIC_INLINE
void LL_FMAC_EnableIT_SAT(
FMAC_TypeDef *FMACx)
697__STATIC_INLINE
void LL_FMAC_DisableIT_SAT(
FMAC_TypeDef *FMACx)
708__STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_SAT(
const FMAC_TypeDef *FMACx)
719__STATIC_INLINE
void LL_FMAC_EnableIT_UNFL(
FMAC_TypeDef *FMACx)
730__STATIC_INLINE
void LL_FMAC_DisableIT_UNFL(
FMAC_TypeDef *FMACx)
741__STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_UNFL(
const FMAC_TypeDef *FMACx)
752__STATIC_INLINE
void LL_FMAC_EnableIT_OVFL(
FMAC_TypeDef *FMACx)
763__STATIC_INLINE
void LL_FMAC_DisableIT_OVFL(
FMAC_TypeDef *FMACx)
774__STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_OVFL(
const FMAC_TypeDef *FMACx)
785__STATIC_INLINE
void LL_FMAC_EnableIT_WR(
FMAC_TypeDef *FMACx)
796__STATIC_INLINE
void LL_FMAC_DisableIT_WR(
FMAC_TypeDef *FMACx)
807__STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_WR(
const FMAC_TypeDef *FMACx)
818__STATIC_INLINE
void LL_FMAC_EnableIT_RD(
FMAC_TypeDef *FMACx)
829__STATIC_INLINE
void LL_FMAC_DisableIT_RD(
FMAC_TypeDef *FMACx)
840__STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_RD(
const FMAC_TypeDef *FMACx)
860__STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_SAT(
const FMAC_TypeDef *FMACx)
871__STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_UNFL(
const FMAC_TypeDef *FMACx)
882__STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_OVFL(
const FMAC_TypeDef *FMACx)
893__STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_X1FULL(
const FMAC_TypeDef *FMACx)
904__STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_YEMPTY(
const FMAC_TypeDef *FMACx)
926__STATIC_INLINE
void LL_FMAC_WriteData(
FMAC_TypeDef *FMACx, uint16_t InData)
928 WRITE_REG(FMACx->
WDATA, InData);
937__STATIC_INLINE uint16_t LL_FMAC_ReadData(
const FMAC_TypeDef *FMACx)
939 return (uint16_t)(READ_REG(FMACx->
RDATA));
968__STATIC_INLINE
void LL_FMAC_ConfigX1(
FMAC_TypeDef *FMACx, uint32_t Watermark, uint8_t Base, uint8_t BufferSize)
971 Watermark | (((uint32_t)Base) << FMAC_X1BUFCFG_X1_BASE_Pos) |
972 (((uint32_t)BufferSize) << FMAC_X1BUFCFG_X1_BUF_SIZE_Pos));
986__STATIC_INLINE
void LL_FMAC_ConfigX2(
FMAC_TypeDef *FMACx, uint8_t Base, uint8_t BufferSize)
989 (((uint32_t)Base) << FMAC_X2BUFCFG_X2_BASE_Pos) |
990 (((uint32_t)BufferSize) << FMAC_X2BUFCFG_X2_BUF_SIZE_Pos));
1010__STATIC_INLINE
void LL_FMAC_ConfigY(
FMAC_TypeDef *FMACx, uint32_t Watermark, uint8_t Base, uint8_t BufferSize)
1013 Watermark | (((uint32_t)Base) << FMAC_YBUFCFG_Y_BASE_Pos) |
1014 (((uint32_t)BufferSize) << FMAC_YBUFCFG_Y_BUF_SIZE_Pos));
1042__STATIC_INLINE
void LL_FMAC_ConfigFunc(
FMAC_TypeDef *FMACx, uint8_t Start, uint32_t Function, uint8_t ParamP,
1043 uint8_t ParamQ, uint8_t ParamR)
1046 (((uint32_t)Start) << FMAC_PARAM_START_Pos) | Function | (((uint32_t)ParamP) << FMAC_PARAM_P_Pos) |
1047 (((uint32_t)ParamQ) << FMAC_PARAM_Q_Pos) | (((uint32_t)ParamR) << FMAC_PARAM_R_Pos));
1056#if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
#define FMAC_X2BUFCFG_X2_BUF_SIZE
Definition: stm32h723xx.h:11188
#define FMAC_YBUFCFG_Y_BASE
Definition: stm32h723xx.h:11192
#define FMAC_SR_UNFL
Definition: stm32h723xx.h:11262
#define FMAC_PARAM_P
Definition: stm32h723xx.h:11202
#define FMAC_CR_OVFLIEN
Definition: stm32h723xx.h:11231
#define FMAC_SR_SAT
Definition: stm32h723xx.h:11265
#define FMAC_CR_RESET
Definition: stm32h723xx.h:11249
#define FMAC_CR_UNFLIEN
Definition: stm32h723xx.h:11234
#define FMAC_X1BUFCFG_FULL_WM
Definition: stm32h723xx.h:11181
#define FMAC_PARAM_Q
Definition: stm32h723xx.h:11205
#define FMAC_SR_YEMPTY
Definition: stm32h723xx.h:11253
#define FMAC_CR_DMAREN
Definition: stm32h723xx.h:11240
#define FMAC_X1BUFCFG_X1_BASE
Definition: stm32h723xx.h:11175
#define FMAC_X2BUFCFG_X2_BASE
Definition: stm32h723xx.h:11185
#define FMAC_SR_X1FULL
Definition: stm32h723xx.h:11256
#define FMAC_YBUFCFG_Y_BUF_SIZE
Definition: stm32h723xx.h:11195
#define FMAC_CR_DMAWEN
Definition: stm32h723xx.h:11243
#define FMAC_PARAM_START
Definition: stm32h723xx.h:11221
#define FMAC_SR_OVFL
Definition: stm32h723xx.h:11259
#define FMAC_CR_WIEN
Definition: stm32h723xx.h:11228
#define FMAC_PARAM_R
Definition: stm32h723xx.h:11208
#define FMAC_CR_SATIEN
Definition: stm32h723xx.h:11237
#define FMAC_YBUFCFG_EMPTY_WM
Definition: stm32h723xx.h:11198
#define FMAC_X1BUFCFG_X1_BUF_SIZE
Definition: stm32h723xx.h:11178
#define FMAC_CR_CLIPEN
Definition: stm32h723xx.h:11246
#define FMAC_PARAM_FUNC
Definition: stm32h723xx.h:11211
#define FMAC_CR_RIEN
Definition: stm32h723xx.h:11225
CMSIS STM32H7xx Device Peripheral Access Layer Header File.
Filter and Mathematical ACcelerator.
Definition: stm32h723xx.h:990
__IO uint32_t PARAM
Definition: stm32h723xx.h:994
__IO uint32_t X2BUFCFG
Definition: stm32h723xx.h:992
__IO uint32_t SR
Definition: stm32h723xx.h:996
__IO uint32_t YBUFCFG
Definition: stm32h723xx.h:993
__IO uint32_t RDATA
Definition: stm32h723xx.h:998
__IO uint32_t X1BUFCFG
Definition: stm32h723xx.h:991
__IO uint32_t WDATA
Definition: stm32h723xx.h:997
__IO uint32_t CR
Definition: stm32h723xx.h:995