20#ifndef STM32H7xx_LL_DMA2D_H
21#define STM32H7xx_LL_DMA2D_H
45#if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
57#if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
128 uint32_t OutputAlpha;
141 uint32_t OutputMemoryAddress;
148 uint32_t OutputSwapMode;
154 uint32_t LineOffsetMode;
173 uint32_t NbrOfPixelsPerLines;
179 uint32_t AlphaInversionMode;
191} LL_DMA2D_InitTypeDef;
198 uint32_t MemoryAddress;
220 uint32_t CLUTColorMode;
269 uint32_t CLUTMemoryAddress;
277 uint32_t AlphaInversionMode;
291 uint32_t ChromaSubSampling;
298} LL_DMA2D_LayerCfgTypeDef;
327 uint32_t OutputGreen;
359 uint32_t OutputAlpha;
372} LL_DMA2D_ColorTypeDef;
390#define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF
391#define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF
392#define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF
393#define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF
394#define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF
395#define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF
405#define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE
406#define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE
407#define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE
408#define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE
409#define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE
410#define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE
419#define LL_DMA2D_MODE_M2M 0x00000000U
420#define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0
421#define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1
422#define LL_DMA2D_MODE_R2M (DMA2D_CR_MODE_0|DMA2D_CR_MODE_1)
423#define LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG DMA2D_CR_MODE_2
424#define LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG (DMA2D_CR_MODE_0|DMA2D_CR_MODE_2)
433#define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U
434#define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0
435#define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1
436#define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1)
437#define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2
446#define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U
447#define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0
448#define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1
449#define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1)
450#define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2
451#define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2)
452#define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2)
453#define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2)
454#define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3
455#define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3)
456#define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3)
457#define LL_DMA2D_INPUT_MODE_YCBCR (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3)
466#define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U
467#define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0
469#define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1
480#define LL_DMA2D_SWAP_MODE_REGULAR 0x00000000U
481#define LL_DMA2D_SWAP_MODE_TWO_BY_TWO DMA2D_OPFCCR_SB
490#define LL_DMA2D_RB_MODE_REGULAR 0x00000000U
491#define LL_DMA2D_RB_MODE_SWAP DMA2D_FGPFCCR_RBS
500#define LL_DMA2D_ALPHA_REGULAR 0x00000000U
501#define LL_DMA2D_ALPHA_INVERTED DMA2D_FGPFCCR_AI
511#define LL_DMA2D_LINE_OFFSET_PIXELS 0x00000000U
512#define LL_DMA2D_LINE_OFFSET_BYTES DMA2D_CR_LOM
521#define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U
522#define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM
531#define LL_DMA2D_CSS_444 0x00000000U
532#define LL_DMA2D_CSS_422 DMA2D_FGPFCCR_CSS_0
533#define LL_DMA2D_CSS_420 DMA2D_FGPFCCR_CSS_1
560#define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
568#define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
605__STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(
DMA2D_TypeDef *DMA2Dx)
642__STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(
DMA2D_TypeDef *DMA2Dx)
667__STATIC_INLINE uint32_t LL_DMA2D_IsAborted(
DMA2D_TypeDef *DMA2Dx)
685__STATIC_INLINE
void LL_DMA2D_SetMode(
DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
702__STATIC_INLINE uint32_t LL_DMA2D_GetMode(
DMA2D_TypeDef *DMA2Dx)
719__STATIC_INLINE
void LL_DMA2D_SetOutputColorMode(
DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
735__STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(
DMA2D_TypeDef *DMA2Dx)
749__STATIC_INLINE
void LL_DMA2D_SetOutputRBSwapMode(
DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
762__STATIC_INLINE uint32_t LL_DMA2D_GetOutputRBSwapMode(
DMA2D_TypeDef *DMA2Dx)
776__STATIC_INLINE
void LL_DMA2D_SetOutputAlphaInvMode(
DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
789__STATIC_INLINE uint32_t LL_DMA2D_GetOutputAlphaInvMode(
DMA2D_TypeDef *DMA2Dx)
804__STATIC_INLINE
void LL_DMA2D_SetOutputSwapMode(
DMA2D_TypeDef *DMA2Dx, uint32_t OutputSwapMode)
817__STATIC_INLINE uint32_t LL_DMA2D_GetOutputSwapMode(
DMA2D_TypeDef *DMA2Dx)
831__STATIC_INLINE
void LL_DMA2D_SetLineOffsetMode(
DMA2D_TypeDef *DMA2Dx, uint32_t LineOffsetMode)
844__STATIC_INLINE uint32_t LL_DMA2D_GetLineOffsetMode(
DMA2D_TypeDef *DMA2Dx)
856__STATIC_INLINE
void LL_DMA2D_SetLineOffset(
DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
867__STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(
DMA2D_TypeDef *DMA2Dx)
879__STATIC_INLINE
void LL_DMA2D_SetNbrOfPixelsPerLines(
DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
881 MODIFY_REG(DMA2Dx->
NLR,
DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
890__STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(
DMA2D_TypeDef *DMA2Dx)
892 return (uint32_t)(READ_BIT(DMA2Dx->
NLR,
DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
902__STATIC_INLINE
void LL_DMA2D_SetNbrOfLines(
DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
913__STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(
DMA2D_TypeDef *DMA2Dx)
925__STATIC_INLINE
void LL_DMA2D_SetOutputMemAddr(
DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
927 LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
936__STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(
DMA2D_TypeDef *DMA2Dx)
938 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
955__STATIC_INLINE
void LL_DMA2D_SetOutputColor(
DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
973__STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(
DMA2D_TypeDef *DMA2Dx)
975 return (uint32_t)(READ_BIT(DMA2Dx->
OCOLR, \
986__STATIC_INLINE
void LL_DMA2D_SetLineWatermark(
DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
997__STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(
DMA2D_TypeDef *DMA2Dx)
1009__STATIC_INLINE
void LL_DMA2D_SetDeadTime(
DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
1020__STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(
DMA2D_TypeDef *DMA2Dx)
1031__STATIC_INLINE
void LL_DMA2D_EnableDeadTime(
DMA2D_TypeDef *DMA2Dx)
1042__STATIC_INLINE
void LL_DMA2D_DisableDeadTime(
DMA2D_TypeDef *DMA2Dx)
1053__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(
DMA2D_TypeDef *DMA2Dx)
1070__STATIC_INLINE
void LL_DMA2D_FGND_SetMemAddr(
DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
1072 LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
1081__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(
DMA2D_TypeDef *DMA2Dx)
1083 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
1092__STATIC_INLINE
void LL_DMA2D_FGND_EnableCLUTLoad(
DMA2D_TypeDef *DMA2Dx)
1103__STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(
DMA2D_TypeDef *DMA2Dx)
1126__STATIC_INLINE
void LL_DMA2D_FGND_SetColorMode(
DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
1148__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(
DMA2D_TypeDef *DMA2Dx)
1163__STATIC_INLINE
void LL_DMA2D_FGND_SetAlphaMode(
DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
1177__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(
DMA2D_TypeDef *DMA2Dx)
1189__STATIC_INLINE
void LL_DMA2D_FGND_SetAlpha(
DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
1200__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(
DMA2D_TypeDef *DMA2Dx)
1214__STATIC_INLINE
void LL_DMA2D_FGND_SetRBSwapMode(
DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
1227__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRBSwapMode(
DMA2D_TypeDef *DMA2Dx)
1241__STATIC_INLINE
void LL_DMA2D_FGND_SetAlphaInvMode(
DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
1254__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaInvMode(
DMA2D_TypeDef *DMA2Dx)
1266__STATIC_INLINE
void LL_DMA2D_FGND_SetLineOffset(
DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
1277__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(
DMA2D_TypeDef *DMA2Dx)
1293__STATIC_INLINE
void LL_DMA2D_FGND_SetColor(
DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
1296 ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue));
1306__STATIC_INLINE
void LL_DMA2D_FGND_SetRedColor(
DMA2D_TypeDef *DMA2Dx, uint32_t Red)
1317__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(
DMA2D_TypeDef *DMA2Dx)
1329__STATIC_INLINE
void LL_DMA2D_FGND_SetGreenColor(
DMA2D_TypeDef *DMA2Dx, uint32_t Green)
1340__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(
DMA2D_TypeDef *DMA2Dx)
1352__STATIC_INLINE
void LL_DMA2D_FGND_SetBlueColor(
DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
1363__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(
DMA2D_TypeDef *DMA2Dx)
1375__STATIC_INLINE
void LL_DMA2D_FGND_SetCLUTMemAddr(
DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
1377 LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
1386__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(
DMA2D_TypeDef *DMA2Dx)
1388 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
1398__STATIC_INLINE
void LL_DMA2D_FGND_SetCLUTSize(
DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
1409__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(
DMA2D_TypeDef *DMA2Dx)
1423__STATIC_INLINE
void LL_DMA2D_FGND_SetCLUTColorMode(
DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
1436__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(
DMA2D_TypeDef *DMA2Dx)
1451__STATIC_INLINE
void LL_DMA2D_FGND_SetChrSubSampling(
DMA2D_TypeDef *DMA2Dx, uint32_t ChromaSubSampling)
1453 MODIFY_REG(DMA2Dx->
FGPFCCR, DMA2D_FGPFCCR_CSS, ChromaSubSampling);
1465__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetChrSubSampling(
DMA2D_TypeDef *DMA2Dx)
1467 return (uint32_t)(READ_BIT(DMA2Dx->
FGPFCCR, DMA2D_FGPFCCR_CSS));
1485__STATIC_INLINE
void LL_DMA2D_BGND_SetMemAddr(
DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
1487 LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
1496__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(
DMA2D_TypeDef *DMA2Dx)
1498 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
1507__STATIC_INLINE
void LL_DMA2D_BGND_EnableCLUTLoad(
DMA2D_TypeDef *DMA2Dx)
1518__STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(
DMA2D_TypeDef *DMA2Dx)
1541__STATIC_INLINE
void LL_DMA2D_BGND_SetColorMode(
DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
1563__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(
DMA2D_TypeDef *DMA2Dx)
1578__STATIC_INLINE
void LL_DMA2D_BGND_SetAlphaMode(
DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
1592__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(
DMA2D_TypeDef *DMA2Dx)
1604__STATIC_INLINE
void LL_DMA2D_BGND_SetAlpha(
DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
1615__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(
DMA2D_TypeDef *DMA2Dx)
1629__STATIC_INLINE
void LL_DMA2D_BGND_SetRBSwapMode(
DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
1642__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRBSwapMode(
DMA2D_TypeDef *DMA2Dx)
1656__STATIC_INLINE
void LL_DMA2D_BGND_SetAlphaInvMode(
DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
1669__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaInvMode(
DMA2D_TypeDef *DMA2Dx)
1681__STATIC_INLINE
void LL_DMA2D_BGND_SetLineOffset(
DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
1692__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(
DMA2D_TypeDef *DMA2Dx)
1708__STATIC_INLINE
void LL_DMA2D_BGND_SetColor(
DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
1711 ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue));
1721__STATIC_INLINE
void LL_DMA2D_BGND_SetRedColor(
DMA2D_TypeDef *DMA2Dx, uint32_t Red)
1732__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(
DMA2D_TypeDef *DMA2Dx)
1744__STATIC_INLINE
void LL_DMA2D_BGND_SetGreenColor(
DMA2D_TypeDef *DMA2Dx, uint32_t Green)
1755__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(
DMA2D_TypeDef *DMA2Dx)
1767__STATIC_INLINE
void LL_DMA2D_BGND_SetBlueColor(
DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
1778__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(
DMA2D_TypeDef *DMA2Dx)
1790__STATIC_INLINE
void LL_DMA2D_BGND_SetCLUTMemAddr(
DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
1792 LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
1801__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(
DMA2D_TypeDef *DMA2Dx)
1803 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
1813__STATIC_INLINE
void LL_DMA2D_BGND_SetCLUTSize(
DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
1824__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(
DMA2D_TypeDef *DMA2Dx)
1838__STATIC_INLINE
void LL_DMA2D_BGND_SetCLUTColorMode(
DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
1851__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(
DMA2D_TypeDef *DMA2Dx)
1876__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(
DMA2D_TypeDef *DMA2Dx)
1887__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(
DMA2D_TypeDef *DMA2Dx)
1898__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(
DMA2D_TypeDef *DMA2Dx)
1909__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(
DMA2D_TypeDef *DMA2Dx)
1920__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(
DMA2D_TypeDef *DMA2Dx)
1931__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(
DMA2D_TypeDef *DMA2Dx)
1942__STATIC_INLINE
void LL_DMA2D_ClearFlag_CE(
DMA2D_TypeDef *DMA2Dx)
1953__STATIC_INLINE
void LL_DMA2D_ClearFlag_CTC(
DMA2D_TypeDef *DMA2Dx)
1964__STATIC_INLINE
void LL_DMA2D_ClearFlag_CAE(
DMA2D_TypeDef *DMA2Dx)
1975__STATIC_INLINE
void LL_DMA2D_ClearFlag_TW(
DMA2D_TypeDef *DMA2Dx)
1986__STATIC_INLINE
void LL_DMA2D_ClearFlag_TC(
DMA2D_TypeDef *DMA2Dx)
1997__STATIC_INLINE
void LL_DMA2D_ClearFlag_TE(
DMA2D_TypeDef *DMA2Dx)
2017__STATIC_INLINE
void LL_DMA2D_EnableIT_CE(
DMA2D_TypeDef *DMA2Dx)
2028__STATIC_INLINE
void LL_DMA2D_EnableIT_CTC(
DMA2D_TypeDef *DMA2Dx)
2039__STATIC_INLINE
void LL_DMA2D_EnableIT_CAE(
DMA2D_TypeDef *DMA2Dx)
2050__STATIC_INLINE
void LL_DMA2D_EnableIT_TW(
DMA2D_TypeDef *DMA2Dx)
2061__STATIC_INLINE
void LL_DMA2D_EnableIT_TC(
DMA2D_TypeDef *DMA2Dx)
2072__STATIC_INLINE
void LL_DMA2D_EnableIT_TE(
DMA2D_TypeDef *DMA2Dx)
2083__STATIC_INLINE
void LL_DMA2D_DisableIT_CE(
DMA2D_TypeDef *DMA2Dx)
2094__STATIC_INLINE
void LL_DMA2D_DisableIT_CTC(
DMA2D_TypeDef *DMA2Dx)
2105__STATIC_INLINE
void LL_DMA2D_DisableIT_CAE(
DMA2D_TypeDef *DMA2Dx)
2116__STATIC_INLINE
void LL_DMA2D_DisableIT_TW(
DMA2D_TypeDef *DMA2Dx)
2127__STATIC_INLINE
void LL_DMA2D_DisableIT_TC(
DMA2D_TypeDef *DMA2Dx)
2138__STATIC_INLINE
void LL_DMA2D_DisableIT_TE(
DMA2D_TypeDef *DMA2Dx)
2149__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(
DMA2D_TypeDef *DMA2Dx)
2160__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(
DMA2D_TypeDef *DMA2Dx)
2171__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(
DMA2D_TypeDef *DMA2Dx)
2182__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(
DMA2D_TypeDef *DMA2Dx)
2193__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(
DMA2D_TypeDef *DMA2Dx)
2204__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(
DMA2D_TypeDef *DMA2Dx)
2215#if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
2222ErrorStatus LL_DMA2D_Init(
DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
2223void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
2224void LL_DMA2D_ConfigLayer(
DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx);
2225void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg);
2226void LL_DMA2D_ConfigOutputColor(
DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct);
2227uint32_t LL_DMA2D_GetOutputBlueColor(
DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
2228uint32_t LL_DMA2D_GetOutputGreenColor(
DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
2229uint32_t LL_DMA2D_GetOutputRedColor(
DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
2230uint32_t LL_DMA2D_GetOutputAlphaColor(
DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
2231void LL_DMA2D_ConfigSize(
DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
#define DMA2D_ISR_CEIF
Definition: stm32h723xx.h:9443
#define DMA2D_BGCOLR_GREEN
Definition: stm32h723xx.h:9580
#define DMA2D_FGCOLR_RED
Definition: stm32h723xx.h:9538
#define DMA2D_OCOLR_BLUE_1
Definition: stm32h723xx.h:9621
#define DMA2D_CR_CTCIE
Definition: stm32h723xx.h:9413
#define DMA2D_CR_START
Definition: stm32h723xx.h:9389
#define DMA2D_IFCR_CTCIF
Definition: stm32h723xx.h:9452
#define DMA2D_ISR_TWIF
Definition: stm32h723xx.h:9434
#define DMA2D_IFCR_CCEIF
Definition: stm32h723xx.h:9464
#define DMA2D_IFCR_CTEIF
Definition: stm32h723xx.h:9449
#define DMA2D_FGPFCCR_ALPHA
Definition: stm32h723xx.h:9526
#define DMA2D_IFCR_CAECIF
Definition: stm32h723xx.h:9458
#define DMA2D_AMTCR_DT
Definition: stm32h723xx.h:9705
#define DMA2D_OPFCCR_AI
Definition: stm32h723xx.h:9610
#define DMA2D_BGCOLR_RED
Definition: stm32h723xx.h:9583
#define DMA2D_BGPFCCR_RBS
Definition: stm32h723xx.h:9568
#define DMA2D_FGPFCCR_CS
Definition: stm32h723xx.h:9507
#define DMA2D_BGPFCCR_ALPHA
Definition: stm32h723xx.h:9571
#define DMA2D_BGOR_LO
Definition: stm32h723xx.h:9488
#define DMA2D_BGPFCCR_AI
Definition: stm32h723xx.h:9565
#define DMA2D_FGCOLR_BLUE
Definition: stm32h723xx.h:9532
#define DMA2D_CR_TEIE
Definition: stm32h723xx.h:9401
#define DMA2D_CR_SUSP
Definition: stm32h723xx.h:9392
#define DMA2D_FGPFCCR_AM
Definition: stm32h723xx.h:9510
#define DMA2D_FGPFCCR_RBS
Definition: stm32h723xx.h:9523
#define DMA2D_BGPFCCR_CS
Definition: stm32h723xx.h:9557
#define DMA2D_BGPFCCR_CM
Definition: stm32h723xx.h:9544
#define DMA2D_CR_CEIE
Definition: stm32h723xx.h:9416
#define DMA2D_IFCR_CCTCIF
Definition: stm32h723xx.h:9461
#define DMA2D_FGPFCCR_START
Definition: stm32h723xx.h:9504
#define DMA2D_ISR_TEIF
Definition: stm32h723xx.h:9428
#define DMA2D_BGPFCCR_CCM
Definition: stm32h723xx.h:9551
#define DMA2D_ISR_CTCIF
Definition: stm32h723xx.h:9440
#define DMA2D_BGCOLR_BLUE
Definition: stm32h723xx.h:9577
#define DMA2D_FGPFCCR_AI
Definition: stm32h723xx.h:9520
#define DMA2D_OCOLR_GREEN_1
Definition: stm32h723xx.h:9624
#define DMA2D_FGCOLR_GREEN
Definition: stm32h723xx.h:9535
#define DMA2D_BGPFCCR_START
Definition: stm32h723xx.h:9554
#define DMA2D_FGPFCCR_CCM
Definition: stm32h723xx.h:9501
#define DMA2D_LWR_LW
Definition: stm32h723xx.h:9696
#define DMA2D_IFCR_CTWIF
Definition: stm32h723xx.h:9455
#define DMA2D_CR_TWIE
Definition: stm32h723xx.h:9407
#define DMA2D_OCOLR_ALPHA_1
Definition: stm32h723xx.h:9630
#define DMA2D_BGPFCCR_AM
Definition: stm32h723xx.h:9560
#define DMA2D_OPFCCR_RBS
Definition: stm32h723xx.h:9613
#define DMA2D_CR_MODE
Definition: stm32h723xx.h:9419
#define DMA2D_OPFCCR_SB
Definition: stm32h723xx.h:9607
#define DMA2D_FGOR_LO
Definition: stm32h723xx.h:9476
#define DMA2D_OPFCCR_CM
Definition: stm32h723xx.h:9601
#define DMA2D_FGPFCCR_CM
Definition: stm32h723xx.h:9494
#define DMA2D_AMTCR_EN
Definition: stm32h723xx.h:9702
#define DMA2D_CR_CAEIE
Definition: stm32h723xx.h:9410
#define DMA2D_CR_LOM
Definition: stm32h723xx.h:9398
#define DMA2D_CR_ABORT
Definition: stm32h723xx.h:9395
#define DMA2D_OCOLR_RED_1
Definition: stm32h723xx.h:9627
#define DMA2D_NLR_PL
Definition: stm32h723xx.h:9690
#define DMA2D_ISR_CAEIF
Definition: stm32h723xx.h:9437
#define DMA2D_ISR_TCIF
Definition: stm32h723xx.h:9431
#define DMA2D_CR_TCIE
Definition: stm32h723xx.h:9404
#define DMA2D_NLR_NL
Definition: stm32h723xx.h:9687
#define DMA2D_OOR_LO
Definition: stm32h723xx.h:9681
CMSIS STM32H7xx Device Peripheral Access Layer Header File.
DMA2D Controller.
Definition: stm32h723xx.h:686
__IO uint32_t ISR
Definition: stm32h723xx.h:688
__IO uint32_t OCOLR
Definition: stm32h723xx.h:701
__IO uint32_t OOR
Definition: stm32h723xx.h:703
__IO uint32_t BGPFCCR
Definition: stm32h723xx.h:696
__IO uint32_t OPFCCR
Definition: stm32h723xx.h:700
__IO uint32_t AMTCR
Definition: stm32h723xx.h:706
__IO uint32_t FGCOLR
Definition: stm32h723xx.h:695
__IO uint32_t BGOR
Definition: stm32h723xx.h:693
__IO uint32_t NLR
Definition: stm32h723xx.h:704
__IO uint32_t FGOR
Definition: stm32h723xx.h:691
__IO uint32_t BGCOLR
Definition: stm32h723xx.h:697
__IO uint32_t LWR
Definition: stm32h723xx.h:705
__IO uint32_t FGPFCCR
Definition: stm32h723xx.h:694
__IO uint32_t IFCR
Definition: stm32h723xx.h:689
__IO uint32_t CR
Definition: stm32h723xx.h:687