RTEMS 6.1-rc4
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stm32h7xx_hal_spdifrx.h
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1
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_HAL_SPDIFRX_H
21#define STM32H7xx_HAL_SPDIFRX_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx_hal_def.h"
29
30
34#if defined (SPDIFRX)
35
40/* Exported types ------------------------------------------------------------*/
49typedef struct
50{
51 uint32_t InputSelection;
54 uint32_t Retries;
57 uint32_t WaitForActivity;
60 uint32_t ChannelSelection;
64 uint32_t DataFormat;
67 uint32_t StereoMode;
70 uint32_t PreambleTypeMask;
74 uint32_t ChannelStatusMask;
78 uint32_t ValidityBitMask;
81 uint32_t ParityErrorMask;
84 FunctionalState SymbolClockGen;
87 FunctionalState BackupSymbolClockGen;
89} SPDIFRX_InitTypeDef;
90
94typedef struct
95{
96 uint32_t DataFormat;
99 uint32_t StereoMode;
102 uint32_t PreambleTypeMask;
106 uint32_t ChannelStatusMask;
110 uint32_t ValidityBitMask;
113 uint32_t ParityErrorMask;
117} SPDIFRX_SetDataFormatTypeDef;
118
122typedef enum
123{
124 HAL_SPDIFRX_STATE_RESET = 0x00U,
125 HAL_SPDIFRX_STATE_READY = 0x01U,
126 HAL_SPDIFRX_STATE_BUSY = 0x02U,
127 HAL_SPDIFRX_STATE_BUSY_RX = 0x03U,
128 HAL_SPDIFRX_STATE_BUSY_CX = 0x04U,
129 HAL_SPDIFRX_STATE_ERROR = 0x07U
130} HAL_SPDIFRX_StateTypeDef;
131
135#if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
136typedef struct __SPDIFRX_HandleTypeDef
137#else
138typedef struct
139#endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
140{
141 SPDIFRX_TypeDef *Instance; /* SPDIFRX registers base address */
142
143 SPDIFRX_InitTypeDef Init; /* SPDIFRX communication parameters */
144
145 uint32_t *pRxBuffPtr; /* Pointer to SPDIFRX Rx transfer buffer */
146
147 uint32_t *pCsBuffPtr; /* Pointer to SPDIFRX Cx transfer buffer */
148
149 __IO uint16_t RxXferSize; /* SPDIFRX Rx transfer size */
150
151 __IO uint16_t RxXferCount; /* SPDIFRX Rx transfer counter
152 (This field is initialized at the
153 same value as transfer size at the
154 beginning of the transfer and
155 decremented when a sample is received.
156 NbSamplesReceived = RxBufferSize-RxBufferCount) */
157
158 __IO uint16_t CsXferSize; /* SPDIFRX Rx transfer size */
159
160 __IO uint16_t CsXferCount; /* SPDIFRX Rx transfer counter
161 (This field is initialized at the
162 same value as transfer size at the
163 beginning of the transfer and
164 decremented when a sample is received.
165 NbSamplesReceived = RxBufferSize-RxBufferCount) */
166
167 DMA_HandleTypeDef *hdmaCsRx; /* SPDIFRX EC60958_channel_status and user_information
168 DMA handle parameters */
169
170 DMA_HandleTypeDef *hdmaDrRx; /* SPDIFRX Rx DMA handle parameters */
171
172 __IO HAL_LockTypeDef Lock; /* SPDIFRX locking object */
173
174 __IO HAL_SPDIFRX_StateTypeDef State; /* SPDIFRX communication state */
175
176 __IO uint32_t ErrorCode; /* SPDIFRX Error code */
177
178#if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
179 void (*RxHalfCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);
181 void (*RxCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);
182 void (*CxHalfCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);
184 void (*CxCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);
185 void (*ErrorCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);
186 void (* MspInitCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);
187 void (* MspDeInitCallback)(struct __SPDIFRX_HandleTypeDef *hspdif);
188#endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
189
190} SPDIFRX_HandleTypeDef;
191
192#if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
196typedef enum
197{
198 HAL_SPDIFRX_RX_HALF_CB_ID = 0x00U,
199 HAL_SPDIFRX_RX_CPLT_CB_ID = 0x01U,
200 HAL_SPDIFRX_CX_HALF_CB_ID = 0x02U,
201 HAL_SPDIFRX_CX_CPLT_CB_ID = 0x03U,
202 HAL_SPDIFRX_ERROR_CB_ID = 0x04U,
203 HAL_SPDIFRX_MSPINIT_CB_ID = 0x05U,
204 HAL_SPDIFRX_MSPDEINIT_CB_ID = 0x06U
205} HAL_SPDIFRX_CallbackIDTypeDef;
206
210typedef void (*pSPDIFRX_CallbackTypeDef)(SPDIFRX_HandleTypeDef *hspdif);
212#endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
216/* Exported constants --------------------------------------------------------*/
225#define HAL_SPDIFRX_ERROR_NONE ((uint32_t)0x00000000U)
226#define HAL_SPDIFRX_ERROR_TIMEOUT ((uint32_t)0x00000001U)
227#define HAL_SPDIFRX_ERROR_OVR ((uint32_t)0x00000002U)
228#define HAL_SPDIFRX_ERROR_PE ((uint32_t)0x00000004U)
229#define HAL_SPDIFRX_ERROR_DMA ((uint32_t)0x00000008U)
230#define HAL_SPDIFRX_ERROR_UNKNOWN ((uint32_t)0x00000010U)
231#if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
232#define HAL_SPDIFRX_ERROR_INVALID_CALLBACK ((uint32_t)0x00000020U)
233#endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
242#define SPDIFRX_INPUT_IN0 ((uint32_t)0x00000000U)
243#define SPDIFRX_INPUT_IN1 ((uint32_t)0x00010000U)
244#define SPDIFRX_INPUT_IN2 ((uint32_t)0x00020000U)
245#define SPDIFRX_INPUT_IN3 ((uint32_t)0x00030000U)
254#define SPDIFRX_MAXRETRIES_NONE ((uint32_t)0x00000000U)
255#define SPDIFRX_MAXRETRIES_3 ((uint32_t)0x00001000U)
256#define SPDIFRX_MAXRETRIES_15 ((uint32_t)0x00002000U)
257#define SPDIFRX_MAXRETRIES_63 ((uint32_t)0x00003000U)
266#define SPDIFRX_WAITFORACTIVITY_OFF ((uint32_t)0x00000000U)
267#define SPDIFRX_WAITFORACTIVITY_ON ((uint32_t)SPDIFRX_CR_WFA)
276#define SPDIFRX_PREAMBLETYPEMASK_OFF ((uint32_t)0x00000000U)
277#define SPDIFRX_PREAMBLETYPEMASK_ON ((uint32_t)SPDIFRX_CR_PTMSK)
286#define SPDIFRX_CHANNELSTATUS_OFF ((uint32_t)0x00000000U) /* The channel status and user bits are copied
287 into the SPDIF_DR */
288#define SPDIFRX_CHANNELSTATUS_ON ((uint32_t)SPDIFRX_CR_CUMSK) /* The channel status and user bits are not copied
289 into the SPDIF_DR, zeros are written instead*/
298#define SPDIFRX_VALIDITYMASK_OFF ((uint32_t)0x00000000U)
299#define SPDIFRX_VALIDITYMASK_ON ((uint32_t)SPDIFRX_CR_VMSK)
308#define SPDIFRX_PARITYERRORMASK_OFF ((uint32_t)0x00000000U)
309#define SPDIFRX_PARITYERRORMASK_ON ((uint32_t)SPDIFRX_CR_PMSK)
318#define SPDIFRX_CHANNEL_A ((uint32_t)0x00000000U)
319#define SPDIFRX_CHANNEL_B ((uint32_t)SPDIFRX_CR_CHSEL)
328#define SPDIFRX_DATAFORMAT_LSB ((uint32_t)0x00000000U)
329#define SPDIFRX_DATAFORMAT_MSB ((uint32_t)0x00000010U)
330#define SPDIFRX_DATAFORMAT_32BITS ((uint32_t)0x00000020U)
339#define SPDIFRX_STEREOMODE_DISABLE ((uint32_t)0x00000000U)
340#define SPDIFRX_STEREOMODE_ENABLE ((uint32_t)SPDIFRX_CR_RXSTEO)
350#define SPDIFRX_STATE_IDLE ((uint32_t)0xFFFFFFFCU)
351#define SPDIFRX_STATE_SYNC ((uint32_t)0x00000001U)
352#define SPDIFRX_STATE_RCV ((uint32_t)SPDIFRX_CR_SPDIFEN)
361#define SPDIFRX_IT_RXNE ((uint32_t)SPDIFRX_IMR_RXNEIE)
362#define SPDIFRX_IT_CSRNE ((uint32_t)SPDIFRX_IMR_CSRNEIE)
363#define SPDIFRX_IT_PERRIE ((uint32_t)SPDIFRX_IMR_PERRIE)
364#define SPDIFRX_IT_OVRIE ((uint32_t)SPDIFRX_IMR_OVRIE)
365#define SPDIFRX_IT_SBLKIE ((uint32_t)SPDIFRX_IMR_SBLKIE)
366#define SPDIFRX_IT_SYNCDIE ((uint32_t)SPDIFRX_IMR_SYNCDIE)
367#define SPDIFRX_IT_IFEIE ((uint32_t)SPDIFRX_IMR_IFEIE )
376#define SPDIFRX_FLAG_RXNE ((uint32_t)SPDIFRX_SR_RXNE)
377#define SPDIFRX_FLAG_CSRNE ((uint32_t)SPDIFRX_SR_CSRNE)
378#define SPDIFRX_FLAG_PERR ((uint32_t)SPDIFRX_SR_PERR)
379#define SPDIFRX_FLAG_OVR ((uint32_t)SPDIFRX_SR_OVR)
380#define SPDIFRX_FLAG_SBD ((uint32_t)SPDIFRX_SR_SBD)
381#define SPDIFRX_FLAG_SYNCD ((uint32_t)SPDIFRX_SR_SYNCD)
382#define SPDIFRX_FLAG_FERR ((uint32_t)SPDIFRX_SR_FERR)
383#define SPDIFRX_FLAG_SERR ((uint32_t)SPDIFRX_SR_SERR)
384#define SPDIFRX_FLAG_TERR ((uint32_t)SPDIFRX_SR_TERR)
393/* Exported macros -----------------------------------------------------------*/
403#if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
404#define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) do{\
405 (__HANDLE__)->State = HAL_SPDIFRX_STATE_RESET;\
406 (__HANDLE__)->MspInitCallback = NULL;\
407 (__HANDLE__)->MspDeInitCallback = NULL;\
408 }while(0)
409#else
410#define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPDIFRX_STATE_RESET)
411#endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
412
417#define __HAL_SPDIFRX_IDLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= SPDIFRX_STATE_IDLE)
418
423#define __HAL_SPDIFRX_SYNC(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_SYNC)
424
425
430#define __HAL_SPDIFRX_RCV(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_RCV)
431
432
446#define __HAL_SPDIFRX_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__))
447#define __HAL_SPDIFRX_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR\
448 &= (uint16_t)(~(__INTERRUPT__)))
449
463#define __HAL_SPDIFRX_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR\
464 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
465
481#define __HAL_SPDIFRX_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->SR)\
482 & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
483
495#define __HAL_SPDIFRX_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->IFCR = (uint32_t)(__IT_CLEAR__))
496
501/* Exported functions --------------------------------------------------------*/
509/* Initialization/de-initialization functions **********************************/
510HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif);
511HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif);
512void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif);
513void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif);
514HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat);
515
516/* Callbacks Register/UnRegister functions ***********************************/
517#if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
518HAL_StatusTypeDef HAL_SPDIFRX_RegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID,
519 pSPDIFRX_CallbackTypeDef pCallback);
520HAL_StatusTypeDef HAL_SPDIFRX_UnRegisterCallback(SPDIFRX_HandleTypeDef *hspdif,
521 HAL_SPDIFRX_CallbackIDTypeDef CallbackID);
522#endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
530/* I/O operation functions ***************************************************/
531/* Blocking mode: Polling */
532HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size,
533 uint32_t Timeout);
534HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size,
535 uint32_t Timeout);
536
537/* Non-Blocking mode: Interrupt */
538HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
539HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
540void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif);
541
542/* Non-Blocking mode: DMA */
543HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
544HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
545HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif);
546
547/* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
548void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
549void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
550void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif);
551void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
552void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
560/* Peripheral Control and State functions ************************************/
561HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef const *const hspdif);
562uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef const *const hspdif);
570/* Private types -------------------------------------------------------------*/
571/* Private variables ---------------------------------------------------------*/
572/* Private constants ---------------------------------------------------------*/
573/* Private macros ------------------------------------------------------------*/
578#define IS_SPDIFRX_INPUT_SELECT(INPUT) (((INPUT) == SPDIFRX_INPUT_IN1) || \
579 ((INPUT) == SPDIFRX_INPUT_IN2) || \
580 ((INPUT) == SPDIFRX_INPUT_IN3) || \
581 ((INPUT) == SPDIFRX_INPUT_IN0))
582
583#define IS_SPDIFRX_MAX_RETRIES(RET) (((RET) == SPDIFRX_MAXRETRIES_NONE) || \
584 ((RET) == SPDIFRX_MAXRETRIES_3) || \
585 ((RET) == SPDIFRX_MAXRETRIES_15) || \
586 ((RET) == SPDIFRX_MAXRETRIES_63))
587
588#define IS_SPDIFRX_WAIT_FOR_ACTIVITY(VAL) (((VAL) == SPDIFRX_WAITFORACTIVITY_ON) || \
589 ((VAL) == SPDIFRX_WAITFORACTIVITY_OFF))
590
591#define IS_PREAMBLE_TYPE_MASK(VAL) (((VAL) == SPDIFRX_PREAMBLETYPEMASK_ON) || \
592 ((VAL) == SPDIFRX_PREAMBLETYPEMASK_OFF))
593
594#define IS_VALIDITY_MASK(VAL) (((VAL) == SPDIFRX_VALIDITYMASK_OFF) || \
595 ((VAL) == SPDIFRX_VALIDITYMASK_ON))
596
597#define IS_PARITY_ERROR_MASK(VAL) (((VAL) == SPDIFRX_PARITYERRORMASK_OFF) || \
598 ((VAL) == SPDIFRX_PARITYERRORMASK_ON))
599
600#define IS_SPDIFRX_CHANNEL(CHANNEL) (((CHANNEL) == SPDIFRX_CHANNEL_A) || \
601 ((CHANNEL) == SPDIFRX_CHANNEL_B))
602
603#define IS_SPDIFRX_DATA_FORMAT(FORMAT) (((FORMAT) == SPDIFRX_DATAFORMAT_LSB) || \
604 ((FORMAT) == SPDIFRX_DATAFORMAT_MSB) || \
605 ((FORMAT) == SPDIFRX_DATAFORMAT_32BITS))
606
607#define IS_STEREO_MODE(MODE) (((MODE) == SPDIFRX_STEREOMODE_DISABLE) || \
608 ((MODE) == SPDIFRX_STEREOMODE_ENABLE))
609
610#define IS_CHANNEL_STATUS_MASK(VAL) (((VAL) == SPDIFRX_CHANNELSTATUS_ON) || \
611 ((VAL) == SPDIFRX_CHANNELSTATUS_OFF))
612
613#define IS_SYMBOL_CLOCK_GEN(VAL) (((VAL) == ENABLE) || ((VAL) == DISABLE))
618/* Private functions ---------------------------------------------------------*/
630#endif /* SPDIFRX */
636#ifdef __cplusplus
637}
638#endif
639
640
641#endif /* STM32H7xx_HAL_SPDIFRX_H */
__IO
#define __IO
Definition: core_cm4.h:239
stm32h7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32h7xx_hal_def.h:47
HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32h7xx_hal_def.h:58
SPDIFRX_TypeDef
SPDIF-RX Interface.
Definition: stm32h723xx.h:1391
__DMA_HandleTypeDef
DMA handle Structure definition.
Definition: stm32h7xx_hal_dma.h:138
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