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RTEMS 6.1-rc4
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1#ifndef __MGT5200_SDMA_H
2#define __MGT5200_SDMA_H
29 volatile uint32 taskBar;
30 volatile uint32 currentPointer;
31 volatile uint32 endPointer;
32 volatile uint32 variablePointer;
34 volatile uint8 IntVect1;
35 volatile uint8 IntVect2;
36 volatile uint16 PtdCntrl;
38 volatile uint32 IntPend;
39 volatile uint32 IntMask;
41 volatile uint32 TCR01;
42 volatile uint32 TCR23;
43 volatile uint32 TCR45;
44 volatile uint32 TCR67;
45 volatile uint32 TCR89;
46 volatile uint32 TCRAB;
47 volatile uint32 TCRCD;
48 volatile uint32 TCREF;
83 volatile uint32 cReqSelect;
84 volatile uint32 taskSize0;
85 volatile uint32 taskSize1;
86 volatile uint32 MDEDebug;
87 volatile uint32 ADSDebug;
88 volatile uint32 Value1;
89 volatile uint32 Value2;
90 volatile uint32 Control;
91 volatile uint32 Status;
92 volatile uint32 PTDDebug;
95#define SDMA_PTDCNTRL_TI 0x8000
96#define SDMA_PTDCNTRL_TEA 0x4000
97#define SDMA_PTDCNTRL_HE 0x2000
98#define SDMA_PTDCNTRL_PE 0x0001
100#define SDMA_CREQSELECT_REQ31_MASK (~0xC0000000UL)
101#define SDMA_CREQSELECT_REQ30_MASK (~0x30000000UL)
102#define SDMA_CREQSELECT_REQ29_MASK (~0x0C000000UL)
103#define SDMA_CREQSELECT_REQ28_MASK (~0x03000000UL)
104#define SDMA_CREQSELECT_REQ27_MASK (~0x00C00000UL)
105#define SDMA_CREQSELECT_REQ26_MASK (~0x00300000UL)
106#define SDMA_CREQSELECT_REQ25_MASK (~0x000C0000UL)
107#define SDMA_CREQSELECT_REQ24_MASK (~0x00030000UL)
108#define SDMA_CREQSELECT_REQ23_MASK (~0x0000C000UL)
109#define SDMA_CREQSELECT_REQ22_MASK (~0x00003000UL)
110#define SDMA_CREQSELECT_REQ21_MASK (~0x00000C00UL)
111#define SDMA_CREQSELECT_REQ20_MASK (~0x00000300UL)
112#define SDMA_CREQSELECT_REQ19_MASK (~0x000000C0UL)
113#define SDMA_CREQSELECT_REQ18_MASK (~0x00000030UL)
114#define SDMA_CREQSELECT_REQ17_MASK (~0x0000000CUL)
115#define SDMA_CREQSELECT_REQ16_MASK (~0x00000003UL)
117#define SDMA_CREQSELECT_REQ31_ALWAYS31 0xC0000000UL
118#define SDMA_CREQSELECT_REQ30_ALWAYS30 0x30000000UL
119#define SDMA_CREQSELECT_REQ29_ALWAYS29 0x0C000000UL
120#define SDMA_CREQSELECT_REQ28_ALWAYS28 0x03000000UL
121#define SDMA_CREQSELECT_REQ27_ALWAYS27 0x00C00000UL
122#define SDMA_CREQSELECT_REQ26_ALWAYS26 0x00300000UL
123#define SDMA_CREQSELECT_REQ25_ALWAYS25 0x000C0000UL
124#define SDMA_CREQSELECT_REQ24_ALWAYS24 0x00030000UL
125#define SDMA_CREQSELECT_REQ23_ALWAYS23 0x0000C000UL
126#define SDMA_CREQSELECT_REQ22_ALWAYS22 0x00003000UL
127#define SDMA_CREQSELECT_REQ21_ALWAYS21 0x00000C00UL
128#define SDMA_CREQSELECT_REQ20_ALWAYS20 0x00000300UL
129#define SDMA_CREQSELECT_REQ19_ALWAYS19 0x000000C0UL
130#define SDMA_CREQSELECT_REQ18_ALWAYS18 0x00000030UL
131#define SDMA_CREQSELECT_REQ17_ALWAYS17 0x0000000CUL
132#define SDMA_CREQSELECT_REQ16_ALWAYS16 0x00000003UL
134#define SDMA_CREQSELECT_REQ31_SCTIMER7 0x00000000UL
135#define SDMA_CREQSELECT_REQ30_SCTIMER6 0x00000000UL
136#define SDMA_CREQSELECT_REQ29_SCTIMER5 0x00000000UL
137#define SDMA_CREQSELECT_REQ28_SCTIMER4 0x00000000UL
138#define SDMA_CREQSELECT_REQ27_SCTIMER3 0x00000000UL
139#define SDMA_CREQSELECT_REQ26_PSC6_TX 0x00000000UL
140#define SDMA_CREQSELECT_REQ25_PSC6_RX 0x00000000UL
141#define SDMA_CREQSELECT_REQ24_I2C1_TX 0x00000000UL
142#define SDMA_CREQSELECT_REQ23_I2C1_RX 0x00000000UL
143#define SDMA_CREQSELECT_REQ22_I2C2_TX 0x00000000UL
144#define SDMA_CREQSELECT_REQ21_I2C2_RX 0x00000000UL
145#define SDMA_CREQSELECT_REQ20_PSC4_TX 0x00000000UL
146#define SDMA_CREQSELECT_REQ19_PSC4_RX 0x00000000UL
147#define SDMA_CREQSELECT_REQ18_PSC5_TX 0x00000000UL
148#define SDMA_CREQSELECT_REQ17_PSC5_RX 0x00000000UL
149#define SDMA_CREQSELECT_REQ16_LP 0x00000000UL
151#define SDMA_CREQSELECT_ALWAYS30 0xC0000000UL