RTEMS
6.1-rc4
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bsps
arm
tms570
include
bsp
ti_herc
reg_stc.h
Go to the documentation of this file.
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/* SPDX-License-Identifier: BSD-2-Clause */
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/* The header file is generated by make_header.py from STC.json */
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/* Current script's version can be found at: */
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/* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
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/*
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* Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
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*
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* Czech Technical University in Prague
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* Zikova 1903/4
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* 166 36 Praha 6
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* Czech Republic
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* The views and conclusions contained in the software and documentation are those
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* of the authors and should not be interpreted as representing official policies,
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* either expressed or implied, of the FreeBSD Project.
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*/
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#ifndef LIBBSP_ARM_TMS570_STC
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#define LIBBSP_ARM_TMS570_STC
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#include <
bsp/utility.h
>
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typedef
struct
{
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uint32_t STCGCR0;
/*STC Global Control Register 0*/
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uint32_t STCGCR1;
/*STCGlobal Control Register 1*/
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uint32_t STCTPR;
/*Self-Test Run Timeout Counter Preload Register*/
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uint32_t STC_CADDR;
/*STC Current ROM Address Register*/
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uint32_t STCCICR;
/*STC Current Interval Count Register*/
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uint32_t STCGSTAT;
/*Self-Test Global Status Register*/
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uint32_t STCFSTAT;
/*Self-Test Fail Status Register*/
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uint32_t CPU1_CURMISR3;
/*CPU1 Current MISR Register 3*/
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uint32_t CPU1_CURMISR2;
/*CPU1 Current MISR Register 2*/
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uint32_t CPU1_CURMISR1;
/*CPU1 Current MISR Register 1*/
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uint32_t CPU1_CURMISR0;
/*CPU1 Current MISR Register 0*/
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uint32_t CPU2_CURMISR3;
/*CPU2 Current MISR Register 3*/
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uint32_t CPU2_CURMISR2;
/*CPU2 Current MISR Register 2*/
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uint32_t CPU2_CURMISR1;
/*CPU2 Current MISR Register 1*/
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uint32_t CPU2_CURMISR0;
/*CPU2 Current MISR Register 0*/
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uint32_t STCSCSCR;
/*Signature Compare Self-Check Register*/
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}
tms570_stc_t
;
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/*---------------------TMS570_STC_STCGCR0---------------------*/
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/* field: INTCOUNT - Number of intervals of self-test run */
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#define TMS570_STC_STCGCR0_INTCOUNT(val) BSP_FLD32(val,16, 31)
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#define TMS570_STC_STCGCR0_INTCOUNT_GET(reg) BSP_FLD32GET(reg,16, 31)
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#define TMS570_STC_STCGCR0_INTCOUNT_SET(reg,val) BSP_FLD32SET(reg, val,16, 31)
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/* field: RS_CNT - Restart or Continue */
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#define TMS570_STC_STCGCR0_RS_CNT BSP_BIT32(0)
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/*---------------------TMS570_STC_STCGCR1---------------------*/
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/* field: STC_ENA - Self-test run enable key */
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#define TMS570_STC_STCGCR1_STC_ENA(val) BSP_FLD32(val,0, 3)
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#define TMS570_STC_STCGCR1_STC_ENA_GET(reg) BSP_FLD32GET(reg,0, 3)
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#define TMS570_STC_STCGCR1_STC_ENA_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
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/*---------------------TMS570_STC_STCTPR---------------------*/
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/* field: RTOD - Self-test timeout count preload */
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/* Whole 32 bits */
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/*--------------------TMS570_STC_STC_CADDR--------------------*/
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/* field: ADDR - Current ROM Address */
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/* Whole 32 bits */
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/*---------------------TMS570_STC_STCCICR---------------------*/
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/* field: N - Interval Number */
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#define TMS570_STC_STCCICR_N(val) BSP_FLD32(val,0, 15)
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#define TMS570_STC_STCCICR_N_GET(reg) BSP_FLD32GET(reg,0, 15)
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#define TMS570_STC_STCCICR_N_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
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/*--------------------TMS570_STC_STCGSTAT--------------------*/
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/* field: TEST_FAIL - Test Fail */
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#define TMS570_STC_STCGSTAT_TEST_FAIL BSP_BIT32(1)
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/* field: TEST_DONE - Test Done */
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#define TMS570_STC_STCGSTAT_TEST_DONE BSP_BIT32(0)
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/*--------------------TMS570_STC_STCFSTAT--------------------*/
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/* field: TO_ERR - Timeout Error */
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#define TMS570_STC_STCFSTAT_TO_ERR BSP_BIT32(2)
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/* field: CPU2_FAIL - CPU2 failure info */
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#define TMS570_STC_STCFSTAT_CPU2_FAIL BSP_BIT32(1)
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/* field: CPU1_FAIL - CPU1 failure info */
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#define TMS570_STC_STCFSTAT_CPU1_FAIL BSP_BIT32(0)
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/*------------------TMS570_STC_CPU1_CURMISR3------------------*/
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/* field: MISR - MISR data from CPU1 */
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/* Whole 32 bits */
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/*------------------TMS570_STC_CPU1_CURMISR2------------------*/
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/* field: MISR - MISR data from CPU1 */
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/* Whole 32 bits */
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/*------------------TMS570_STC_CPU1_CURMISR1------------------*/
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/* field: MISR - MISR data from CPU1 */
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/* Whole 32 bits */
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/*------------------TMS570_STC_CPU1_CURMISR0------------------*/
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/* field: MISR - MISR data from CPU1 */
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/* Whole 32 bits */
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/*------------------TMS570_STC_CPU2_CURMISR3------------------*/
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/* field: MISR - MISR data from CPU2 */
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/* Whole 32 bits */
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/*------------------TMS570_STC_CPU2_CURMISR2------------------*/
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/* field: MISR - MISR data from CPU2 */
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/* Whole 32 bits */
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/*------------------TMS570_STC_CPU2_CURMISR1------------------*/
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/* field: MISR - MISR data from CPU2 */
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/* Whole 32 bits */
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/*------------------TMS570_STC_CPU2_CURMISR0------------------*/
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/* field: MISR - MISR data from CPU2 */
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/* Whole 32 bits */
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/*--------------------TMS570_STC_STCSCSCR--------------------*/
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/* field: FAULT_INS - Enable / Disable fault insertion. */
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#define TMS570_STC_STCSCSCR_FAULT_INS BSP_BIT32(4)
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/* field: SELF_CHECK_KEY - Signature compare logic self-check enable key */
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#define TMS570_STC_STCSCSCR_SELF_CHECK_KEY(val) BSP_FLD32(val,0, 3)
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#define TMS570_STC_STCSCSCR_SELF_CHECK_KEY_GET(reg) BSP_FLD32GET(reg,0, 3)
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#define TMS570_STC_STCSCSCR_SELF_CHECK_KEY_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
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#endif
/* LIBBSP_ARM_TMS570_STC */
utility.h
This header file provides utility macros for BSPs.
tms570_stc_t
Definition:
reg_stc.h:54
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