51#ifndef LIBCPU_POWERPC_MPC55XX_H
52#define LIBCPU_POWERPC_MPC55XX_H
63int mpc55xx_flash_copy(
void *dest,
const void *src,
size_t nbytes);
64int mpc55xx_flash_copy_op(
void *rdest,
const void *src,
size_t nbytes,
65 uint32_t opmask, uint32_t *p_fail_addr);
66int mpc55xx_flash_size(uint32_t *p_size);
67int mpc55xx_flash_writable(
void);
68uint32_t mpc55xx_flash_address(
void);
69void mpc55xx_flash_set_read_only(
void);
70void mpc55xx_flash_set_read_write(
void);
72int mpc55xx_physical_address(
const void *addr, uint32_t *p_result);
73int mpc55xx_mapped_address(
const void *addr, uint32_t *p_result);
76#define MPC55XX_FLASH_BLANK_CHECK 0x01
77#define MPC55XX_FLASH_UNLOCK 0x02
78#define MPC55XX_FLASH_ERASE 0x04
79#define MPC55XX_FLASH_PROGRAM 0x08
80#define MPC55XX_FLASH_VERIFY 0x10
92#define MPC55XX_FLASH_CONFIG_ERR (-1)
93#define MPC55XX_FLASH_SIZE_ERR (-2)
94#define MPC55XX_FLASH_RANGE_ERR (-3)
95#define MPC55XX_FLASH_ERASE_ERR (-4)
96#define MPC55XX_FLASH_PROGRAM_ERR (-5)
97#define MPC55XX_FLASH_NOT_BLANK_ERR (-6)
98#define MPC55XX_FLASH_VERIFY_ERR (-7)
99#define MPC55XX_FLASH_LOCK_ERR (-8)
101#define MPC55XX_CACHE_ALIGNED_MASK ((uintptr_t) 0x1f)
103#define MPC55XX_CACHE_LINE_SIZE 32
108static inline int mpc55xx_is_cache_aligned(
const void *s,
size_t n)
110 return !(((uintptr_t) s & MPC55XX_CACHE_ALIGNED_MASK) || (n & MPC55XX_CACHE_ALIGNED_MASK));
113static inline uintptr_t mpc55xx_cache_aligned_start(
const void *s)
115 return ((uintptr_t) s & MPC55XX_CACHE_ALIGNED_MASK) ? (((uintptr_t) s & ~MPC55XX_CACHE_ALIGNED_MASK) + MPC55XX_CACHE_LINE_SIZE) : (uintptr_t)s;
118static inline size_t mpc55xx_non_cache_aligned_size(
const void *s)
120 return (uintptr_t) mpc55xx_cache_aligned_start( s) - (uintptr_t) s;
123static inline size_t mpc55xx_cache_aligned_size(
const void *s,
size_t n)
125 return (n - mpc55xx_non_cache_aligned_size( s)) & ~MPC55XX_CACHE_ALIGNED_MASK;
131static inline uint32_t mpc55xx_count_leading_zeros( uint32_t value)
142static inline void mpc55xx_wait_for_interrupt(
void)
144 #ifdef MPC55XX_HAS_WAIT_INSTRUCTION
146 ".machine \"push\"\n"
152 __asm__
volatile (
"");
156static inline void mpc55xx_mmu_apply_config(
const struct MMU_tag *
config)
162 __asm__
volatile (
"tlbwe");
#define PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val)
Sets the Special Purpose Register with number spr to the value in val.
Definition: powerpc-utility.h:590
General purpose assembler macros, linker command file support and some inline functions for direct re...
Register definitions for the MPC55xx and MPC56xx microcontroller family.
Definition: regs-mmu.h:60
Definition: deflate.c:114