RTEMS 6.1-rc4
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actbl1.h
1/******************************************************************************
2 *
3 * Name: actbl1.h - Additional ACPI table definitions
4 *
5 *****************************************************************************/
6
7/******************************************************************************
8 *
9 * 1. Copyright Notice
10 *
11 * Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
12 * All rights reserved.
13 *
14 * 2. License
15 *
16 * 2.1. This is your license from Intel Corp. under its intellectual property
17 * rights. You may have additional license terms from the party that provided
18 * you this software, covering your right to use that party's intellectual
19 * property rights.
20 *
21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
22 * copy of the source code appearing in this file ("Covered Code") an
23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the
24 * base code distributed originally by Intel ("Original Intel Code") to copy,
25 * make derivatives, distribute, use and display any portion of the Covered
26 * Code in any form, with the right to sublicense such rights; and
27 *
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
29 * license (with the right to sublicense), under only those claims of Intel
30 * patents that are infringed by the Original Intel Code, to make, use, sell,
31 * offer to sell, and import the Covered Code and derivative works thereof
32 * solely to the minimum extent necessary to exercise the above copyright
33 * license, and in no event shall the patent license extend to any additions
34 * to or modifications of the Original Intel Code. No other license or right
35 * is granted directly or by implication, estoppel or otherwise;
36 *
37 * The above copyright and patent license is granted only if the following
38 * conditions are met:
39 *
40 * 3. Conditions
41 *
42 * 3.1. Redistribution of Source with Rights to Further Distribute Source.
43 * Redistribution of source code of any substantial portion of the Covered
44 * Code or modification with rights to further distribute source must include
45 * the above Copyright Notice, the above License, this list of Conditions,
46 * and the following Disclaimer and Export Compliance provision. In addition,
47 * Licensee must cause all Covered Code to which Licensee contributes to
48 * contain a file documenting the changes Licensee made to create that Covered
49 * Code and the date of any change. Licensee must include in that file the
50 * documentation of any changes made by any predecessor Licensee. Licensee
51 * must include a prominent statement that the modification is derived,
52 * directly or indirectly, from Original Intel Code.
53 *
54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source.
55 * Redistribution of source code of any substantial portion of the Covered
56 * Code or modification without rights to further distribute source must
57 * include the following Disclaimer and Export Compliance provision in the
58 * documentation and/or other materials provided with distribution. In
59 * addition, Licensee may not authorize further sublicense of source of any
60 * portion of the Covered Code, and must include terms to the effect that the
61 * license from Licensee to its licensee is limited to the intellectual
62 * property embodied in the software Licensee provides to its licensee, and
63 * not to intellectual property embodied in modifications its licensee may
64 * make.
65 *
66 * 3.3. Redistribution of Executable. Redistribution in executable form of any
67 * substantial portion of the Covered Code or modification must reproduce the
68 * above Copyright Notice, and the following Disclaimer and Export Compliance
69 * provision in the documentation and/or other materials provided with the
70 * distribution.
71 *
72 * 3.4. Intel retains all right, title, and interest in and to the Original
73 * Intel Code.
74 *
75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by
76 * Intel shall be used in advertising or otherwise to promote the sale, use or
77 * other dealings in products derived from or relating to the Covered Code
78 * without prior written authorization from Intel.
79 *
80 * 4. Disclaimer and Export Compliance
81 *
82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE,
85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY
86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY
87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
88 * PARTICULAR PURPOSE.
89 *
90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL
95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS
96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY
97 * LIMITED REMEDY.
98 *
99 * 4.3. Licensee shall not export, either directly or indirectly, any of this
100 * software or system incorporating such software without first obtaining any
101 * required license or other approval from the U. S. Department of Commerce or
102 * any other agency or department of the United States Government. In the
103 * event Licensee exports any such software from the United States or
104 * re-exports any such software from a foreign destination, Licensee shall
105 * ensure that the distribution and export/re-export of the software is in
106 * compliance with all laws, regulations, orders, or other restrictions of the
107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor
108 * any of its subsidiaries will export/re-export any technical data, process,
109 * software, or service, directly or indirectly, to any country for which the
110 * United States government or any agency thereof requires an export license,
111 * other governmental approval, or letter of assurance, without first obtaining
112 * such license, approval or letter.
113 *
114 *****************************************************************************
115 *
116 * Alternatively, you may choose to be licensed under the terms of the
117 * following license:
118 *
119 * Redistribution and use in source and binary forms, with or without
120 * modification, are permitted provided that the following conditions
121 * are met:
122 * 1. Redistributions of source code must retain the above copyright
123 * notice, this list of conditions, and the following disclaimer,
124 * without modification.
125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
126 * substantially similar to the "NO WARRANTY" disclaimer below
127 * ("Disclaimer") and any redistribution must be conditioned upon
128 * including a substantially similar Disclaimer requirement for further
129 * binary redistribution.
130 * 3. Neither the names of the above-listed copyright holders nor the names
131 * of any contributors may be used to endorse or promote products derived
132 * from this software without specific prior written permission.
133 *
134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
145 *
146 * Alternatively, you may choose to be licensed under the terms of the
147 * GNU General Public License ("GPL") version 2 as published by the Free
148 * Software Foundation.
149 *
150 *****************************************************************************/
151
152#ifndef __ACTBL1_H__
153#define __ACTBL1_H__
154
155
156/*******************************************************************************
157 *
158 * Additional ACPI Tables
159 *
160 * These tables are not consumed directly by the ACPICA subsystem, but are
161 * included here to support device drivers and the AML disassembler.
162 *
163 ******************************************************************************/
164
165
166/*
167 * Values for description table header signatures for tables defined in this
168 * file. Useful because they make it more difficult to inadvertently type in
169 * the wrong signature.
170 */
171#define ACPI_SIG_AEST "AEST" /* Arm Error Source Table */
172#define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */
173#define ACPI_SIG_ASPT "ASPT" /* AMD Secure Processor Table */
174#define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */
175#define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */
176#define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */
177#define ACPI_SIG_CEDT "CEDT" /* CXL Early Discovery Table */
178#define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */
179#define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */
180#define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */
181#define ACPI_SIG_DBGP "DBGP" /* Debug Port table */
182#define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */
183#define ACPI_SIG_DRTM "DRTM" /* Dynamic Root of Trust for Measurement table */
184#define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */
185#define ACPI_SIG_EINJ "EINJ" /* Error Injection table */
186#define ACPI_SIG_ERST "ERST" /* Error Record Serialization Table */
187#define ACPI_SIG_FPDT "FPDT" /* Firmware Performance Data Table */
188#define ACPI_SIG_GTDT "GTDT" /* Generic Timer Description Table */
189#define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */
190#define ACPI_SIG_HMAT "HMAT" /* Heterogeneous Memory Attributes Table */
191#define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */
192#define ACPI_SIG_IBFT "IBFT" /* iSCSI Boot Firmware Table */
193#define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table*/
194
195#define ACPI_SIG_S3PT "S3PT" /* S3 Performance (sub)Table */
196#define ACPI_SIG_PCCS "PCC" /* PCC Shared Memory Region */
197
198
199/* Reserved table signatures */
200
201#define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */
202#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
203
204/*
205 * These tables have been seen in the field, but no definition has been found
206 */
207#ifdef ACPI_UNDEFINED_TABLES
208#define ACPI_SIG_ATKG "ATKG"
209#define ACPI_SIG_GSCI "GSCI" /* GMCH SCI table */
210#define ACPI_SIG_IEIT "IEIT"
211#endif
212
213/*
214 * All tables must be byte-packed to match the ACPI specification, since
215 * the tables are provided by the system BIOS.
216 */
217#pragma pack(1)
218
219/*
220 * Note: C bitfields are not used for this reason:
221 *
222 * "Bitfields are great and easy to read, but unfortunately the C language
223 * does not specify the layout of bitfields in memory, which means they are
224 * essentially useless for dealing with packed data in on-disk formats or
225 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
226 * this decision was a design error in C. Ritchie could have picked an order
227 * and stuck with it." Norman Ramsey.
228 * See http://stackoverflow.com/a/1053662/41661
229 */
230
231
232/*******************************************************************************
233 *
234 * Common subtable headers
235 *
236 ******************************************************************************/
237
238/* Generic subtable header (used in MADT, SRAT, etc.) */
239
241{
242 UINT8 Type;
243 UINT8 Length;
244
246
247
248/* Subtable header for WHEA tables (EINJ, ERST, WDAT) */
249
250typedef struct acpi_whea_header
251{
252 UINT8 Action;
253 UINT8 Instruction;
254 UINT8 Flags;
255 UINT8 Reserved;
256 ACPI_GENERIC_ADDRESS RegisterRegion;
257 UINT64 Value; /* Value used with Read/Write register */
258 UINT64 Mask; /* Bitmask required for this register instruction */
259
261
262
263/*******************************************************************************
264 *
265 * ASF - Alert Standard Format table (Signature "ASF!")
266 * Revision 0x10
267 *
268 * Conforms to the Alert Standard Format Specification V2.0, 23 April 2003
269 *
270 ******************************************************************************/
271
272typedef struct acpi_table_asf
273{
274 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
275
277
278
279/* ASF subtable header */
280
281typedef struct acpi_asf_header
282{
283 UINT8 Type;
284 UINT8 Reserved;
285 UINT16 Length;
286
288
289
290/* Values for Type field above */
291
292enum AcpiAsfType
293{
294 ACPI_ASF_TYPE_INFO = 0,
295 ACPI_ASF_TYPE_ALERT = 1,
296 ACPI_ASF_TYPE_CONTROL = 2,
297 ACPI_ASF_TYPE_BOOT = 3,
298 ACPI_ASF_TYPE_ADDRESS = 4,
299 ACPI_ASF_TYPE_RESERVED = 5
300};
301
302/*
303 * ASF subtables
304 */
305
306/* 0: ASF Information */
307
308typedef struct acpi_asf_info
309{
310 ACPI_ASF_HEADER Header;
311 UINT8 MinResetValue;
312 UINT8 MinPollInterval;
313 UINT16 SystemId;
314 UINT32 MfgId;
315 UINT8 Flags;
316 UINT8 Reserved2[3];
317
319
320/* Masks for Flags field above */
321
322#define ACPI_ASF_SMBUS_PROTOCOLS (1)
323
324
325/* 1: ASF Alerts */
326
327typedef struct acpi_asf_alert
328{
329 ACPI_ASF_HEADER Header;
330 UINT8 AssertMask;
331 UINT8 DeassertMask;
332 UINT8 Alerts;
333 UINT8 DataLength;
334
336
338{
339 UINT8 Address;
340 UINT8 Command;
341 UINT8 Mask;
342 UINT8 Value;
343 UINT8 SensorType;
344 UINT8 Type;
345 UINT8 Offset;
346 UINT8 SourceType;
347 UINT8 Severity;
348 UINT8 SensorNumber;
349 UINT8 Entity;
350 UINT8 Instance;
351
353
354
355/* 2: ASF Remote Control */
356
357typedef struct acpi_asf_remote
358{
359 ACPI_ASF_HEADER Header;
360 UINT8 Controls;
361 UINT8 DataLength;
362 UINT16 Reserved2;
363
365
367{
368 UINT8 Function;
369 UINT8 Address;
370 UINT8 Command;
371 UINT8 Value;
372
374
375
376/* 3: ASF RMCP Boot Options */
377
378typedef struct acpi_asf_rmcp
379{
380 ACPI_ASF_HEADER Header;
381 UINT8 Capabilities[7];
382 UINT8 CompletionCode;
383 UINT32 EnterpriseId;
384 UINT8 Command;
385 UINT16 Parameter;
386 UINT16 BootOptions;
387 UINT16 OemParameters;
388
390
391
392/* 4: ASF Address */
393
394typedef struct acpi_asf_address
395{
396 ACPI_ASF_HEADER Header;
397 UINT8 EpromAddress;
398 UINT8 Devices;
399
401
402/*******************************************************************************
403 *
404 * ASPT - AMD Secure Processor Table (Signature "ASPT")
405 * Revision 0x1
406 *
407 * Conforms to AMD Socket SP5/SP6 Platform ASPT Rev1 Specification,
408 * 12 September 2022
409 *
410 ******************************************************************************/
411
412typedef struct acpi_table_aspt
413{
414 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
415 UINT32 NumEntries;
416
418
419
420/* ASPT subtable header */
421
422typedef struct acpi_aspt_header
423{
424 UINT16 Type;
425 UINT16 Length;
426
428
429
430/* Values for Type field above */
431
432enum AcpiAsptType
433{
434 ACPI_ASPT_TYPE_GLOBAL_REGS = 0,
435 ACPI_ASPT_TYPE_SEV_MBOX_REGS = 1,
436 ACPI_ASPT_TYPE_ACPI_MBOX_REGS = 2,
437 ACPI_ASPT_TYPE_UNKNOWN = 3,
438};
439
440/*
441 * ASPT subtables
442 */
443
444/* 0: ASPT Global Registers */
445
447{
448 ACPI_ASPT_HEADER Header;
449 UINT32 Reserved;
450 UINT64 FeatureRegAddr;
451 UINT64 IrqEnRegAddr;
452 UINT64 IrqStRegAddr;
453
455
456
457/* 1: ASPT SEV Mailbox Registers */
458
460{
461 ACPI_ASPT_HEADER Header;
462 UINT8 MboxIrqId;
463 UINT8 Reserved[3];
464 UINT64 CmdRespRegAddr;
465 UINT64 CmdBufLoRegAddr;
466 UINT64 CmdBufHiRegAddr;
467
469
470
471/* 2: ASPT ACPI Mailbox Registers */
472
474{
475 ACPI_ASPT_HEADER Header;
476 UINT32 Reserved1;
477 UINT64 CmdRespRegAddr;
478 UINT64 Reserved2[2];
479
481
482
483/*******************************************************************************
484 *
485 * BERT - Boot Error Record Table (ACPI 4.0)
486 * Version 1
487 *
488 ******************************************************************************/
489
490typedef struct acpi_table_bert
491{
492 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
493 UINT32 RegionLength; /* Length of the boot error region */
494 UINT64 Address; /* Physical address of the error region */
495
497
498
499/* Boot Error Region (not a subtable, pointed to by Address field above) */
500
501typedef struct acpi_bert_region
502{
503 UINT32 BlockStatus; /* Type of error information */
504 UINT32 RawDataOffset; /* Offset to raw error data */
505 UINT32 RawDataLength; /* Length of raw error data */
506 UINT32 DataLength; /* Length of generic error data */
507 UINT32 ErrorSeverity; /* Severity code */
508
510
511/* Values for BlockStatus flags above */
512
513#define ACPI_BERT_UNCORRECTABLE (1)
514#define ACPI_BERT_CORRECTABLE (1<<1)
515#define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2)
516#define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3)
517#define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */
518
519/* Values for ErrorSeverity above */
520
521enum AcpiBertErrorSeverity
522{
523 ACPI_BERT_ERROR_CORRECTABLE = 0,
524 ACPI_BERT_ERROR_FATAL = 1,
525 ACPI_BERT_ERROR_CORRECTED = 2,
526 ACPI_BERT_ERROR_NONE = 3,
527 ACPI_BERT_ERROR_RESERVED = 4 /* 4 and greater are reserved */
528};
529
530/*
531 * Note: The generic error data that follows the ErrorSeverity field above
532 * uses the ACPI_HEST_GENERIC_DATA defined under the HEST table below
533 */
534
535
536/*******************************************************************************
537 *
538 * BGRT - Boot Graphics Resource Table (ACPI 5.0)
539 * Version 1
540 *
541 ******************************************************************************/
542
543typedef struct acpi_table_bgrt
544{
545 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
546 UINT16 Version;
547 UINT8 Status;
548 UINT8 ImageType;
549 UINT64 ImageAddress;
550 UINT32 ImageOffsetX;
551 UINT32 ImageOffsetY;
552
554
555/* Flags for Status field above */
556
557#define ACPI_BGRT_DISPLAYED (1)
558#define ACPI_BGRT_ORIENTATION_OFFSET (3 << 1)
559
560
561/*******************************************************************************
562 *
563 * BOOT - Simple Boot Flag Table
564 * Version 1
565 *
566 * Conforms to the "Simple Boot Flag Specification", Version 2.1
567 *
568 ******************************************************************************/
569
570typedef struct acpi_table_boot
571{
572 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
573 UINT8 CmosIndex; /* Index in CMOS RAM for the boot register */
574 UINT8 Reserved[3];
575
577
578
579/*******************************************************************************
580 *
581 * CDAT - Coherent Device Attribute Table
582 * Version 1
583 *
584 * Conforms to the "Coherent Device Attribute Table (CDAT) Specification
585 " (Revision 1.01, October 2020.)
586 *
587 ******************************************************************************/
588
589typedef struct acpi_table_cdat
590{
591 UINT32 Length; /* Length of table in bytes, including this header */
592 UINT8 Revision; /* ACPI Specification minor version number */
593 UINT8 Checksum; /* To make sum of entire table == 0 */
594 UINT8 Reserved[6];
595 UINT32 Sequence; /* Used to detect runtime CDAT table changes */
596
598
599
600/* CDAT common subtable header */
601
602typedef struct acpi_cdat_header
603{
604 UINT8 Type;
605 UINT8 Reserved;
606 UINT16 Length;
607
609
610/* Values for Type field above */
611
612enum AcpiCdatType
613{
614 ACPI_CDAT_TYPE_DSMAS = 0,
615 ACPI_CDAT_TYPE_DSLBIS = 1,
616 ACPI_CDAT_TYPE_DSMSCIS = 2,
617 ACPI_CDAT_TYPE_DSIS = 3,
618 ACPI_CDAT_TYPE_DSEMTS = 4,
619 ACPI_CDAT_TYPE_SSLBIS = 5,
620 ACPI_CDAT_TYPE_RESERVED = 6 /* 6 through 0xFF are reserved */
621};
622
623
624/* Subtable 0: Device Scoped Memory Affinity Structure (DSMAS) */
625
626typedef struct acpi_cdat_dsmas
627{
628 UINT8 DsmadHandle;
629 UINT8 Flags;
630 UINT16 Reserved;
631 UINT64 DpaBaseAddress;
632 UINT64 DpaLength;
633
635
636/* Flags for subtable above */
637
638#define ACPI_CDAT_DSMAS_NON_VOLATILE (1 << 2)
639
640
641/* Subtable 1: Device scoped Latency and Bandwidth Information Structure (DSLBIS) */
642
643typedef struct acpi_cdat_dslbis
644{
645 UINT8 Handle;
646 UINT8 Flags; /* If Handle matches a DSMAS handle, the definition of this field matches
647 * Flags field in HMAT System Locality Latency */
648 UINT8 DataType;
649 UINT8 Reserved;
650 UINT64 EntryBaseUnit;
651 UINT16 Entry[3];
652 UINT16 Reserved2;
653
655
656
657/* Subtable 2: Device Scoped Memory Side Cache Information Structure (DSMSCIS) */
658
659typedef struct acpi_cdat_dsmscis
660{
661 UINT8 DsmasHandle;
662 UINT8 Reserved[3];
663 UINT64 SideCacheSize;
664 UINT32 CacheAttributes;
665
667
668
669/* Subtable 3: Device Scoped Initiator Structure (DSIS) */
670
671typedef struct acpi_cdat_dsis
672{
673 UINT8 Flags;
674 UINT8 Handle;
675 UINT16 Reserved;
676
678
679/* Flags for above subtable */
680
681#define ACPI_CDAT_DSIS_MEM_ATTACHED (1 << 0)
682
683
684/* Subtable 4: Device Scoped EFI Memory Type Structure (DSEMTS) */
685
686typedef struct acpi_cdat_dsemts
687{
688 UINT8 DsmasHandle;
689 UINT8 MemoryType;
690 UINT16 Reserved;
691 UINT64 DpaOffset;
692 UINT64 RangeLength;
693
695
696
697/* Subtable 5: Switch Scoped Latency and Bandwidth Information Structure (SSLBIS) */
698
699typedef struct acpi_cdat_sslbis
700{
701 UINT8 DataType;
702 UINT8 Reserved[3];
703 UINT64 EntryBaseUnit;
704
706
707
708/* Sub-subtable for above, SslbeEntries field */
709
710typedef struct acpi_cdat_sslbe
711{
712 UINT16 PortxId;
713 UINT16 PortyId;
714 UINT16 LatencyOrBandwidth;
715 UINT16 Reserved;
716
718
719#define ACPI_CDAT_SSLBIS_US_PORT 0x0100
720#define ACPI_CDAT_SSLBIS_ANY_PORT 0xffff
721
722/*******************************************************************************
723 *
724 * CEDT - CXL Early Discovery Table
725 * Version 1
726 *
727 * Conforms to the "CXL Early Discovery Table" (CXL 2.0, October 2020)
728 *
729 ******************************************************************************/
730
731typedef struct acpi_table_cedt
732{
733 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
734
736
737/* CEDT subtable header (Performance Record Structure) */
738
739typedef struct acpi_cedt_header
740{
741 UINT8 Type;
742 UINT8 Reserved;
743 UINT16 Length;
744
746
747/* Values for Type field above */
748
749enum AcpiCedtType
750{
751 ACPI_CEDT_TYPE_CHBS = 0,
752 ACPI_CEDT_TYPE_CFMWS = 1,
753 ACPI_CEDT_TYPE_CXIMS = 2,
754 ACPI_CEDT_TYPE_RDPAS = 3,
755 ACPI_CEDT_TYPE_RESERVED = 4,
756};
757
758/* Values for version field above */
759
760#define ACPI_CEDT_CHBS_VERSION_CXL11 (0)
761#define ACPI_CEDT_CHBS_VERSION_CXL20 (1)
762
763/* Values for length field above */
764
765#define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000)
766#define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x10000)
767
768/*
769 * CEDT subtables
770 */
771
772/* 0: CXL Host Bridge Structure */
773
774typedef struct acpi_cedt_chbs
775{
776 ACPI_CEDT_HEADER Header;
777 UINT32 Uid;
778 UINT32 CxlVersion;
779 UINT32 Reserved;
780 UINT64 Base;
781 UINT64 Length;
782
784
785
786/* 1: CXL Fixed Memory Window Structure */
787
788typedef struct acpi_cedt_cfmws
789{
790 ACPI_CEDT_HEADER Header;
791 UINT32 Reserved1;
792 UINT64 BaseHpa;
793 UINT64 WindowSize;
794 UINT8 InterleaveWays;
795 UINT8 InterleaveArithmetic;
796 UINT16 Reserved2;
797 UINT32 Granularity;
798 UINT16 Restrictions;
799 UINT16 QtgId;
800 UINT32 InterleaveTargets[];
801
803
805{
806 UINT32 InterleaveTarget;
807
809
810/* Values for Interleave Arithmetic field above */
811
812#define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0)
813#define ACPI_CEDT_CFMWS_ARITHMETIC_XOR (1)
814
815/* Values for Restrictions field above */
816
817#define ACPI_CEDT_CFMWS_RESTRICT_TYPE2 (1)
818#define ACPI_CEDT_CFMWS_RESTRICT_TYPE3 (1<<1)
819#define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE (1<<2)
820#define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1<<3)
821#define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1<<4)
822
823/* 2: CXL XOR Interleave Math Structure */
824
825typedef struct acpi_cedt_cxims {
826 ACPI_CEDT_HEADER Header;
827 UINT16 Reserved1;
828 UINT8 Hbig;
829 UINT8 NrXormaps;
830 UINT64 XormapList[];
832
834{
835 UINT64 Xormap;
836
838
839
840/* 3: CXL RCEC Downstream Port Association Structure */
841
843 ACPI_CEDT_HEADER Header;
844 UINT16 Segment;
845 UINT16 Bdf;
846 UINT8 Protocol;
847 UINT64 Address;
848};
849
850/* Masks for bdf field above */
851#define ACPI_CEDT_RDPAS_BUS_MASK 0xff00
852#define ACPI_CEDT_RDPAS_DEVICE_MASK 0x00f8
853#define ACPI_CEDT_RDPAS_FUNCTION_MASK 0x0007
854
855#define ACPI_CEDT_RDPAS_PROTOCOL_IO (0)
856#define ACPI_CEDT_RDPAS_PROTOCOL_CACHEMEM (1)
857
858/*******************************************************************************
859 *
860 * CPEP - Corrected Platform Error Polling table (ACPI 4.0)
861 * Version 1
862 *
863 ******************************************************************************/
864
865typedef struct acpi_table_cpep
866{
867 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
868 UINT64 Reserved;
869
871
872
873/* Subtable */
874
875typedef struct acpi_cpep_polling
876{
878 UINT8 Id; /* Processor ID */
879 UINT8 Eid; /* Processor EID */
880 UINT32 Interval; /* Polling interval (msec) */
881
883
884
885/*******************************************************************************
886 *
887 * CSRT - Core System Resource Table
888 * Version 0
889 *
890 * Conforms to the "Core System Resource Table (CSRT)", November 14, 2011
891 *
892 ******************************************************************************/
893
894typedef struct acpi_table_csrt
895{
896 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
897
899
900
901/* Resource Group subtable */
902
903typedef struct acpi_csrt_group
904{
905 UINT32 Length;
906 UINT32 VendorId;
907 UINT32 SubvendorId;
908 UINT16 DeviceId;
909 UINT16 SubdeviceId;
910 UINT16 Revision;
911 UINT16 Reserved;
912 UINT32 SharedInfoLength;
913
914 /* Shared data immediately follows (Length = SharedInfoLength) */
915
917
918/* Shared Info subtable */
919
921{
922 UINT16 MajorVersion;
923 UINT16 MinorVersion;
924 UINT32 MmioBaseLow;
925 UINT32 MmioBaseHigh;
926 UINT32 GsiInterrupt;
927 UINT8 InterruptPolarity;
928 UINT8 InterruptMode;
929 UINT8 NumChannels;
930 UINT8 DmaAddressWidth;
931 UINT16 BaseRequestLine;
932 UINT16 NumHandshakeSignals;
933 UINT32 MaxBlockSize;
934
935 /* Resource descriptors immediately follow (Length = Group Length - SharedInfoLength) */
936
938
939/* Resource Descriptor subtable */
940
942{
943 UINT32 Length;
944 UINT16 Type;
945 UINT16 Subtype;
946 UINT32 Uid;
947
948 /* Resource-specific information immediately follows */
949
951
952
953/* Resource Types */
954
955#define ACPI_CSRT_TYPE_INTERRUPT 0x0001
956#define ACPI_CSRT_TYPE_TIMER 0x0002
957#define ACPI_CSRT_TYPE_DMA 0x0003
958
959/* Resource Subtypes */
960
961#define ACPI_CSRT_XRUPT_LINE 0x0000
962#define ACPI_CSRT_XRUPT_CONTROLLER 0x0001
963#define ACPI_CSRT_TIMER 0x0000
964#define ACPI_CSRT_DMA_CHANNEL 0x0000
965#define ACPI_CSRT_DMA_CONTROLLER 0x0001
966
967
968/*******************************************************************************
969 *
970 * DBG2 - Debug Port Table 2
971 * Version 0 (Both main table and subtables)
972 *
973 * Conforms to "Microsoft Debug Port Table 2 (DBG2)", September 21, 2020
974 *
975 ******************************************************************************/
976
977typedef struct acpi_table_dbg2
978{
979 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
980 UINT32 InfoOffset;
981 UINT32 InfoCount;
982
984
985
986typedef struct acpi_dbg2_header
987{
988 UINT32 InfoOffset;
989 UINT32 InfoCount;
990
992
993
994/* Debug Device Information Subtable */
995
996typedef struct acpi_dbg2_device
997{
998 UINT8 Revision;
999 UINT16 Length;
1000 UINT8 RegisterCount; /* Number of BaseAddress registers */
1001 UINT16 NamepathLength;
1002 UINT16 NamepathOffset;
1003 UINT16 OemDataLength;
1004 UINT16 OemDataOffset;
1005 UINT16 PortType;
1006 UINT16 PortSubtype;
1007 UINT16 Reserved;
1008 UINT16 BaseAddressOffset;
1009 UINT16 AddressSizeOffset;
1010 /*
1011 * Data that follows:
1012 * BaseAddress (required) - Each in 12-byte Generic Address Structure format.
1013 * AddressSize (required) - Array of UINT32 sizes corresponding to each BaseAddress register.
1014 * Namepath (required) - Null terminated string. Single dot if not supported.
1015 * OemData (optional) - Length is OemDataLength.
1016 */
1018
1019/* Types for PortType field above */
1020
1021#define ACPI_DBG2_SERIAL_PORT 0x8000
1022#define ACPI_DBG2_1394_PORT 0x8001
1023#define ACPI_DBG2_USB_PORT 0x8002
1024#define ACPI_DBG2_NET_PORT 0x8003
1025
1026/* Subtypes for PortSubtype field above */
1027
1028#define ACPI_DBG2_16550_COMPATIBLE 0x0000
1029#define ACPI_DBG2_16550_SUBSET 0x0001
1030#define ACPI_DBG2_MAX311XE_SPI 0x0002
1031#define ACPI_DBG2_ARM_PL011 0x0003
1032#define ACPI_DBG2_MSM8X60 0x0004
1033#define ACPI_DBG2_16550_NVIDIA 0x0005
1034#define ACPI_DBG2_TI_OMAP 0x0006
1035#define ACPI_DBG2_APM88XXXX 0x0008
1036#define ACPI_DBG2_MSM8974 0x0009
1037#define ACPI_DBG2_SAM5250 0x000A
1038#define ACPI_DBG2_INTEL_USIF 0x000B
1039#define ACPI_DBG2_IMX6 0x000C
1040#define ACPI_DBG2_ARM_SBSA_32BIT 0x000D
1041#define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E
1042#define ACPI_DBG2_ARM_DCC 0x000F
1043#define ACPI_DBG2_BCM2835 0x0010
1044#define ACPI_DBG2_SDM845_1_8432MHZ 0x0011
1045#define ACPI_DBG2_16550_WITH_GAS 0x0012
1046#define ACPI_DBG2_SDM845_7_372MHZ 0x0013
1047#define ACPI_DBG2_INTEL_LPSS 0x0014
1048#define ACPI_DBG2_RISCV_SBI_CON 0x0015
1049
1050#define ACPI_DBG2_1394_STANDARD 0x0000
1051
1052#define ACPI_DBG2_USB_XHCI 0x0000
1053#define ACPI_DBG2_USB_EHCI 0x0001
1054
1055
1056/*******************************************************************************
1057 *
1058 * DBGP - Debug Port table
1059 * Version 1
1060 *
1061 * Conforms to the "Debug Port Specification", Version 1.00, 2/9/2000
1062 *
1063 ******************************************************************************/
1064
1065typedef struct acpi_table_dbgp
1066{
1067 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1068 UINT8 Type; /* 0=full 16550, 1=subset of 16550 */
1069 UINT8 Reserved[3];
1070 ACPI_GENERIC_ADDRESS DebugPort;
1071
1073
1074
1075/*******************************************************************************
1076 *
1077 * DMAR - DMA Remapping table
1078 * Version 1
1079 *
1080 * Conforms to "Intel Virtualization Technology for Directed I/O",
1081 * Version 2.3, October 2014
1082 *
1083 ******************************************************************************/
1084
1085typedef struct acpi_table_dmar
1086{
1087 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1088 UINT8 Width; /* Host Address Width */
1089 UINT8 Flags;
1090 UINT8 Reserved[10];
1091
1093
1094/* Masks for Flags field above */
1095
1096#define ACPI_DMAR_INTR_REMAP (1)
1097#define ACPI_DMAR_X2APIC_OPT_OUT (1<<1)
1098#define ACPI_DMAR_X2APIC_MODE (1<<2)
1099
1100
1101/* DMAR subtable header */
1102
1103typedef struct acpi_dmar_header
1104{
1105 UINT16 Type;
1106 UINT16 Length;
1107
1109
1110/* Values for subtable type in ACPI_DMAR_HEADER */
1111
1112enum AcpiDmarType
1113{
1114 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0,
1115 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1,
1116 ACPI_DMAR_TYPE_ROOT_ATS = 2,
1117 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3,
1118 ACPI_DMAR_TYPE_NAMESPACE = 4,
1119 ACPI_DMAR_TYPE_SATC = 5,
1120 ACPI_DMAR_TYPE_RESERVED = 6 /* 6 and greater are reserved */
1121};
1122
1123
1124/* DMAR Device Scope structure */
1125
1127{
1128 UINT8 EntryType;
1129 UINT8 Length;
1130 UINT16 Reserved;
1131 UINT8 EnumerationId;
1132 UINT8 Bus;
1133
1135
1136/* Values for EntryType in ACPI_DMAR_DEVICE_SCOPE - device types */
1137
1138enum AcpiDmarScopeType
1139{
1140 ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0,
1141 ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1,
1142 ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2,
1143 ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3,
1144 ACPI_DMAR_SCOPE_TYPE_HPET = 4,
1145 ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5,
1146 ACPI_DMAR_SCOPE_TYPE_RESERVED = 6 /* 6 and greater are reserved */
1147};
1148
1150{
1151 UINT8 Device;
1152 UINT8 Function;
1153
1155
1156
1157/*
1158 * DMAR Subtables, correspond to Type in ACPI_DMAR_HEADER
1159 */
1160
1161/* 0: Hardware Unit Definition */
1162
1164{
1165 ACPI_DMAR_HEADER Header;
1166 UINT8 Flags;
1167 UINT8 Reserved;
1168 UINT16 Segment;
1169 UINT64 Address; /* Register Base Address */
1170
1172
1173/* Masks for Flags field above */
1174
1175#define ACPI_DMAR_INCLUDE_ALL (1)
1176
1177
1178/* 1: Reserved Memory Definition */
1179
1181{
1182 ACPI_DMAR_HEADER Header;
1183 UINT16 Reserved;
1184 UINT16 Segment;
1185 UINT64 BaseAddress; /* 4K aligned base address */
1186 UINT64 EndAddress; /* 4K aligned limit address */
1187
1189
1190/* Masks for Flags field above */
1191
1192#define ACPI_DMAR_ALLOW_ALL (1)
1193
1194
1195/* 2: Root Port ATS Capability Reporting Structure */
1196
1197typedef struct acpi_dmar_atsr
1198{
1199 ACPI_DMAR_HEADER Header;
1200 UINT8 Flags;
1201 UINT8 Reserved;
1202 UINT16 Segment;
1203
1205
1206/* Masks for Flags field above */
1207
1208#define ACPI_DMAR_ALL_PORTS (1)
1209
1210
1211/* 3: Remapping Hardware Static Affinity Structure */
1212
1213typedef struct acpi_dmar_rhsa
1214{
1215 ACPI_DMAR_HEADER Header;
1216 UINT32 Reserved;
1217 UINT64 BaseAddress;
1218 UINT32 ProximityDomain;
1219
1221
1222
1223/* 4: ACPI Namespace Device Declaration Structure */
1224
1225typedef struct acpi_dmar_andd
1226{
1227 ACPI_DMAR_HEADER Header;
1228 UINT8 Reserved[3];
1229 UINT8 DeviceNumber;
1230 union {
1231 char __pad;
1232 ACPI_FLEX_ARRAY(char, DeviceName);
1233 };
1234
1236
1237
1238/* 5: SoC Integrated Address Translation Cache (SATC) */
1239
1240typedef struct acpi_dmar_satc
1241{
1242 ACPI_DMAR_HEADER Header;
1243 UINT8 Flags;
1244 UINT8 Reserved;
1245 UINT16 Segment;
1246
1248
1249;
1250/*******************************************************************************
1251 *
1252 * DRTM - Dynamic Root of Trust for Measurement table
1253 * Conforms to "TCG D-RTM Architecture" June 17 2013, Version 1.0.0
1254 * Table version 1
1255 *
1256 ******************************************************************************/
1257
1258typedef struct acpi_table_drtm
1259{
1260 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1261 UINT64 EntryBaseAddress;
1262 UINT64 EntryLength;
1263 UINT32 EntryAddress32;
1264 UINT64 EntryAddress64;
1265 UINT64 ExitAddress;
1266 UINT64 LogAreaAddress;
1267 UINT32 LogAreaLength;
1268 UINT64 ArchDependentAddress;
1269 UINT32 Flags;
1270
1272
1273/* Flag Definitions for above */
1274
1275#define ACPI_DRTM_ACCESS_ALLOWED (1)
1276#define ACPI_DRTM_ENABLE_GAP_CODE (1<<1)
1277#define ACPI_DRTM_INCOMPLETE_MEASUREMENTS (1<<2)
1278#define ACPI_DRTM_AUTHORITY_ORDER (1<<3)
1279
1280
1281/* 1) Validated Tables List (64-bit addresses) */
1282
1284{
1285 UINT32 ValidatedTableCount;
1286 UINT64 ValidatedTables[];
1287
1289
1290/* 2) Resources List (of Resource Descriptors) */
1291
1292/* Resource Descriptor */
1293
1295{
1296 UINT8 Size[7];
1297 UINT8 Type;
1298 UINT64 Address;
1299
1301
1303{
1304 UINT32 ResourceCount;
1305 ACPI_DRTM_RESOURCE Resources[];
1306
1308
1309/* 3) Platform-specific Identifiers List */
1310
1311typedef struct acpi_drtm_dps_id
1312{
1313 UINT32 DpsIdLength;
1314 UINT8 DpsId[16];
1315
1317
1318
1319/*******************************************************************************
1320 *
1321 * ECDT - Embedded Controller Boot Resources Table
1322 * Version 1
1323 *
1324 ******************************************************************************/
1325
1326typedef struct acpi_table_ecdt
1327{
1328 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1329 ACPI_GENERIC_ADDRESS Control; /* Address of EC command/status register */
1330 ACPI_GENERIC_ADDRESS Data; /* Address of EC data register */
1331 UINT32 Uid; /* Unique ID - must be same as the EC _UID method */
1332 UINT8 Gpe; /* The GPE for the EC */
1333 UINT8 Id[]; /* Full namepath of the EC in the ACPI namespace */
1334
1336
1337
1338/*******************************************************************************
1339 *
1340 * EINJ - Error Injection Table (ACPI 4.0)
1341 * Version 1
1342 *
1343 ******************************************************************************/
1344
1345typedef struct acpi_table_einj
1346{
1347 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1348 UINT32 HeaderLength;
1349 UINT8 Flags;
1350 UINT8 Reserved[3];
1351 UINT32 Entries;
1352
1354
1355
1356/* EINJ Injection Instruction Entries (actions) */
1357
1358typedef struct acpi_einj_entry
1359{
1360 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */
1361
1363
1364/* Masks for Flags field above */
1365
1366#define ACPI_EINJ_PRESERVE (1)
1367
1368/* Values for Action field above */
1369
1370enum AcpiEinjActions
1371{
1372 ACPI_EINJ_BEGIN_OPERATION = 0,
1373 ACPI_EINJ_GET_TRIGGER_TABLE = 1,
1374 ACPI_EINJ_SET_ERROR_TYPE = 2,
1375 ACPI_EINJ_GET_ERROR_TYPE = 3,
1376 ACPI_EINJ_END_OPERATION = 4,
1377 ACPI_EINJ_EXECUTE_OPERATION = 5,
1378 ACPI_EINJ_CHECK_BUSY_STATUS = 6,
1379 ACPI_EINJ_GET_COMMAND_STATUS = 7,
1380 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 8,
1381 ACPI_EINJ_GET_EXECUTE_TIMINGS = 9,
1382 ACPI_EINJ_ACTION_RESERVED = 10, /* 10 and greater are reserved */
1383 ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */
1384};
1385
1386/* Values for Instruction field above */
1387
1388enum AcpiEinjInstructions
1389{
1390 ACPI_EINJ_READ_REGISTER = 0,
1391 ACPI_EINJ_READ_REGISTER_VALUE = 1,
1392 ACPI_EINJ_WRITE_REGISTER = 2,
1393 ACPI_EINJ_WRITE_REGISTER_VALUE = 3,
1394 ACPI_EINJ_NOOP = 4,
1395 ACPI_EINJ_FLUSH_CACHELINE = 5,
1396 ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */
1397};
1398
1400{
1401 UINT32 ErrorType;
1402 UINT32 VendorStructOffset;
1403 UINT32 Flags;
1404 UINT32 ApicId;
1405 UINT64 Address;
1406 UINT64 Range;
1407 UINT32 PcieId;
1408
1410
1411typedef struct acpi_einj_vendor
1412{
1413 UINT32 Length;
1414 UINT32 PcieId;
1415 UINT16 VendorId;
1416 UINT16 DeviceId;
1417 UINT8 RevisionId;
1418 UINT8 Reserved[3];
1419
1421
1422
1423/* EINJ Trigger Error Action Table */
1424
1425typedef struct acpi_einj_trigger
1426{
1427 UINT32 HeaderSize;
1428 UINT32 Revision;
1429 UINT32 TableSize;
1430 UINT32 EntryCount;
1431
1433
1434/* Command status return values */
1435
1436enum AcpiEinjCommandStatus
1437{
1438 ACPI_EINJ_SUCCESS = 0,
1439 ACPI_EINJ_FAILURE = 1,
1440 ACPI_EINJ_INVALID_ACCESS = 2,
1441 ACPI_EINJ_STATUS_RESERVED = 3 /* 3 and greater are reserved */
1442};
1443
1444
1445/* Error types returned from ACPI_EINJ_GET_ERROR_TYPE (bitfield) */
1446
1447#define ACPI_EINJ_PROCESSOR_CORRECTABLE (1)
1448#define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1)
1449#define ACPI_EINJ_PROCESSOR_FATAL (1<<2)
1450#define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3)
1451#define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4)
1452#define ACPI_EINJ_MEMORY_FATAL (1<<5)
1453#define ACPI_EINJ_PCIX_CORRECTABLE (1<<6)
1454#define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7)
1455#define ACPI_EINJ_PCIX_FATAL (1<<8)
1456#define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9)
1457#define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10)
1458#define ACPI_EINJ_PLATFORM_FATAL (1<<11)
1459#define ACPI_EINJ_CXL_CACHE_CORRECTABLE (1<<12)
1460#define ACPI_EINJ_CXL_CACHE_UNCORRECTABLE (1<<13)
1461#define ACPI_EINJ_CXL_CACHE_FATAL (1<<14)
1462#define ACPI_EINJ_CXL_MEM_CORRECTABLE (1<<15)
1463#define ACPI_EINJ_CXL_MEM_UNCORRECTABLE (1<<16)
1464#define ACPI_EINJ_CXL_MEM_FATAL (1<<17)
1465#define ACPI_EINJ_VENDOR_DEFINED (1<<31)
1466
1467
1468/*******************************************************************************
1469 *
1470 * ERST - Error Record Serialization Table (ACPI 4.0)
1471 * Version 1
1472 *
1473 ******************************************************************************/
1474
1475typedef struct acpi_table_erst
1476{
1477 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1478 UINT32 HeaderLength;
1479 UINT32 Reserved;
1480 UINT32 Entries;
1481
1483
1484
1485/* ERST Serialization Entries (actions) */
1486
1487typedef struct acpi_erst_entry
1488{
1489 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */
1490
1492
1493/* Masks for Flags field above */
1494
1495#define ACPI_ERST_PRESERVE (1)
1496
1497/* Values for Action field above */
1498
1499enum AcpiErstActions
1500{
1501 ACPI_ERST_BEGIN_WRITE = 0,
1502 ACPI_ERST_BEGIN_READ = 1,
1503 ACPI_ERST_BEGIN_CLEAR = 2,
1504 ACPI_ERST_END = 3,
1505 ACPI_ERST_SET_RECORD_OFFSET = 4,
1506 ACPI_ERST_EXECUTE_OPERATION = 5,
1507 ACPI_ERST_CHECK_BUSY_STATUS = 6,
1508 ACPI_ERST_GET_COMMAND_STATUS = 7,
1509 ACPI_ERST_GET_RECORD_ID = 8,
1510 ACPI_ERST_SET_RECORD_ID = 9,
1511 ACPI_ERST_GET_RECORD_COUNT = 10,
1512 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11,
1513 ACPI_ERST_NOT_USED = 12,
1514 ACPI_ERST_GET_ERROR_RANGE = 13,
1515 ACPI_ERST_GET_ERROR_LENGTH = 14,
1516 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15,
1517 ACPI_ERST_EXECUTE_TIMINGS = 16,
1518 ACPI_ERST_ACTION_RESERVED = 17 /* 17 and greater are reserved */
1519};
1520
1521/* Values for Instruction field above */
1522
1523enum AcpiErstInstructions
1524{
1525 ACPI_ERST_READ_REGISTER = 0,
1526 ACPI_ERST_READ_REGISTER_VALUE = 1,
1527 ACPI_ERST_WRITE_REGISTER = 2,
1528 ACPI_ERST_WRITE_REGISTER_VALUE = 3,
1529 ACPI_ERST_NOOP = 4,
1530 ACPI_ERST_LOAD_VAR1 = 5,
1531 ACPI_ERST_LOAD_VAR2 = 6,
1532 ACPI_ERST_STORE_VAR1 = 7,
1533 ACPI_ERST_ADD = 8,
1534 ACPI_ERST_SUBTRACT = 9,
1535 ACPI_ERST_ADD_VALUE = 10,
1536 ACPI_ERST_SUBTRACT_VALUE = 11,
1537 ACPI_ERST_STALL = 12,
1538 ACPI_ERST_STALL_WHILE_TRUE = 13,
1539 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14,
1540 ACPI_ERST_GOTO = 15,
1541 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16,
1542 ACPI_ERST_SET_DST_ADDRESS_BASE = 17,
1543 ACPI_ERST_MOVE_DATA = 18,
1544 ACPI_ERST_INSTRUCTION_RESERVED = 19 /* 19 and greater are reserved */
1545};
1546
1547/* Command status return values */
1548
1549enum AcpiErstCommandStatus
1550{
1551 ACPI_ERST_SUCCESS = 0,
1552 ACPI_ERST_NO_SPACE = 1,
1553 ACPI_ERST_NOT_AVAILABLE = 2,
1554 ACPI_ERST_FAILURE = 3,
1555 ACPI_ERST_RECORD_EMPTY = 4,
1556 ACPI_ERST_NOT_FOUND = 5,
1557 ACPI_ERST_STATUS_RESERVED = 6 /* 6 and greater are reserved */
1558};
1559
1560
1561/* Error Record Serialization Information */
1562
1563typedef struct acpi_erst_info
1564{
1565 UINT16 Signature; /* Should be "ER" */
1566 UINT8 Data[48];
1567
1569
1570
1571/*******************************************************************************
1572 *
1573 * FPDT - Firmware Performance Data Table (ACPI 5.0)
1574 * Version 1
1575 *
1576 ******************************************************************************/
1577
1578typedef struct acpi_table_fpdt
1579{
1580 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1581
1583
1584
1585/* FPDT subtable header (Performance Record Structure) */
1586
1587typedef struct acpi_fpdt_header
1588{
1589 UINT16 Type;
1590 UINT8 Length;
1591 UINT8 Revision;
1592
1594
1595/* Values for Type field above */
1596
1597enum AcpiFpdtType
1598{
1599 ACPI_FPDT_TYPE_BOOT = 0,
1600 ACPI_FPDT_TYPE_S3PERF = 1
1601};
1602
1603
1604/*
1605 * FPDT subtables
1606 */
1607
1608/* 0: Firmware Basic Boot Performance Record */
1609
1611{
1612 ACPI_FPDT_HEADER Header;
1613 UINT8 Reserved[4];
1614 UINT64 Address;
1615
1617
1618
1619/* 1: S3 Performance Table Pointer Record */
1620
1622{
1623 ACPI_FPDT_HEADER Header;
1624 UINT8 Reserved[4];
1625 UINT64 Address;
1626
1628
1629
1630/*
1631 * S3PT - S3 Performance Table. This table is pointed to by the
1632 * S3 Pointer Record above.
1633 */
1634typedef struct acpi_table_s3pt
1635{
1636 UINT8 Signature[4]; /* "S3PT" */
1637 UINT32 Length;
1638
1640
1641
1642/*
1643 * S3PT Subtables (Not part of the actual FPDT)
1644 */
1645
1646/* Values for Type field in S3PT header */
1647
1648enum AcpiS3ptType
1649{
1650 ACPI_S3PT_TYPE_RESUME = 0,
1651 ACPI_S3PT_TYPE_SUSPEND = 1,
1652 ACPI_FPDT_BOOT_PERFORMANCE = 2
1653};
1654
1655typedef struct acpi_s3pt_resume
1656{
1657 ACPI_FPDT_HEADER Header;
1658 UINT32 ResumeCount;
1659 UINT64 FullResume;
1660 UINT64 AverageResume;
1661
1663
1664typedef struct acpi_s3pt_suspend
1665{
1666 ACPI_FPDT_HEADER Header;
1667 UINT64 SuspendStart;
1668 UINT64 SuspendEnd;
1669
1671
1672
1673/*
1674 * FPDT Boot Performance Record (Not part of the actual FPDT)
1675 */
1676typedef struct acpi_fpdt_boot
1677{
1678 ACPI_FPDT_HEADER Header;
1679 UINT8 Reserved[4];
1680 UINT64 ResetEnd;
1681 UINT64 LoadStart;
1682 UINT64 StartupStart;
1683 UINT64 ExitServicesEntry;
1684 UINT64 ExitServicesExit;
1685
1687
1688
1689/*******************************************************************************
1690 *
1691 * GTDT - Generic Timer Description Table (ACPI 5.1)
1692 * Version 2
1693 *
1694 ******************************************************************************/
1695
1696typedef struct acpi_table_gtdt
1697{
1698 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1699 UINT64 CounterBlockAddresss;
1700 UINT32 Reserved;
1701 UINT32 SecureEl1Interrupt;
1702 UINT32 SecureEl1Flags;
1703 UINT32 NonSecureEl1Interrupt;
1704 UINT32 NonSecureEl1Flags;
1705 UINT32 VirtualTimerInterrupt;
1706 UINT32 VirtualTimerFlags;
1707 UINT32 NonSecureEl2Interrupt;
1708 UINT32 NonSecureEl2Flags;
1709 UINT64 CounterReadBlockAddress;
1710 UINT32 PlatformTimerCount;
1711 UINT32 PlatformTimerOffset;
1712
1714
1715/* Flag Definitions: Timer Block Physical Timers and Virtual timers */
1716
1717#define ACPI_GTDT_INTERRUPT_MODE (1)
1718#define ACPI_GTDT_INTERRUPT_POLARITY (1<<1)
1719#define ACPI_GTDT_ALWAYS_ON (1<<2)
1720
1721typedef struct acpi_gtdt_el2
1722{
1723 UINT32 VirtualEL2TimerGsiv;
1724 UINT32 VirtualEL2TimerFlags;
1726
1727
1728/* Common GTDT subtable header */
1729
1730typedef struct acpi_gtdt_header
1731{
1732 UINT8 Type;
1733 UINT16 Length;
1734
1736
1737/* Values for GTDT subtable type above */
1738
1739enum AcpiGtdtType
1740{
1741 ACPI_GTDT_TYPE_TIMER_BLOCK = 0,
1742 ACPI_GTDT_TYPE_WATCHDOG = 1,
1743 ACPI_GTDT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
1744};
1745
1746
1747/* GTDT Subtables, correspond to Type in acpi_gtdt_header */
1748
1749/* 0: Generic Timer Block */
1750
1752{
1753 ACPI_GTDT_HEADER Header;
1754 UINT8 Reserved;
1755 UINT64 BlockAddress;
1756 UINT32 TimerCount;
1757 UINT32 TimerOffset;
1758
1760
1761/* Timer Sub-Structure, one per timer */
1762
1764{
1765 UINT8 FrameNumber;
1766 UINT8 Reserved[3];
1767 UINT64 BaseAddress;
1768 UINT64 El0BaseAddress;
1769 UINT32 TimerInterrupt;
1770 UINT32 TimerFlags;
1771 UINT32 VirtualTimerInterrupt;
1772 UINT32 VirtualTimerFlags;
1773 UINT32 CommonFlags;
1774
1776
1777/* Flag Definitions: TimerFlags and VirtualTimerFlags above */
1778
1779#define ACPI_GTDT_GT_IRQ_MODE (1)
1780#define ACPI_GTDT_GT_IRQ_POLARITY (1<<1)
1781
1782/* Flag Definitions: CommonFlags above */
1783
1784#define ACPI_GTDT_GT_IS_SECURE_TIMER (1)
1785#define ACPI_GTDT_GT_ALWAYS_ON (1<<1)
1786
1787
1788/* 1: SBSA Generic Watchdog Structure */
1789
1791{
1792 ACPI_GTDT_HEADER Header;
1793 UINT8 Reserved;
1794 UINT64 RefreshFrameAddress;
1795 UINT64 ControlFrameAddress;
1796 UINT32 TimerInterrupt;
1797 UINT32 TimerFlags;
1798
1800
1801/* Flag Definitions: TimerFlags above */
1802
1803#define ACPI_GTDT_WATCHDOG_IRQ_MODE (1)
1804#define ACPI_GTDT_WATCHDOG_IRQ_POLARITY (1<<1)
1805#define ACPI_GTDT_WATCHDOG_SECURE (1<<2)
1806
1807
1808/*******************************************************************************
1809 *
1810 * HEST - Hardware Error Source Table (ACPI 4.0)
1811 * Version 1
1812 *
1813 ******************************************************************************/
1814
1815typedef struct acpi_table_hest
1816{
1817 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1818 UINT32 ErrorSourceCount;
1819
1821
1822
1823/* HEST subtable header */
1824
1825typedef struct acpi_hest_header
1826{
1827 UINT16 Type;
1828 UINT16 SourceId;
1829
1831
1832
1833/* Values for Type field above for subtables */
1834
1835enum AcpiHestTypes
1836{
1837 ACPI_HEST_TYPE_IA32_CHECK = 0,
1838 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1,
1839 ACPI_HEST_TYPE_IA32_NMI = 2,
1840 ACPI_HEST_TYPE_NOT_USED3 = 3,
1841 ACPI_HEST_TYPE_NOT_USED4 = 4,
1842 ACPI_HEST_TYPE_NOT_USED5 = 5,
1843 ACPI_HEST_TYPE_AER_ROOT_PORT = 6,
1844 ACPI_HEST_TYPE_AER_ENDPOINT = 7,
1845 ACPI_HEST_TYPE_AER_BRIDGE = 8,
1846 ACPI_HEST_TYPE_GENERIC_ERROR = 9,
1847 ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10,
1848 ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11,
1849 ACPI_HEST_TYPE_RESERVED = 12 /* 12 and greater are reserved */
1850};
1851
1852
1853/*
1854 * HEST substructures contained in subtables
1855 */
1856
1857/*
1858 * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and
1859 * ACPI_HEST_IA_CORRECTED structures.
1860 */
1862{
1863 UINT8 BankNumber;
1864 UINT8 ClearStatusOnInit;
1865 UINT8 StatusFormat;
1866 UINT8 Reserved;
1867 UINT32 ControlRegister;
1868 UINT64 ControlData;
1869 UINT32 StatusRegister;
1870 UINT32 AddressRegister;
1871 UINT32 MiscRegister;
1872
1874
1875
1876/* Common HEST sub-structure for PCI/AER structures below (6,7,8) */
1877
1879{
1880 UINT16 Reserved1;
1881 UINT8 Flags;
1882 UINT8 Enabled;
1883 UINT32 RecordsToPreallocate;
1884 UINT32 MaxSectionsPerRecord;
1885 UINT32 Bus; /* Bus and Segment numbers */
1886 UINT16 Device;
1887 UINT16 Function;
1888 UINT16 DeviceControl;
1889 UINT16 Reserved2;
1890 UINT32 UncorrectableMask;
1891 UINT32 UncorrectableSeverity;
1892 UINT32 CorrectableMask;
1893 UINT32 AdvancedCapabilities;
1894
1896
1897/* Masks for HEST Flags fields */
1898
1899#define ACPI_HEST_FIRMWARE_FIRST (1)
1900#define ACPI_HEST_GLOBAL (1<<1)
1901#define ACPI_HEST_GHES_ASSIST (1<<2)
1902
1903/*
1904 * Macros to access the bus/segment numbers in Bus field above:
1905 * Bus number is encoded in bits 7:0
1906 * Segment number is encoded in bits 23:8
1907 */
1908#define ACPI_HEST_BUS(Bus) ((Bus) & 0xFF)
1909#define ACPI_HEST_SEGMENT(Bus) (((Bus) >> 8) & 0xFFFF)
1910
1911
1912/* Hardware Error Notification */
1913
1914typedef struct acpi_hest_notify
1915{
1916 UINT8 Type;
1917 UINT8 Length;
1918 UINT16 ConfigWriteEnable;
1919 UINT32 PollInterval;
1920 UINT32 Vector;
1921 UINT32 PollingThresholdValue;
1922 UINT32 PollingThresholdWindow;
1923 UINT32 ErrorThresholdValue;
1924 UINT32 ErrorThresholdWindow;
1925
1927
1928/* Values for Notify Type field above */
1929
1930enum AcpiHestNotifyTypes
1931{
1932 ACPI_HEST_NOTIFY_POLLED = 0,
1933 ACPI_HEST_NOTIFY_EXTERNAL = 1,
1934 ACPI_HEST_NOTIFY_LOCAL = 2,
1935 ACPI_HEST_NOTIFY_SCI = 3,
1936 ACPI_HEST_NOTIFY_NMI = 4,
1937 ACPI_HEST_NOTIFY_CMCI = 5, /* ACPI 5.0 */
1938 ACPI_HEST_NOTIFY_MCE = 6, /* ACPI 5.0 */
1939 ACPI_HEST_NOTIFY_GPIO = 7, /* ACPI 6.0 */
1940 ACPI_HEST_NOTIFY_SEA = 8, /* ACPI 6.1 */
1941 ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1 */
1942 ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1 */
1943 ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11, /* ACPI 6.2 */
1944 ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */
1945};
1946
1947/* Values for ConfigWriteEnable bitfield above */
1948
1949#define ACPI_HEST_TYPE (1)
1950#define ACPI_HEST_POLL_INTERVAL (1<<1)
1951#define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2)
1952#define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3)
1953#define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4)
1954#define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5)
1955
1956
1957/*
1958 * HEST subtables
1959 */
1960
1961/* 0: IA32 Machine Check Exception */
1962
1964{
1965 ACPI_HEST_HEADER Header;
1966 UINT16 Reserved1;
1967 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */
1968 UINT8 Enabled;
1969 UINT32 RecordsToPreallocate;
1970 UINT32 MaxSectionsPerRecord;
1971 UINT64 GlobalCapabilityData;
1972 UINT64 GlobalControlData;
1973 UINT8 NumHardwareBanks;
1974 UINT8 Reserved3[7];
1975
1977
1978
1979/* 1: IA32 Corrected Machine Check */
1980
1982{
1983 ACPI_HEST_HEADER Header;
1984 UINT16 Reserved1;
1985 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */
1986 UINT8 Enabled;
1987 UINT32 RecordsToPreallocate;
1988 UINT32 MaxSectionsPerRecord;
1989 ACPI_HEST_NOTIFY Notify;
1990 UINT8 NumHardwareBanks;
1991 UINT8 Reserved2[3];
1992
1994
1995
1996/* 2: IA32 Non-Maskable Interrupt */
1997
1998typedef struct acpi_hest_ia_nmi
1999{
2000 ACPI_HEST_HEADER Header;
2001 UINT32 Reserved;
2002 UINT32 RecordsToPreallocate;
2003 UINT32 MaxSectionsPerRecord;
2004 UINT32 MaxRawDataLength;
2005
2007
2008
2009/* 3,4,5: Not used */
2010
2011/* 6: PCI Express Root Port AER */
2012
2014{
2015 ACPI_HEST_HEADER Header;
2017 UINT32 RootErrorCommand;
2018
2020
2021
2022/* 7: PCI Express AER (AER Endpoint) */
2023
2024typedef struct acpi_hest_aer
2025{
2026 ACPI_HEST_HEADER Header;
2028
2030
2031
2032/* 8: PCI Express/PCI-X Bridge AER */
2033
2035{
2036 ACPI_HEST_HEADER Header;
2038 UINT32 UncorrectableMask2;
2039 UINT32 UncorrectableSeverity2;
2040 UINT32 AdvancedCapabilities2;
2041
2043
2044
2045/* 9: Generic Hardware Error Source */
2046
2047typedef struct acpi_hest_generic
2048{
2049 ACPI_HEST_HEADER Header;
2050 UINT16 RelatedSourceId;
2051 UINT8 Reserved;
2052 UINT8 Enabled;
2053 UINT32 RecordsToPreallocate;
2054 UINT32 MaxSectionsPerRecord;
2055 UINT32 MaxRawDataLength;
2056 ACPI_GENERIC_ADDRESS ErrorStatusAddress;
2057 ACPI_HEST_NOTIFY Notify;
2058 UINT32 ErrorBlockLength;
2059
2061
2062
2063/* 10: Generic Hardware Error Source, version 2 */
2064
2066{
2067 ACPI_HEST_HEADER Header;
2068 UINT16 RelatedSourceId;
2069 UINT8 Reserved;
2070 UINT8 Enabled;
2071 UINT32 RecordsToPreallocate;
2072 UINT32 MaxSectionsPerRecord;
2073 UINT32 MaxRawDataLength;
2074 ACPI_GENERIC_ADDRESS ErrorStatusAddress;
2075 ACPI_HEST_NOTIFY Notify;
2076 UINT32 ErrorBlockLength;
2077 ACPI_GENERIC_ADDRESS ReadAckRegister;
2078 UINT64 ReadAckPreserve;
2079 UINT64 ReadAckWrite;
2080
2082
2083
2084/* Generic Error Status block */
2085
2087{
2088 UINT32 BlockStatus;
2089 UINT32 RawDataOffset;
2090 UINT32 RawDataLength;
2091 UINT32 DataLength;
2092 UINT32 ErrorSeverity;
2093
2095
2096/* Values for BlockStatus flags above */
2097
2098#define ACPI_HEST_UNCORRECTABLE (1)
2099#define ACPI_HEST_CORRECTABLE (1<<1)
2100#define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2)
2101#define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3)
2102#define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */
2103
2104
2105/* Generic Error Data entry */
2106
2108{
2109 UINT8 SectionType[16];
2110 UINT32 ErrorSeverity;
2111 UINT16 Revision;
2112 UINT8 ValidationBits;
2113 UINT8 Flags;
2114 UINT32 ErrorDataLength;
2115 UINT8 FruId[16];
2116 UINT8 FruText[20];
2117
2119
2120/* Extension for revision 0x0300 */
2121
2123{
2124 UINT8 SectionType[16];
2125 UINT32 ErrorSeverity;
2126 UINT16 Revision;
2127 UINT8 ValidationBits;
2128 UINT8 Flags;
2129 UINT32 ErrorDataLength;
2130 UINT8 FruId[16];
2131 UINT8 FruText[20];
2132 UINT64 TimeStamp;
2133
2135
2136/* Values for ErrorSeverity above */
2137
2138#define ACPI_HEST_GEN_ERROR_RECOVERABLE 0
2139#define ACPI_HEST_GEN_ERROR_FATAL 1
2140#define ACPI_HEST_GEN_ERROR_CORRECTED 2
2141#define ACPI_HEST_GEN_ERROR_NONE 3
2142
2143/* Flags for ValidationBits above */
2144
2145#define ACPI_HEST_GEN_VALID_FRU_ID (1)
2146#define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1)
2147#define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2)
2148
2149
2150/* 11: IA32 Deferred Machine Check Exception (ACPI 6.2) */
2151
2153{
2154 ACPI_HEST_HEADER Header;
2155 UINT16 Reserved1;
2156 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */
2157 UINT8 Enabled;
2158 UINT32 RecordsToPreallocate;
2159 UINT32 MaxSectionsPerRecord;
2160 ACPI_HEST_NOTIFY Notify;
2161 UINT8 NumHardwareBanks;
2162 UINT8 Reserved2[3];
2163
2165
2166
2167/*******************************************************************************
2168 *
2169 * HMAT - Heterogeneous Memory Attributes Table (ACPI 6.3)
2170 *
2171 ******************************************************************************/
2172
2173typedef struct acpi_table_hmat
2174{
2175 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
2176 UINT32 Reserved;
2177
2179
2180
2181/* Values for HMAT structure types */
2182
2183enum AcpiHmatType
2184{
2185 ACPI_HMAT_TYPE_ADDRESS_RANGE = 0, /* Memory subsystem address range */
2186 ACPI_HMAT_TYPE_LOCALITY = 1, /* System locality latency and bandwidth information */
2187 ACPI_HMAT_TYPE_CACHE = 2, /* Memory side cache information */
2188 ACPI_HMAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */
2189};
2190
2192{
2193 UINT16 Type;
2194 UINT16 Reserved;
2195 UINT32 Length;
2196
2198
2199
2200/*
2201 * HMAT Structures, correspond to Type in ACPI_HMAT_STRUCTURE
2202 */
2203
2204/* 0: Memory proximity domain attributes */
2205
2207{
2208 ACPI_HMAT_STRUCTURE Header;
2209 UINT16 Flags;
2210 UINT16 Reserved1;
2211 UINT32 InitiatorPD; /* Attached Initiator proximity domain */
2212 UINT32 MemoryPD; /* Memory proximity domain */
2213 UINT32 Reserved2;
2214 UINT64 Reserved3;
2215 UINT64 Reserved4;
2216
2218
2219/* Masks for Flags field above */
2220
2221#define ACPI_HMAT_INITIATOR_PD_VALID (1) /* 1: InitiatorPD field is valid */
2222
2223
2224/* 1: System locality latency and bandwidth information */
2225
2227{
2228 ACPI_HMAT_STRUCTURE Header;
2229 UINT8 Flags;
2230 UINT8 DataType;
2231 UINT8 MinTransferSize;
2232 UINT8 Reserved1;
2233 UINT32 NumberOfInitiatorPDs;
2234 UINT32 NumberOfTargetPDs;
2235 UINT32 Reserved2;
2236 UINT64 EntryBaseUnit;
2237
2239
2240/* Masks for Flags field above */
2241
2242#define ACPI_HMAT_MEMORY_HIERARCHY (0x0F) /* Bits 0-3 */
2243
2244/* Values for Memory Hierarchy flags */
2245
2246#define ACPI_HMAT_MEMORY 0
2247#define ACPI_HMAT_1ST_LEVEL_CACHE 1
2248#define ACPI_HMAT_2ND_LEVEL_CACHE 2
2249#define ACPI_HMAT_3RD_LEVEL_CACHE 3
2250#define ACPI_HMAT_MINIMUM_XFER_SIZE 0x10 /* Bit 4: ACPI 6.4 */
2251#define ACPI_HMAT_NON_SEQUENTIAL_XFERS 0x20 /* Bit 5: ACPI 6.4 */
2252
2253
2254/* Values for DataType field above */
2255
2256#define ACPI_HMAT_ACCESS_LATENCY 0
2257#define ACPI_HMAT_READ_LATENCY 1
2258#define ACPI_HMAT_WRITE_LATENCY 2
2259#define ACPI_HMAT_ACCESS_BANDWIDTH 3
2260#define ACPI_HMAT_READ_BANDWIDTH 4
2261#define ACPI_HMAT_WRITE_BANDWIDTH 5
2262
2263
2264/* 2: Memory side cache information */
2265
2266typedef struct acpi_hmat_cache
2267{
2268 ACPI_HMAT_STRUCTURE Header;
2269 UINT32 MemoryPD;
2270 UINT32 Reserved1;
2271 UINT64 CacheSize;
2272 UINT32 CacheAttributes;
2273 UINT16 Reserved2;
2274 UINT16 NumberOfSMBIOSHandles;
2275
2277
2278/* Masks for CacheAttributes field above */
2279
2280#define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F)
2281#define ACPI_HMAT_CACHE_LEVEL (0x000000F0)
2282#define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00)
2283#define ACPI_HMAT_WRITE_POLICY (0x0000F000)
2284#define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000)
2285
2286/* Values for cache associativity flag */
2287
2288#define ACPI_HMAT_CA_NONE (0)
2289#define ACPI_HMAT_CA_DIRECT_MAPPED (1)
2290#define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2)
2291
2292/* Values for write policy flag */
2293
2294#define ACPI_HMAT_CP_NONE (0)
2295#define ACPI_HMAT_CP_WB (1)
2296#define ACPI_HMAT_CP_WT (2)
2297
2298
2299/*******************************************************************************
2300 *
2301 * HPET - High Precision Event Timer table
2302 * Version 1
2303 *
2304 * Conforms to "IA-PC HPET (High Precision Event Timers) Specification",
2305 * Version 1.0a, October 2004
2306 *
2307 ******************************************************************************/
2308
2309typedef struct acpi_table_hpet
2310{
2311 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
2312 UINT32 Id; /* Hardware ID of event timer block */
2313 ACPI_GENERIC_ADDRESS Address; /* Address of event timer block */
2314 UINT8 Sequence; /* HPET sequence number */
2315 UINT16 MinimumTick; /* Main counter min tick, periodic mode */
2316 UINT8 Flags;
2317
2319
2320/* Masks for Flags field above */
2321
2322#define ACPI_HPET_PAGE_PROTECT_MASK (3)
2323
2324/* Values for Page Protect flags */
2325
2326enum AcpiHpetPageProtect
2327{
2328 ACPI_HPET_NO_PAGE_PROTECT = 0,
2329 ACPI_HPET_PAGE_PROTECT4 = 1,
2330 ACPI_HPET_PAGE_PROTECT64 = 2
2331};
2332
2333
2334/*******************************************************************************
2335 *
2336 * IBFT - Boot Firmware Table
2337 * Version 1
2338 *
2339 * Conforms to "iSCSI Boot Firmware Table (iBFT) as Defined in ACPI 3.0b
2340 * Specification", Version 1.01, March 1, 2007
2341 *
2342 * Note: It appears that this table is not intended to appear in the RSDT/XSDT.
2343 * Therefore, it is not currently supported by the disassembler.
2344 *
2345 ******************************************************************************/
2346
2347typedef struct acpi_table_ibft
2348{
2349 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
2350 UINT8 Reserved[12];
2351
2353
2354
2355/* IBFT common subtable header */
2356
2357typedef struct acpi_ibft_header
2358{
2359 UINT8 Type;
2360 UINT8 Version;
2361 UINT16 Length;
2362 UINT8 Index;
2363 UINT8 Flags;
2364
2366
2367/* Values for Type field above */
2368
2369enum AcpiIbftType
2370{
2371 ACPI_IBFT_TYPE_NOT_USED = 0,
2372 ACPI_IBFT_TYPE_CONTROL = 1,
2373 ACPI_IBFT_TYPE_INITIATOR = 2,
2374 ACPI_IBFT_TYPE_NIC = 3,
2375 ACPI_IBFT_TYPE_TARGET = 4,
2376 ACPI_IBFT_TYPE_EXTENSIONS = 5,
2377 ACPI_IBFT_TYPE_RESERVED = 6 /* 6 and greater are reserved */
2378};
2379
2380
2381/* IBFT subtables */
2382
2383typedef struct acpi_ibft_control
2384{
2385 ACPI_IBFT_HEADER Header;
2386 UINT16 Extensions;
2387 UINT16 InitiatorOffset;
2388 UINT16 Nic0Offset;
2389 UINT16 Target0Offset;
2390 UINT16 Nic1Offset;
2391 UINT16 Target1Offset;
2392
2394
2396{
2397 ACPI_IBFT_HEADER Header;
2398 UINT8 SnsServer[16];
2399 UINT8 SlpServer[16];
2400 UINT8 PrimaryServer[16];
2401 UINT8 SecondaryServer[16];
2402 UINT16 NameLength;
2403 UINT16 NameOffset;
2404
2406
2407typedef struct acpi_ibft_nic
2408{
2409 ACPI_IBFT_HEADER Header;
2410 UINT8 IpAddress[16];
2411 UINT8 SubnetMaskPrefix;
2412 UINT8 Origin;
2413 UINT8 Gateway[16];
2414 UINT8 PrimaryDns[16];
2415 UINT8 SecondaryDns[16];
2416 UINT8 Dhcp[16];
2417 UINT16 Vlan;
2418 UINT8 MacAddress[6];
2419 UINT16 PciAddress;
2420 UINT16 NameLength;
2421 UINT16 NameOffset;
2422
2424
2425typedef struct acpi_ibft_target
2426{
2427 ACPI_IBFT_HEADER Header;
2428 UINT8 TargetIpAddress[16];
2429 UINT16 TargetIpSocket;
2430 UINT8 TargetBootLun[8];
2431 UINT8 ChapType;
2432 UINT8 NicAssociation;
2433 UINT16 TargetNameLength;
2434 UINT16 TargetNameOffset;
2435 UINT16 ChapNameLength;
2436 UINT16 ChapNameOffset;
2437 UINT16 ChapSecretLength;
2438 UINT16 ChapSecretOffset;
2439 UINT16 ReverseChapNameLength;
2440 UINT16 ReverseChapNameOffset;
2441 UINT16 ReverseChapSecretLength;
2442 UINT16 ReverseChapSecretOffset;
2443
2445
2446
2447/* Reset to default packing */
2448
2449#pragma pack()
2450
2451#endif /* __ACTBL1_H__ */
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