RTEMS
6.1-rc4
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bsps
m68k
include
mcf548x
MCD_dma.h
1
/*
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* File: MCD_dma.h
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* Purpose: Main header file for multi-channel DMA API.
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*
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* Notes:
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*/
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#ifndef _MCD_API_H
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#define _MCD_API_H
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/*
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* Turn Execution Unit tasks ON (#define) or OFF (#undef)
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*/
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#define MCD_INCLUDE_EU
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/*
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* Number of DMA channels
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*/
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#define NCHANNELS 16
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/*
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* Total number of variants
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*/
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#ifdef MCD_INCLUDE_EU
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#define NUMOFVARIANTS 6
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#else
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#define NUMOFVARIANTS 4
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#endif
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/*
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* Define sizes of the various tables
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*/
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#define TASK_TABLE_SIZE (NCHANNELS*32)
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#define VAR_TAB_SIZE (128)
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#define CONTEXT_SAVE_SIZE (128)
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#define FUNCDESC_TAB_SIZE (256)
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#ifdef MCD_INCLUDE_EU
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#define FUNCDESC_TAB_NUM 16
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#else
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#define FUNCDESC_TAB_NUM 1
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#endif
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#ifndef DEFINESONLY
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46
/*
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* Portability typedefs
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*/
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typedef
int
s32;
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typedef
unsigned
int
u32;
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typedef
short
s16;
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typedef
unsigned
short
u16;
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typedef
char
s8;
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typedef
unsigned
char
u8;
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/*
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* These structures represent the internal registers of the
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* multi-channel DMA
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*/
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struct
dmaRegs_s
{
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u32 taskbar;
/* task table base address register */
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u32 currPtr;
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u32 endPtr;
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u32 varTablePtr;
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u16 dma_rsvd0;
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u16 ptdControl;
/* ptd control */
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u32 intPending;
/* interrupt pending register */
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u32 intMask;
/* interrupt mask register */
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u16 taskControl[16];
/* task control registers */
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u8 priority[32];
/* priority registers */
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u32 initiatorMux;
/* initiator mux control */
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u32 taskSize0;
/* task size control register 0. */
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u32 taskSize1;
/* task size control register 1. */
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u32 dma_rsvd1;
/* reserved */
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u32 dma_rsvd2;
/* reserved */
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u32 debugComp1;
/* debug comparator 1 */
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u32 debugComp2;
/* debug comparator 2 */
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u32 debugControl;
/* debug control */
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u32 debugStatus;
/* debug status */
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u32 ptdDebug;
/* priority task decode debug */
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u32 dma_rsvd3[31];
/* reserved */
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};
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typedef
volatile
struct
dmaRegs_s
dmaRegs
;
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#endif
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/*
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* PTD contrl reg bits
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*/
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#define PTD_CTL_TSK_PRI 0x8000
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#define PTD_CTL_COMM_PREFETCH 0x0001
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/*
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* Task Control reg bits and field masks
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*/
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#define TASK_CTL_EN 0x8000
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#define TASK_CTL_VALID 0x4000
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#define TASK_CTL_ALWAYS 0x2000
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#define TASK_CTL_INIT_MASK 0x1f00
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#define TASK_CTL_ASTRT 0x0080
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#define TASK_CTL_HIPRITSKEN 0x0040
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#define TASK_CTL_HLDINITNUM 0x0020
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#define TASK_CTL_ASTSKNUM_MASK 0x000f
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/*
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* Priority reg bits and field masks
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*/
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#define PRIORITY_HLD 0x80
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#define PRIORITY_PRI_MASK 0x07
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/*
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* Debug Control reg bits and field masks
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*/
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#define DBG_CTL_BLOCK_TASKS_MASK 0xffff0000
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#define DBG_CTL_AUTO_ARM 0x00008000
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#define DBG_CTL_BREAK 0x00004000
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#define DBG_CTL_COMP1_TYP_MASK 0x00003800
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#define DBG_CTL_COMP2_TYP_MASK 0x00000070
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#define DBG_CTL_EXT_BREAK 0x00000004
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#define DBG_CTL_INT_BREAK 0x00000002
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/*
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* PTD Debug reg selector addresses
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* This reg must be written with a value to show the contents of
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* one of the desired internal register.
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*/
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#define PTD_DBG_REQ 0x00
/* shows the state of 31 initiators */
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#define PTD_DBG_TSK_VLD_INIT 0x01
/* shows which 16 tasks are valid and
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have initiators asserted */
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/*
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* General return values
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*/
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#define MCD_OK 0
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#define MCD_ERROR -1
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#define MCD_TABLE_UNALIGNED -2
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#define MCD_CHANNEL_INVALID -3
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/*
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* MCD_initDma input flags
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*/
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#define MCD_RELOC_TASKS 0x00000001
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#define MCD_NO_RELOC_TASKS 0x00000000
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#define MCD_COMM_PREFETCH_EN 0x00000002
/* Commbus Prefetching - MCF547x/548x ONLY */
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/*
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* MCD_dmaStatus Status Values for each channel
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*/
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#define MCD_NO_DMA 1
/* No DMA has been requested since reset */
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#define MCD_IDLE 2
/* DMA active, but the initiator is currently inactive */
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#define MCD_RUNNING 3
/* DMA active, and the initiator is currently active */
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#define MCD_PAUSED 4
/* DMA active but it is currently paused */
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#define MCD_HALTED 5
/* the most recent DMA has been killed with MCD_killTask() */
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#define MCD_DONE 6
/* the most recent DMA has completed. */
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/*
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* MCD_startDma parameter defines
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*/
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/*
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* Constants for the funcDesc parameter
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*/
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/* Byte swapping: */
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#define MCD_NO_BYTE_SWAP 0x00045670
/* to disable byte swapping. */
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#define MCD_BYTE_REVERSE 0x00076540
/* to reverse the bytes of each u32 of the DMAed data. */
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#define MCD_U16_REVERSE 0x00067450
/* to reverse the 16-bit halves of
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each 32-bit data value being DMAed.*/
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#define MCD_U16_BYTE_REVERSE 0x00054760
/* to reverse the byte halves of each
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16-bit half of each 32-bit data value DMAed */
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#define MCD_NO_BIT_REV 0x00000000
/* do not reverse the bits of each byte DMAed. */
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#define MCD_BIT_REV 0x00088880
/* reverse the bits of each byte DMAed */
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/* CRCing: */
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#define MCD_CRC16 0xc0100000
/* to perform CRC-16 on DMAed data. */
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#define MCD_CRCCCITT 0xc0200000
/* to perform CRC-CCITT on DMAed data. */
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#define MCD_CRC32 0xc0300000
/* to perform CRC-32 on DMAed data. */
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#define MCD_CSUMINET 0xc0400000
/* to perform internet checksums on DMAed data.*/
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#define MCD_NO_CSUM 0xa0000000
/* to perform no checksumming. */
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#define MCD_FUNC_NOEU1 (MCD_NO_BYTE_SWAP | MCD_NO_BIT_REV | MCD_NO_CSUM)
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#define MCD_FUNC_NOEU2 (MCD_NO_BYTE_SWAP | MCD_NO_CSUM)
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/*
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* Constants for the flags parameter
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*/
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#define MCD_TT_FLAGS_RL 0x00000001
/* Read line */
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#define MCD_TT_FLAGS_CW 0x00000002
/* Combine Writes */
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#define MCD_TT_FLAGS_SP 0x00000004
/* Speculative prefetch(XLB) MCF547x/548x ONLY */
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#define MCD_TT_FLAGS_MASK 0x000000ff
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#define MCD_TT_FLAGS_DEF (MCD_TT_FLAGS_RL | MCD_TT_FLAGS_CW)
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#define MCD_SINGLE_DMA 0x00000100
/* Unchained DMA */
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#define MCD_CHAIN_DMA
/* TBD */
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#define MCD_EU_DMA
/* TBD */
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#define MCD_FECTX_DMA 0x00001000
/* FEC TX ring DMA */
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#define MCD_FECRX_DMA 0x00002000
/* FEC RX ring DMA */
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/* these flags are valid for MCD_startDma and the chained buffer descriptors */
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#define MCD_BUF_READY 0x80000000
/* indicates that this buffer is now under the DMA's control */
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#define MCD_WRAP 0x20000000
/* to tell the FEC Dmas to wrap to the first BD */
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#define MCD_INTERRUPT 0x10000000
/* to generate an interrupt after completion of the DMA. */
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#define MCD_END_FRAME 0x08000000
/* tell the DMA to end the frame when transferring
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last byte of data in buffer */
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#define MCD_CRC_RESTART 0x40000000
/* to empty out the accumulated checksum
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prior to performing the DMA. */
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/* Defines for the FEC buffer descriptor control/status word*/
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#define MCD_FEC_BUF_READY 0x8000
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#define MCD_FEC_WRAP 0x2000
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#define MCD_FEC_INTERRUPT 0x1000
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#define MCD_FEC_END_FRAME 0x0800
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/*
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* Defines for general intuitiveness
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*/
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#define MCD_TRUE 1
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#define MCD_FALSE 0
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/*
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* Three different cases for destination and source.
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*/
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#define MINUS1 -1
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#define ZERO 0
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#define PLUS1 1
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#ifndef DEFINESONLY
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/* Task Table Entry struct*/
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typedef
struct
{
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u32 TDTstart;
/* task descriptor table start */
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u32 TDTend;
/* task descriptor table end */
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u32 varTab;
/* variable table start */
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u32 FDTandFlags;
/* function descriptor table start and flags */
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volatile
u32 descAddrAndStatus;
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volatile
u32 modifiedVarTab;
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u32 contextSaveSpace;
/* context save space start */
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u32 literalBases;
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}
TaskTableEntry
;
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/* Chained buffer descriptor */
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typedef
volatile
struct
MCD_bufDesc_struct
MCD_bufDesc
;
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struct
MCD_bufDesc_struct
{
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u32 flags;
/* flags describing the DMA */
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u32 csumResult;
/* checksum from checksumming performed since last checksum reset */
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s8 *srcAddr;
/* the address to move data from */
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s8 *destAddr;
/* the address to move data to */
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s8 *lastDestAddr;
/* the last address written to */
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u32 dmaSize;
/* the number of bytes to transfer independent of the transfer size */
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MCD_bufDesc
*next;
/* next buffer descriptor in chain */
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u32 info;
/* private information about this descriptor; DMA does not affect it */
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};
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/* Progress Query struct */
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typedef
volatile
struct
MCD_XferProg_struct
{
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s8 *lastSrcAddr;
/* the most-recent or last, post-increment source address */
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s8 *lastDestAddr;
/* the most-recent or last, post-increment destination address */
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u32 dmaSize;
/* the amount of data transferred for the current buffer */
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MCD_bufDesc
*currBufDesc;
/* pointer to the current buffer descriptor being DMAed */
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}
MCD_XferProg
;
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/* FEC buffer descriptor */
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typedef
volatile
struct
MCD_bufDescFec_struct
{
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u16 statCtrl;
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u16 length;
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u32 dataPointer;
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}
MCD_bufDescFec
;
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/*************************************************************************/
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/*
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* API function Prototypes - see MCD_dmaApi.c for further notes
278
*/
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/*
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* MCD_startDma starts a particular kind of DMA .
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*/
283
int
MCD_startDma (
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int
channel,
/* the channel on which to run the DMA */
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s8 *srcAddr,
/* the address to move data from, or buffer-descriptor address */
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s16 srcIncr,
/* the amount to increment the source address per transfer */
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s8 *destAddr,
/* the address to move data to */
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s16 destIncr,
/* the amount to increment the destination address per transfer */
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u32 dmaSize,
/* the number of bytes to transfer independent of the transfer size */
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u32 xferSize,
/* the number bytes in of each data movement (1, 2, or 4) */
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u32 initiator,
/* what device initiates the DMA */
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int
priority,
/* priority of the DMA */
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u32 flags,
/* flags describing the DMA */
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u32 funcDesc
/* a description of byte swapping, bit swapping, and CRC actions */
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);
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/*
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* MCD_initDma() initializes the DMA API by setting up a pointer to the DMA
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* registers, relocating and creating the appropriate task structures, and
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* setting up some global settings
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*/
302
int
MCD_initDma (
dmaRegs
*sDmaBarAddr,
void
*taskTableDest, u32 flags);
303
304
/*
305
* MCD_dmaStatus() returns the status of the DMA on the requested channel.
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*/
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int
MCD_dmaStatus (
int
channel);
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/*
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* MCD_XferProgrQuery() returns progress of DMA on requested channel
311
*/
312
int
MCD_XferProgrQuery (
int
channel,
MCD_XferProg
*progRep);
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/*
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* MCD_killDma() halts the DMA on the requested channel, without any
316
* intention of resuming the DMA.
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*/
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int
MCD_killDma (
int
channel);
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/*
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* MCD_continDma() continues a DMA which as stopped due to encountering an
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* unready buffer descriptor.
323
*/
324
int
MCD_continDma (
int
channel);
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/*
327
* MCD_pauseDma() pauses the DMA on the given channel ( if any DMA is
328
* running on that channel).
329
*/
330
int
MCD_pauseDma (
int
channel);
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/*
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* MCD_resumeDma() resumes the DMA on a given channel (if any DMA is
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* running on that channel).
335
*/
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int
MCD_resumeDma (
int
channel);
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/*
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* MCD_csumQuery provides the checksum/CRC after performing a non-chained DMA
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*/
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int
MCD_csumQuery (
int
channel, u32 *csum);
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/*
344
* MCD_getCodeSize provides the packed size required by the microcoded task
345
* and structures.
346
*/
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int
MCD_getCodeSize(
void
);
348
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/*
350
* MCD_getVersion provides a pointer to a version string and returns a
351
* version number.
352
*/
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int
MCD_getVersion(
char
**longVersion);
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/* macro for setting a location in the variable table */
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#define MCD_SET_VAR(taskTab,idx,value) ((u32 *)(taskTab)->varTab)[idx] = value
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/* Note that MCD_SET_VAR() is invoked many times in firing up a DMA function,
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so I'm avoiding surrounding it with "do {} while(0)" */
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360
#endif
/* DEFINESONLY */
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362
#endif
/* _MCD_API_H */
MCD_XferProg_struct
Definition:
MCD_dma.h:254
MCD_bufDescFec_struct
Definition:
MCD_dma.h:263
MCD_bufDesc_struct
Definition:
MCD_dma.h:242
TaskTableEntry
Definition:
MCD_dma.h:228
dmaRegs_s
Definition:
MCD_dma.h:60
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