RTEMS 6.1-rc2
Loading...
Searching...
No Matches
fatal.h
Go to the documentation of this file.
1/* SPDX-License-Identifier: BSD-2-Clause */
2
11/*
12 * Copyright (C) 2012, 2022 embedded brains GmbH & Co. KG
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 * POSSIBILITY OF SUCH DAMAGE.
34 */
35
36#ifndef LIBBSP_SHARED_BSP_FATAL_H
37#define LIBBSP_SHARED_BSP_FATAL_H
38
39#include <rtems.h>
40
41#ifdef __cplusplus
42extern "C" {
43#endif /* __cplusplus */
44
55#define BSP_FATAL_CODE_BLOCK(idx) ((unsigned long) (idx) * 256UL)
56
60typedef enum {
61 /* Generic BSP fatal codes */
62 BSP_FATAL_INTERRUPT_INITIALIZATION = BSP_FATAL_CODE_BLOCK(0),
63 BSP_FATAL_SPURIOUS_INTERRUPT,
64 BSP_FATAL_CONSOLE_MULTI_INIT,
65 BSP_FATAL_CONSOLE_NO_MEMORY_0,
66 BSP_FATAL_CONSOLE_NO_MEMORY_1,
67 BSP_FATAL_CONSOLE_NO_MEMORY_2,
68 BSP_FATAL_CONSOLE_NO_MEMORY_3,
69 BSP_FATAL_CONSOLE_REGISTER_DEV_0,
70 BSP_FATAL_CONSOLE_REGISTER_DEV_1,
71 BSP_FATAL_CONSOLE_NO_DEV,
72 BSP_FATAL_CONSOLE_INSTALL_0,
73 BSP_FATAL_CONSOLE_INSTALL_1,
74 BSP_FATAL_CONSOLE_REGISTER_DEV_2,
75 BSP_FATAL_MMU_ADDRESS_INVALID,
76 BSP_FATAL_HEAP_EXTEND_ERROR,
77
78 /* ARM fatal codes */
79 BSP_ARM_A9MPCORE_FATAL_CLOCK_IRQ_INSTALL = BSP_FATAL_CODE_BLOCK(1),
80 BSP_ARM_A9MPCORE_FATAL_CLOCK_IRQ_REMOVE,
81 BSP_ARM_PL111_FATAL_REGISTER_DEV,
82 BSP_ARM_PL111_FATAL_SEM_CREATE,
83 BSP_ARM_PL111_FATAL_SEM_RELEASE,
84 BSP_ARM_A9MPCORE_FATAL_CLOCK_SMP_INIT,
85 BSP_ARM_ARMV7M_CPU_COUNTER_INIT,
86 BSP_ARM_FATAL_GENERIC_TIMER_CLOCK_IRQ_INSTALL,
87
88 /* LEON3 fatal codes */
89 LEON3_FATAL_NO_IRQMP_CONTROLLER = BSP_FATAL_CODE_BLOCK(2),
90 LEON3_FATAL_CONSOLE_REGISTER_DEV,
91 LEON3_FATAL_CLOCK_INITIALIZATION,
92 LEON3_FATAL_INVALID_CACHE_CONFIG_BOOT_PROCESSOR,
93 LEON3_FATAL_INVALID_CACHE_CONFIG_SECONDARY_PROCESSOR,
94
95 /* LPC24XX fatal codes */
96 LPC24XX_FATAL_PL111_SET_UP = BSP_FATAL_CODE_BLOCK(3),
97 LPC24XX_FATAL_PL111_PINS_SET_UP,
98 LPC24XX_FATAL_PL111_PINS_TEAR_DOWN,
99 LPC24XX_FATAL_PL111_TEAR_DOWN,
100
101 /* MPC5200 fatal codes */
102 MPC5200_FATAL_PCF8563_INVALID_YEAR = BSP_FATAL_CODE_BLOCK(4),
103 MPC5200_FATAL_SLICETIMER_0_IRQ_INSTALL,
104 MPC5200_FATAL_SLICETIMER_1_IRQ_INSTALL,
105 MPC5200_FATAL_TM27_IRQ_INSTALL,
106 MPC5200_FATAL_MSCAN_A_INIT,
107 MPC5200_FATAL_MSCAN_B_INIT,
108 MPC5200_FATAL_MSCAN_A_SET_MODE,
109 MPC5200_FATAL_MSCAN_B_SET_MODE,
110 MPC5200_FATAL_ATA_DISK_IO_INIT,
111 MPC5200_FATAL_ATA_DISK_CREATE,
112 MPC5200_FATAL_ATA_DMA_SINGLE_IRQ_INSTALL,
113 MPC5200_FATAL_ATA_LOCK_CREATE,
114 MPC5200_FATAL_ATA_LOCK_DESTROY,
115
116 /* MPC55XX fatal codes */
117 MPC55XX_FATAL_FMPLL_LOCK = BSP_FATAL_CODE_BLOCK(5),
118 MPC55XX_FATAL_CLOCK_EMIOS_IRQ_INSTALL,
119 MPC55XX_FATAL_CLOCK_EMIOS_PRESCALER,
120 MPC55XX_FATAL_CLOCK_EMIOS_INTERVAL,
121 MPC55XX_FATAL_CLOCK_PIT_IRQ_INSTALL,
122 MPC55XX_FATAL_CONSOLE_GENERIC_COUNT,
123 MPC55XX_FATAL_CONSOLE_GENERIC_REGISTER,
124 MPC55XX_FATAL_CONSOLE_GENERIC_REGISTER_CONSOLE,
125 MPC55XX_FATAL_CONSOLE_ESCI_BAUD,
126 MPC55XX_FATAL_CONSOLE_ESCI_ATTRIBUTES,
127 MPC55XX_FATAL_CONSOLE_ESCI_IRQ_INSTALL,
128 MPC55XX_FATAL_CONSOLE_LINFLEX_BAUD,
129 MPC55XX_FATAL_CONSOLE_LINFLEX_ATTRIBUTES,
130 MPC55XX_FATAL_CONSOLE_LINFLEX_RX_IRQ_INSTALL,
131 MPC55XX_FATAL_CONSOLE_LINFLEX_TX_IRQ_INSTALL,
132 MPC55XX_FATAL_CONSOLE_LINFLEX_ERR_IRQ_INSTALL,
133 MPC55XX_FATAL_CONSOLE_LINFLEX_RX_IRQ_REMOVE,
134 MPC55XX_FATAL_CONSOLE_LINFLEX_TX_IRQ_REMOVE,
135 MPC55XX_FATAL_CONSOLE_LINFLEX_ERR_IRQ_REMOVE,
136 MPC55XX_FATAL_EDMA_IRQ_INSTALL,
137 MPC55XX_FATAL_EDMA_IRQ_REMOVE,
138
139 /* MRM332 fatal codes */
140 MRM332_FATAL_SPURIOUS_INTERRUPT = BSP_FATAL_CODE_BLOCK(6),
141
142 /* PowerPC fatal codes */
143 PPC_FATAL_EXCEPTION_INITIALIZATION = BSP_FATAL_CODE_BLOCK(7),
144
145 /* Libchip fatal codes */
146 DWMAC_FATAL_TOO_MANY_RBUFS_CONFIGURED = BSP_FATAL_CODE_BLOCK(8),
147
148 /* ARM fatal codes */
149 ARM_FATAL_L2C_310_UNEXPECTED_ID = BSP_FATAL_CODE_BLOCK(9),
150 ARM_FATAL_L2C_310_UNEXPECTED_NUM_WAYS,
151 ARM_FATAL_L2C_310_EXCLUSIVE_CONFIG,
152
153 /* QorIQ fatal codes */
154 QORIQ_FATAL_SMP_IPI_HANDLER_INSTALL = BSP_FATAL_CODE_BLOCK(10),
155 QORIQ_FATAL_FDT_NO_BUS_FREQUENCY,
156 QORIQ_FATAL_FDT_NO_CLOCK_FREQUENCY,
157 QORIQ_FATAL_FDT_NO_TIMEBASE_FREQUENCY,
158 QORIQ_FATAL_RESTART_FAILED,
159 QORIQ_FATAL_RESTART_INSTALL_INTERRUPT,
160 QORIQ_FATAL_RESTART_INTERRUPT_FAILED,
161
162 /* ATSAM fatal codes */
163 ATSAM_FATAL_XDMA_IRQ_INSTALL = BSP_FATAL_CODE_BLOCK(11),
164 ATSAM_FATAL_PIO_IRQ_A,
165 ATSAM_FATAL_PIO_IRQ_B,
166 ATSAM_FATAL_PIO_IRQ_C,
167 ATSAM_FATAL_PIO_IRQ_D,
168 ATSAM_FATAL_PIO_IRQ_E,
169 ATSAM_FATAL_PIO_CONFIGURE_IT,
170
171 /* i.MX fatal codes */
172 IMX_FATAL_GENERIC_TIMER_FREQUENCY = BSP_FATAL_CODE_BLOCK(12),
173 IMX_FATAL_GPIO_UNEXPECTED_FDT,
174
175 /* RISC-V fatal codes */
176 RISCV_FATAL_NO_TIMEBASE_FREQUENCY_IN_DEVICE_TREE = BSP_FATAL_CODE_BLOCK(13),
177 RISCV_FATAL_NO_NS16550_REG_IN_DEVICE_TREE,
178 RISCV_FATAL_NO_NS16550_CLOCK_FREQUENCY_IN_DEVICE_TREE,
179 RISCV_FATAL_UNEXPECTED_INTERRUPT_EXCEPTION,
180 RISCV_FATAL_CLOCK_IRQ_INSTALL,
181 RISCV_FATAL_NO_CLINT_REG_IN_DEVICE_TREE,
182 RISCV_FATAL_INVALID_HART_REG_IN_DEVICE_TREE,
183 RISCV_FATAL_INVALID_CLINT_IRQS_EXTENDED_IN_DEVICE_TREE,
184 RISCV_FATAL_NO_PLIC_REG_IN_DEVICE_TREE,
185 RISCV_FATAL_INVALID_PLIC_NDEV_IN_DEVICE_TREE,
186 RISCV_FATAL_TOO_LARGE_PLIC_NDEV_IN_DEVICE_TREE,
187 RISCV_FATAL_UNUSED_0,
188 RISCV_FATAL_NO_NS16550_INTERRUPTS_IN_DEVICE_TREE,
189 RISCV_FATAL_NO_TLCLOCK_FREQUENCY_IN_DEVICE_TREE,
190 RISCV_FATAL_CLOCK_SMP_INIT,
191 RISCV_FATAL_NO_APBUART_REG_IN_DEVICE_TREE,
192 RISCV_FATAL_NO_APBUART_INTERRUPTS_IN_DEVICE_TREE,
193 RISCV_FATAL_NO_APBUART_CLOCK_FREQUENCY_IN_DEVICE_TREE,
194
195 /* GRLIB fatal codes */
196 GRLIB_FATAL_CLOCK_NO_IRQMP_TIMESTAMP_SUPPORT = BSP_FATAL_CODE_BLOCK(14),
197
198 /* i.MXRT fatal codes */
199 IMXRT_FATAL_NO_CONSOLE = BSP_FATAL_CODE_BLOCK(15),
200 IMXRT_FATAL_LPUART_INVALID_FDT,
201 IMXRT_FATAL_LPUART_ALLOC_FAILED,
202 IMXRT_FATAL_LPUART_INSTALL_FAILED,
203 IMXRT_FATAL_LPSPI_INVALID_FDT,
204 IMXRT_FATAL_LPSPI_ALLOC_FAILED,
205 IMXRT_FATAL_LPSPI_HW_INIT_FAILED,
206 IMXRT_FATAL_LPSPI_REGISTER_FAILED,
207 IMXRT_FATAL_LPI2C_INVALID_FDT,
208 IMXRT_FATAL_LPI2C_ALLOC_FAILED,
209 IMXRT_FATAL_LPI2C_HW_INIT_FAILED,
210 IMXRT_FATAL_LPI2C_REGISTER_FAILED,
211 IMXRT_FATAL_LPI2C_UNSUPPORTED_HARDWARE,
212
213 /* MicroBlaze fatal codes */
214 MICROBLAZE_FATAL_CLOCK_IRQ_INSTALL = BSP_FATAL_CODE_BLOCK(16),
216
217RTEMS_NO_RETURN static inline void
218bsp_fatal( bsp_fatal_code code )
219{
221}
222
225#ifdef __cplusplus
226}
227#endif /* __cplusplus */
228
229#endif /* LIBBSP_SHARED_BSP_FATAL_H */
#define RTEMS_NO_RETURN
Tells the compiler in a function declaration that this function does not return.
Definition: basedefs.h:386
Internal_errors_t rtems_fatal_code
This integer type represents system termination codes.
Definition: extension.h:161
bsp_fatal_code
BSP fatal error codes.
Definition: fatal.h:60
@ RTEMS_FATAL_SOURCE_BSP
Fatal source for BSP errors.
Definition: interr.h:110
This header file defines the RTEMS Classic API.
Definition: inftrees.h:24