35#ifndef _RTEMS_SCORE_CPU_H
36#define _RTEMS_SCORE_CPU_H
43#include <rtems/score/cpu_asm.h>
44#include <rtems/score/x86_64.h>
46#define CPU_SIMPLE_VECTORED_INTERRUPTS FALSE
47#define CPU_ISR_PASSES_FRAME_POINTER FALSE
48#define CPU_HARDWARE_FP FALSE
49#define CPU_SOFTWARE_FP FALSE
50#define CPU_ALL_TASKS_ARE_FP FALSE
51#define CPU_IDLE_TASK_IS_FP FALSE
52#define CPU_USE_DEFERRED_FP_SWITCH FALSE
53#define CPU_ENABLE_ROBUST_THREAD_DISPATCH FALSE
54#define CPU_STACK_GROWS_UP FALSE
56#define CPU_STRUCTURE_ALIGNMENT RTEMS_ALIGNED(64)
57#define CPU_CACHE_LINE_BYTES 64
58#define CPU_MODES_INTERRUPT_MASK 0x00000001
59#define CPU_MAXIMUM_PROCESSORS 32
61#define CPU_EFLAGS_INTERRUPTS_ON 0x00003202
62#define CPU_EFLAGS_INTERRUPTS_OFF 0x00003002
84 volatile bool is_executing;
88#define _CPU_Context_Get_SP( _context ) \
130#define CPU_INTERRUPT_FRAME_SIZE 72
139 CPU_INTERRUPT_FRAME_SIZE
143#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
144#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
145#define CPU_STACK_MINIMUM_SIZE (1024*4)
146#define CPU_SIZEOF_POINTER 8
147#define CPU_ALIGNMENT 16
148#define CPU_HEAP_ALIGNMENT CPU_ALIGNMENT
149#define CPU_STACK_ALIGNMENT 16
150#define CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES
158#define _CPU_ISR_Enable(_level) \
160 amd64_enable_interrupts(); \
165#define _CPU_ISR_Disable(_level) \
167 amd64_enable_interrupts(); \
172#define _CPU_ISR_Flash(_level) \
174 amd64_enable_interrupts(); \
175 amd64_disable_interrupts(); \
180static inline bool _CPU_ISR_Is_enabled(uint32_t level)
182 return (level & EFLAGS_INTR_ENABLE) != 0;
188 amd64_disable_interrupts();
191 amd64_enable_interrupts();
199 __asm__
volatile (
"pushf; \
204 uint32_t level = (rflags & EFLAGS_INTR_ENABLE) ? 0 : 1;
211#define _CPU_Context_Destroy( _the_thread, _the_context ) \
215void _CPU_Context_Initialize(
217 void *stack_area_begin,
218 size_t stack_area_size,
220 void (*entry_point)(
void ),
225#define _CPU_Context_Restart_self( _the_context ) \
226 _CPU_Context_restore( (_the_context) );
228#define _CPU_Context_Initialize_fp( _destination ) \
230 *(*(_destination)) = _CPU_Null_fp_context; \
235#define CPU_USE_LIBC_INIT_FINI_ARRAY FALSE
239#define CPU_USE_GENERIC_BITFIELD_CODE TRUE
241#if (CPU_USE_GENERIC_BITFIELD_CODE == FALSE)
242#define _CPU_Bitfield_Find_first_bit( _value, _output ) \
250#if (CPU_USE_GENERIC_BITFIELD_CODE == FALSE)
251#define _CPU_Priority_Mask( _bit_number ) \
252 ( 1 << (_bit_number) )
255#if (CPU_USE_GENERIC_BITFIELD_CODE == FALSE)
256#define _CPU_Priority_bits_index( _priority ) \
276 uint32_t processor_state_register;
277 uint32_t integer_registers [1];
278 double float_registers [1];
283static inline uint32_t CPU_swap_u32(
287 uint32_t byte1, byte2, byte3, byte4, swapped;
289 byte4 = (value >> 24) & 0xff;
290 byte3 = (value >> 16) & 0xff;
291 byte2 = (value >> 8) & 0xff;
292 byte1 = value & 0xff;
294 swapped = (byte1 << 24) | (byte2 << 16) | (byte3 << 8) | byte4;
298#define CPU_swap_u16( value ) \
299 (((value&0xff) << 8) | ((value >> 8)&0xff))
301typedef uint32_t CPU_Counter_ticks;
309 uint32_t _CPU_SMP_Initialize(
void );
311 bool _CPU_SMP_Start_processor( uint32_t cpu_index );
313 void _CPU_SMP_Finalize_initialization( uint32_t cpu_count );
315 void _CPU_SMP_Prepare_start_multitasking(
void );
317 static inline uint32_t _CPU_SMP_Get_current_processor(
void )
322 void _CPU_SMP_Send_interrupt( uint32_t target_processor_index );
324 static inline bool _CPU_Context_Get_is_executing(
330 static inline void _CPU_Context_Set_is_executing(
This header file provides basic definitions used by the API and the implementation.
#define RTEMS_STATIC_ASSERT(_cond, _msg)
It is defined if a static analysis run is performed.
Definition: basedefs.h:841
#define RTEMS_NO_RETURN
Tells the compiler in a function declaration that this function does not return.
Definition: basedefs.h:386
uint32_t _CPU_ISR_Get_level(void)
Returns the interrupt level of the executing thread.
Definition: cpu.c:165
void * _CPU_Thread_Idle_body(uintptr_t ignored)
Definition: idle-mcf5272.c:39
void _CPU_Initialize(void)
CPU initialization.
Definition: cpu.c:45
uintptr_t CPU_Uint32ptr
Definition: cpu.h:557
void _CPU_Exception_frame_print(const CPU_Exception_frame *frame)
Prints the exception frame via printk().
Definition: vectorexceptions.c:64
uint32_t _CPU_Counter_frequency(void)
Gets the current CPU counter frequency in Hz.
Definition: system-clocks.c:125
void _CPU_Context_switch(Context_Control *run, Context_Control *heir)
CPU switch context.
Definition: cpu_asm.c:110
CPU_Counter_ticks _CPU_Counter_read(void)
Gets the current CPU counter value.
Definition: system-clocks.c:130
#define _CPU_ISR_Set_level(_new_level)
Definition: cpu.h:378
rtems_termios_device_context * context
Definition: console-config.c:62
The set of registers that specifies the complete processor state.
Definition: cpu.h:446
Interrupt stack frame (ISF).
Definition: cpuimpl.h:66
uint64_t rax
Definition: cpu.h:103
Thread register context.
Definition: cpu.h:169
uint64_t rbx
Definition: cpu.h:73