RTEMS 6.1-rc2
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irq.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
11/*
12 * Copyright (c) 2018 embedded brains GmbH & Co. KG
13 *
14 * Copyright (c) 2015 University of York.
15 * Hesham Almatary <hesham@alumni.york.ac.uk>
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions
19 * are met:
20 * 1. Redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer.
22 * 2. Redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 */
38
39#ifndef LIBBSP_GENERIC_RISCV_IRQ_H
40#define LIBBSP_GENERIC_RISCV_IRQ_H
41
42#ifndef ASM
43
44#include <bsp.h>
45#include <rtems/irq.h>
46#include <rtems/irq-extension.h>
48
49#define RISCV_INTERRUPT_VECTOR_SOFTWARE 0
50
51#define RISCV_INTERRUPT_VECTOR_TIMER 1
52
53#define RISCV_INTERRUPT_VECTOR_EXTERNAL(x) ((x) + 2)
54
55#define RISCV_INTERRUPT_VECTOR_IS_EXTERNAL(x) ((x) >= 2)
56
57#define RISCV_INTERRUPT_VECTOR_EXTERNAL_TO_INDEX(x) ((x) - 2)
58
59#define BSP_INTERRUPT_VECTOR_COUNT RISCV_INTERRUPT_VECTOR_EXTERNAL(RISCV_MAXIMUM_EXTERNAL_INTERRUPTS)
60
61#define BSP_INTERRUPT_CUSTOM_VALID_VECTOR
62
63rtems_status_code bsp_interrupt_set_affinity(
65 const Processor_mask *affinity
66);
67
68rtems_status_code bsp_interrupt_get_affinity(
70 Processor_mask *affinity
71);
72
73#endif /* ASM */
74
75#endif /* LIBBSP_GENERIC_RISCV_IRQ_H */
ISR_Vector_number rtems_vector_number
This integer type represents interrupt vector numbers.
Definition: intr.h:102
rtems_status_code
This enumeration provides status codes for directives of the Classic API.
Definition: status.h:85
This header file is provided for backward compatiblility.
This header file provides the interfaces of the Processor Mask.