RTEMS 6.1-rc2
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xil_cache.h
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1/******************************************************************************
2* Copyright (c) 2014 - 2021 Xilinx, Inc. All rights reserved.
3* SPDX-License-Identifier: MIT
4******************************************************************************/
5
6/*****************************************************************************/
29#ifndef XIL_CACHE_H
30#define XIL_CACHE_H
31
32#include "xil_types.h"
33
34#ifdef __cplusplus
35extern "C" {
36#endif
37
42/************************** Constant Definitions *****************************/
43#define L1_DATA_PREFETCH_CONTROL_MASK 0xE000
44#define L1_DATA_PREFETCH_CONTROL_SHIFT 13
45
50/***************** Macros (Inline Functions) Definitions *********************/
51#define Xil_DCacheFlushRange Xil_DCacheInvalidateRange
52
53/************************** Function Prototypes ******************************/
54void Xil_DCacheEnable(void);
55void Xil_DCacheDisable(void);
56void Xil_DCacheInvalidate(void);
57void Xil_DCacheInvalidateRange(INTPTR adr, INTPTR len);
58void Xil_DCacheInvalidateLine(INTPTR adr);
59void Xil_DCacheFlush(void);
60void Xil_DCacheFlushLine(INTPTR adr);
61
62void Xil_ICacheEnable(void);
63void Xil_ICacheDisable(void);
64void Xil_ICacheInvalidate(void);
65void Xil_ICacheInvalidateRange(INTPTR adr, INTPTR len);
66void Xil_ICacheInvalidateLine(INTPTR adr);
67void Xil_ConfigureL1Prefetch(u8 num);
68#ifdef __cplusplus
69}
70#endif
71
72#endif
void Xil_ICacheInvalidate(void)
Invalidate the entire instruction cache.
Definition: xil_cache.c:627
void Xil_DCacheEnable(void)
Enable the Data cache.
Definition: xil_cache.c:90
void Xil_ICacheInvalidateLine(INTPTR adr)
Invalidate an instruction cache line. If the instruction specified by the parameter adr is cached by ...
Definition: xil_cache.c:654
void Xil_ICacheDisable(void)
Disable the instruction cache.
Definition: xil_cache.c:594
void Xil_DCacheDisable(void)
Disable the Data cache.
Definition: xil_cache.c:127
void Xil_DCacheInvalidate(void)
Invalidate the Data cache. The contents present in the cache are cleaned and invalidated.
Definition: xil_cache.c:257
void Xil_ConfigureL1Prefetch(u8 num)
Configure the maximum number of outstanding data prefetches allowed in L1 cache.
Definition: xil_cache.c:723
void Xil_ICacheEnable(void)
Enable the instruction cache.
Definition: xil_cache.c:558
void Xil_DCacheFlush(void)
Flush the Data cache.
Definition: xil_cache.c:429
void Xil_DCacheFlushLine(INTPTR adr)
Flush a Data cache line. If the byte specified by the address (adr) is cached by the Data cache,...
Definition: xil_cache.c:533
void Xil_DCacheInvalidateLine(INTPTR adr)
Invalidate a Data cache line. The cacheline is cleaned and invalidated.
Definition: xil_cache.c:364
#define Xil_ICacheInvalidateRange(Addr, Len)
Invalidate the instruction cache for the given address range. If the bytes specified by the address (...
Definition: xil_cache.h:376
#define Xil_DCacheInvalidateRange(Addr, Len)
Invalidate the Data cache for the given address range. If the bytes specified by the address (adr) ar...
Definition: xil_cache.h:313