RTEMS 6.1-rc2
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versal-uart-regs.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
12/*
13 * Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
44#ifndef LIBBSP_ARM_XILINX_VERSAL_UART_REGS_H
45#define LIBBSP_ARM_XILINX_VERSAL_UART_REGS_H
46
47#include <bsp/utility.h>
48
49#define VERSAL_UART_FIFO_DEPTH 64
50
51typedef struct versal_uart {
52 uint32_t uartdr;
53#define VERSAL_UARTDR_OE BSP_BIT32(11)
54#define VERSAL_UARTDR_BE BSP_BIT32(10)
55#define VERSAL_UARTDR_PE BSP_BIT32(9)
56#define VERSAL_UARTDR_FE BSP_BIT32(8)
57#define VERSAL_UARTDR_DATA(val) BSP_FLD32(val, 0, 7)
58#define VERSAL_UARTDR_DATA_GET(reg) BSP_FLD32GET(reg, 0, 7)
59#define VERSAL_UARTDR_DATA_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
60 uint32_t uartrsr_uartecr;
61#define VERSAL_UARTRSR_UARTECR_OE BSP_BIT32(3)
62#define VERSAL_UARTRSR_UARTECR_BE BSP_BIT32(2)
63#define VERSAL_UARTRSR_UARTECR_PE BSP_BIT32(1)
64#define VERSAL_UARTRSR_UARTECR_FE BSP_BIT32(0)
65 uint32_t reserved_08[4];
66 uint32_t uartfr;
67#define VERSAL_UARTFR_RI BSP_BIT32(8)
68#define VERSAL_UARTFR_TXFE BSP_BIT32(7)
69#define VERSAL_UARTFR_RXFF BSP_BIT32(6)
70#define VERSAL_UARTFR_TXFF BSP_BIT32(5)
71#define VERSAL_UARTFR_RXFE BSP_BIT32(4)
72#define VERSAL_UARTFR_BUSY BSP_BIT32(3)
73#define VERSAL_UARTFR_DCD BSP_BIT32(2)
74#define VERSAL_UARTFR_DSR BSP_BIT32(1)
75#define VERSAL_UARTFR_CTS BSP_BIT32(0)
76 uint32_t reserved_1c;
77 uint32_t uartilpr;
78#define VERSAL_UARTILPR_ILPDVSR(val) BSP_FLD32(val, 0, 7)
79#define VERSAL_UARTILPR_ILPDVSR_GET(reg) BSP_FLD32GET(reg, 0, 7)
80#define VERSAL_UARTILPR_ILPDVSR_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
81 uint32_t uartibrd;
82#define VERSAL_UARTIBRD_BAUD_DIVINT(val) BSP_FLD32(val, 0, 15)
83#define VERSAL_UARTIBRD_BAUD_DIVINT_GET(reg) BSP_FLD32GET(reg, 0, 15)
84#define VERSAL_UARTIBRD_BAUD_DIVINT_SET(reg, val) BSP_FLD32SET(reg, val, 0, 15)
85 uint32_t uartfbrd;
86#define VERSAL_UARTFBRD_BAUD_DIVFRAC(val) BSP_FLD32(val, 0, 5)
87#define VERSAL_UARTFBRD_BAUD_DIVFRAC_GET(reg) BSP_FLD32GET(reg, 0, 5)
88#define VERSAL_UARTFBRD_BAUD_DIVFRAC_SET(reg, val) BSP_FLD32SET(reg, val, 0, 5)
89 uint32_t uartlcr_h;
90#define VERSAL_UARTLCR_H_SPS BSP_BIT32(7)
91#define VERSAL_UARTLCR_H_WLEN(val) BSP_FLD32(val, 5, 6)
92#define VERSAL_UARTLCR_H_WLEN_GET(reg) BSP_FLD32GET(reg, 5, 6)
93#define VERSAL_UARTLCR_H_WLEN_SET(reg, val) BSP_FLD32SET(reg, val, 5, 6)
94#define VERSAL_UARTLCR_H_WLEN_5 0x00U
95#define VERSAL_UARTLCR_H_WLEN_6 0x01U
96#define VERSAL_UARTLCR_H_WLEN_7 0x02U
97#define VERSAL_UARTLCR_H_WLEN_8 0x03U
98#define VERSAL_UARTLCR_H_FEN BSP_BIT32(4)
99#define VERSAL_UARTLCR_H_STP2 BSP_BIT32(3)
100#define VERSAL_UARTLCR_H_EPS BSP_BIT32(2)
101#define VERSAL_UARTLCR_H_PEN BSP_BIT32(1)
102#define VERSAL_UARTLCR_H_BRK BSP_BIT32(0)
103 uint32_t uartcr;
104#define VERSAL_UARTCR_CTSEN BSP_BIT32(15)
105#define VERSAL_UARTCR_RTSEN BSP_BIT32(14)
106#define VERSAL_UARTCR_OUT2 BSP_BIT32(13)
107#define VERSAL_UARTCR_OUT1 BSP_BIT32(12)
108#define VERSAL_UARTCR_RTS BSP_BIT32(11)
109#define VERSAL_UARTCR_DTR BSP_BIT32(10)
110#define VERSAL_UARTCR_RXE BSP_BIT32(9)
111#define VERSAL_UARTCR_TXE BSP_BIT32(8)
112#define VERSAL_UARTCR_LBE BSP_BIT32(7)
113#define VERSAL_UARTCR_UARTEN BSP_BIT32(0)
114 uint32_t uartifls;
115#define VERSAL_UARTIFLS_RXIFLSEL(val) BSP_FLD32(val, 3, 5)
116#define VERSAL_UARTIFLS_RXIFLSEL_GET(reg) BSP_FLD32GET(reg, 3, 5)
117#define VERSAL_UARTIFLS_RXIFLSEL_SET(reg, val) BSP_FLD32SET(reg, val, 3, 5)
118#define VERSAL_UARTIFLS_TXIFLSEL(val) BSP_FLD32(val, 0, 2)
119#define VERSAL_UARTIFLS_TXIFLSEL_GET(reg) BSP_FLD32GET(reg, 0, 2)
120#define VERSAL_UARTIFLS_TXIFLSEL_SET(reg, val) BSP_FLD32SET(reg, val, 0, 2)
121 uint32_t uartimsc;
122 uint32_t uartris;
123 uint32_t uartmis;
124 uint32_t uarticr;
125#define VERSAL_UARTI_OEI BSP_BIT32(10)
126#define VERSAL_UARTI_BEI BSP_BIT32(9)
127#define VERSAL_UARTI_PEI BSP_BIT32(8)
128#define VERSAL_UARTI_FEI BSP_BIT32(7)
129#define VERSAL_UARTI_RTI BSP_BIT32(6)
130#define VERSAL_UARTI_TXI BSP_BIT32(5)
131#define VERSAL_UARTI_RXI BSP_BIT32(4)
132#define VERSAL_UARTI_DSRMI BSP_BIT32(3)
133#define VERSAL_UARTI_DCDMI BSP_BIT32(2)
134#define VERSAL_UARTI_CTSMI BSP_BIT32(1)
135#define VERSAL_UARTI_RIMI BSP_BIT32(0)
137
140#endif /* LIBBSP_ARM_XILINX_ZYNQ_UART_REGS_H */
This header file provides utility macros for BSPs.
Definition: versal-uart-regs.h:51