RTEMS 6.1-rc2
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usc.h
1/* USC constants */
2
3#ifndef _USC_H__
4#define _USC_H__
5
6
7#define USC_REG_BASE (0x1D000000 | 0xA0000000)
8
9/* Internal register addresses */
10#define SYSTEM (USC_REG_BASE + 0x73)
11
12#define INT_CFG0 (USC_REG_BASE + 0xE0)
13#define INT_CFG1 (USC_REG_BASE + 0xE4)
14#define INT_CFG2 (USC_REG_BASE + 0xE8)
15#define INT_STAT (USC_REG_BASE + 0xEC)
16
17#define WD_HBI (USC_REG_BASE + 0xF4)
18
19#define INT_CFG3 (USC_REG_BASE + 0x158)
20
21/* INT_CFGx register masks */
22#define HBI_MASK 0x00200000 /* Heartbeat timer interrupt mask */
23#define WDI_MASK 0x00400000 /* Watchdog timer interrupt mask */
24#define MODE_TOTEM_POLE 0x20000000 /* Totem Pole Output Mode */
25
26/* WD_HBI register bits */
27#define WD_EN 0x00800000 /* Watchdog enable */
28#define HBI_4000_PS 0x00200000 /* Heartbeat timer prescaler = 4000 */
29#define WD_INIT 0x10 /* Watchdog reset pattern (written to byte 2 in WD_HBI register) */
30
31
32#endif /* _USC_H__ */