20#ifndef STM32H7xx_LL_USB_H
21#define STM32H7xx_LL_USB_H
30#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
88 uint32_t dev_endpoints;
92 uint32_t Host_channels;
109 uint32_t low_power_enable;
113 uint32_t battery_charging_enable;
115 uint32_t vbus_sensing_enable;
117 uint32_t use_dedicated_ep1;
119 uint32_t use_external_vbus;
134 uint8_t is_iso_incomplete;
140 uint8_t data_pid_start;
152 uint8_t even_odd_frame;
155 uint16_t tx_fifo_num;
183 uint8_t process_ping;
212 USB_URBStateTypeDef urb_state;
215 USB_HCStateTypeDef state;
219typedef USB_ModeTypeDef USB_OTG_ModeTypeDef;
220typedef USB_CfgTypeDef USB_OTG_CfgTypeDef;
221typedef USB_EPTypeDef USB_OTG_EPTypeDef;
222typedef USB_URBStateTypeDef USB_OTG_URBStateTypeDef;
223typedef USB_HCStateTypeDef USB_OTG_HCStateTypeDef;
224typedef USB_HCTypeDef USB_OTG_HCTypeDef;
233#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
238#define USB_OTG_CORE_ID_300A 0x4F54300AU
239#define USB_OTG_CORE_ID_310A 0x4F54310AU
248#define USB_OTG_MODE_DEVICE 0U
249#define USB_OTG_MODE_HOST 1U
250#define USB_OTG_MODE_DRD 2U
259#define USB_OTG_SPEED_HIGH 0U
260#define USB_OTG_SPEED_HIGH_IN_FULL 1U
261#define USB_OTG_SPEED_FULL 3U
270#define USB_OTG_ULPI_PHY 1U
271#define USB_OTG_EMBEDDED_PHY 2U
280#ifndef USBD_HS_TRDT_VALUE
281#define USBD_HS_TRDT_VALUE 9U
283#ifndef USBD_FS_TRDT_VALUE
284#define USBD_FS_TRDT_VALUE 5U
285#define USBD_DEFAULT_TRDT_VALUE 9U
295#define USB_OTG_HS_MAX_PACKET_SIZE 512U
296#define USB_OTG_FS_MAX_PACKET_SIZE 64U
297#define USB_OTG_MAX_EP0_SIZE 64U
306#define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ (0U << 1)
307#define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ (1U << 1)
308#define DSTS_ENUMSPD_FS_PHY_48MHZ (3U << 1)
317#define DCFG_FRAME_INTERVAL_80 0U
318#define DCFG_FRAME_INTERVAL_85 1U
319#define DCFG_FRAME_INTERVAL_90 2U
320#define DCFG_FRAME_INTERVAL_95 3U
341#define EP_TYPE_CTRL 0U
342#define EP_TYPE_ISOC 1U
343#define EP_TYPE_BULK 2U
344#define EP_TYPE_INTR 3U
345#define EP_TYPE_MSK 3U
354#define EP_SPEED_LOW 0U
355#define EP_SPEED_FULL 1U
356#define EP_SPEED_HIGH 2U
365#define HC_PID_DATA0 0U
366#define HC_PID_DATA2 1U
367#define HC_PID_DATA1 2U
368#define HC_PID_SETUP 3U
377#define USBD_HS_SPEED 0U
378#define USBD_HSINFS_SPEED 1U
379#define USBH_HS_SPEED 0U
380#define USBD_FS_SPEED 2U
381#define USBH_FSLS_SPEED 1U
386#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
391#define STS_GOUT_NAK 1U
392#define STS_DATA_UPDT 2U
393#define STS_XFER_COMP 3U
394#define STS_SETUP_COMP 4U
395#define STS_SETUP_UPDT 6U
404#define HCFG_30_60_MHZ 0U
405#define HCFG_48_MHZ 1U
415#define HFIR_6_MHZ 6000U
416#define HFIR_60_MHZ 60000U
417#define HFIR_48_MHZ 48000U
426#define HPRT0_PRTSPD_HIGH_SPEED 0U
427#define HPRT0_PRTSPD_FULL_SPEED 1U
428#define HPRT0_PRTSPD_LOW_SPEED 2U
433#define HCCHAR_CTRL 0U
434#define HCCHAR_ISOC 1U
435#define HCCHAR_BULK 2U
436#define HCCHAR_INTR 3U
438#define GRXSTS_PKTSTS_IN 2U
439#define GRXSTS_PKTSTS_IN_XFER_COMP 3U
440#define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5U
441#define GRXSTS_PKTSTS_CH_HALTED 7U
443#define CLEAR_INTERRUPT_MASK 0xFFFFFFFFU
445#define HC_MAX_PKT_CNT 256U
449#define TEST_SE0_NAK 3U
450#define TEST_PACKET 4U
451#define TEST_FORCE_EN 5U
453#define USBx_PCGCCTL *(__IO uint32_t *)((uint32_t)USBx_BASE + USB_OTG_PCGCCTL_BASE)
454#define USBx_HPRT0 *(__IO uint32_t *)((uint32_t)USBx_BASE + USB_OTG_HOST_PORT_BASE)
456#define USBx_DEVICE ((USB_OTG_DeviceTypeDef *)(USBx_BASE + USB_OTG_DEVICE_BASE))
457#define USBx_INEP(i) ((USB_OTG_INEndpointTypeDef *)(USBx_BASE\
458 + USB_OTG_IN_ENDPOINT_BASE + ((i) * USB_OTG_EP_REG_SIZE)))
460#define USBx_OUTEP(i) ((USB_OTG_OUTEndpointTypeDef *)(USBx_BASE\
461 + USB_OTG_OUT_ENDPOINT_BASE + ((i) * USB_OTG_EP_REG_SIZE)))
463#define USBx_DFIFO(i) *(__IO uint32_t *)(USBx_BASE + USB_OTG_FIFO_BASE + ((i) * USB_OTG_FIFO_SIZE))
465#define USBx_HOST ((USB_OTG_HostTypeDef *)(USBx_BASE + USB_OTG_HOST_BASE))
466#define USBx_HC(i) ((USB_OTG_HostChannelTypeDef *)(USBx_BASE\
467 + USB_OTG_HOST_CHANNEL_BASE\
468 + ((i) * USB_OTG_HOST_CHANNEL_SIZE)))
471#define EP_ADDR_MSK 0xFU
482#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
483#define USB_MASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK &= ~(__INTERRUPT__))
484#define USB_UNMASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK |= (__INTERRUPT__))
486#define CLEAR_IN_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_INEP(__EPNUM__)->DIEPINT = (__INTERRUPT__))
487#define CLEAR_OUT_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_OUTEP(__EPNUM__)->DOEPINT = (__INTERRUPT__))
497#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
513 uint8_t ch_ep_num, uint16_t len, uint8_t dma);
542 uint8_t epnum, uint8_t dev_address, uint8_t speed,
543 uint8_t ep_type, uint16_t mps);
545 USB_OTG_HCTypeDef *hc, uint8_t dma);
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32h7xx_hal_def.h:47
USB_OTG_Core_Registers.
Definition: stm32h723xx.h:1761