Detailed Description

DelayBlock Low Layer HAL module driver.

Author

MCD Application Team

     This file provides firmware functions to manage the following 
     functionalities of the Delay Block peripheral:
      + input clock frequency range 25MHz to 208MHz
      + up to 12 oversampling phases

Attention

This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS.

==============================================================================
                     ##### DelayBlock peripheral features #####
==============================================================================        
  [..] The Delay block is used to generate an Output clock which is de-phased from the Input
        clock. The phase of the Output clock is programmed by FW. The Output clock is then used
        to clock the receive data in i.e. a SDMMC or QSPI interface.
       The delay is Voltage and Temperature dependent, which may require FW to do re-tuning
        and recenter the Output clock phase to the receive data.
  
  [..] The Delay Block features include the following:
       (+) Input clock frequency range 25MHz to 208MHz.
       (+) Up to 12 oversampling phases.
       
                         ##### How to use this driver #####
==============================================================================
  [..]
    This driver is a considered as a driver of service for external devices drivers
    that interfaces with the DELAY peripheral.
    The DelayBlock_Enable() function, enables the DelayBlock instance, configure the delay line length
    and configure the Output clock phase.
    The DelayBlock_Disable() function, disables the DelayBlock instance by setting DEN flag to 0.