RTEMS 6.1-rc2
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stm32h7xx_hal_pssi.h
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1
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_HAL_PSSI_H
21#define STM32H7xx_HAL_PSSI_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx_hal_def.h"
29
33#if defined(PSSI)
39/* Exported types ------------------------------------------------------------*/
49typedef struct
50{
51 uint32_t DataWidth; /* !< Configures the parallel bus width 8 lines or 16 lines */
52 uint32_t BusWidth; /* !< Configures the parallel bus width 8 lines or 16 lines */
53 uint32_t ControlSignal; /* !< Configures Data enable and Data ready */
54 uint32_t ClockPolarity; /* !< Configures the PSSI Input Clock polarity */
55 uint32_t DataEnablePolarity; /* !< Configures the PSSI Data Enable polarity */
56 uint32_t ReadyPolarity; /* !< Configures the PSSI Ready polarity */
57
58} PSSI_InitTypeDef;
59
60
64typedef enum
65{
66 HAL_PSSI_STATE_RESET = 0x00U, /* !< PSSI not yet initialized or disabled */
67 HAL_PSSI_STATE_READY = 0x01U, /* !< Peripheral initialized and ready for use */
68 HAL_PSSI_STATE_BUSY = 0x02U, /* !< An internal process is ongoing */
69 HAL_PSSI_STATE_BUSY_TX = 0x03U, /* !< Transmit process is ongoing */
70 HAL_PSSI_STATE_BUSY_RX = 0x04U, /* !< Receive process is ongoing */
71 HAL_PSSI_STATE_TIMEOUT = 0x05U, /* !< Timeout state */
72 HAL_PSSI_STATE_ERROR = 0x06U, /* !< PSSI state error */
73 HAL_PSSI_STATE_ABORT = 0x07U, /* !< PSSI process is aborted */
74
75} HAL_PSSI_StateTypeDef;
76
80typedef struct __PSSI_HandleTypeDef
81{
82 PSSI_TypeDef *Instance;
83 PSSI_InitTypeDef Init;
84 uint32_t *pBuffPtr;
85 uint32_t XferCount;
86 uint32_t XferSize;
87 DMA_HandleTypeDef *hdmatx;
88 DMA_HandleTypeDef *hdmarx;
90 void (* TxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi);
91 void (* RxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi);
92 void (* ErrorCallback)(struct __PSSI_HandleTypeDef *hpssi);
93 void (* AbortCpltCallback)(struct __PSSI_HandleTypeDef *hpssi);
95 void (* MspInitCallback)(struct __PSSI_HandleTypeDef *hpssi);
96 void (* MspDeInitCallback)(struct __PSSI_HandleTypeDef *hpssi);
98 HAL_LockTypeDef Lock;
99 __IO HAL_PSSI_StateTypeDef State;
100 __IO uint32_t ErrorCode;
102} PSSI_HandleTypeDef;
103
104
108typedef void (*pPSSI_CallbackTypeDef)(PSSI_HandleTypeDef *hpssi);
113typedef enum
114{
115 HAL_PSSI_TX_COMPLETE_CB_ID = 0x00U,
116 HAL_PSSI_RX_COMPLETE_CB_ID = 0x01U,
117 HAL_PSSI_ERROR_CB_ID = 0x03U,
118 HAL_PSSI_ABORT_CB_ID = 0x04U,
120 HAL_PSSI_MSPINIT_CB_ID = 0x05U,
121 HAL_PSSI_MSPDEINIT_CB_ID = 0x06U
123} HAL_PSSI_CallbackIDTypeDef;
124
125
130/* Exported constants --------------------------------------------------------*/
140#define HAL_PSSI_ERROR_NONE 0x00000000U
141#define HAL_PSSI_ERROR_NOT_SUPPORTED 0x00000001U
142#define HAL_PSSI_ERROR_UNDER_RUN 0x00000002U
143#define HAL_PSSI_ERROR_OVER_RUN 0x00000004U
144#define HAL_PSSI_ERROR_DMA 0x00000008U
145#define HAL_PSSI_ERROR_TIMEOUT 0x00000010U
146#define HAL_PSSI_ERROR_INVALID_CALLBACK 0x00000020U
158#define HAL_PSSI_8BITS 0x00000000U
159#define HAL_PSSI_16BITS 0x00000001U
160#define HAL_PSSI_32BITS 0x00000002U
170#define HAL_PSSI_8LINES 0x00000000U
171#define HAL_PSSI_16LINES PSSI_CR_EDM
179#define HAL_PSSI_UNIDIRECTIONAL 0x00000000U
180#define HAL_PSSI_BIDIRECTIONAL 0x00000001U
189#define HAL_PSSI_DE_RDY_DISABLE (0x0U << PSSI_CR_DERDYCFG_Pos)
190#define HAL_PSSI_RDY_ENABLE (0x1U << PSSI_CR_DERDYCFG_Pos)
191#define HAL_PSSI_DE_ENABLE (0x2U << PSSI_CR_DERDYCFG_Pos)
192#define HAL_PSSI_DE_RDY_ALT_ENABLE (0x3U << PSSI_CR_DERDYCFG_Pos)
193#define HAL_PSSI_MAP_RDY_BIDIR_ENABLE (0x4U << PSSI_CR_DERDYCFG_Pos)
194#define HAL_PSSI_RDY_MAP_ENABLE (0x5U << PSSI_CR_DERDYCFG_Pos)
195#define HAL_PSSI_DE_MAP_ENABLE (0x6U << PSSI_CR_DERDYCFG_Pos)
196#define HAL_PSSI_MAP_DE_BIDIR_ENABLE (0x7U << PSSI_CR_DERDYCFG_Pos)
207#define HAL_PSSI_DEPOL_ACTIVE_LOW 0x0U
208#define HAL_PSSI_DEPOL_ACTIVE_HIGH PSSI_CR_DEPOL
216#define HAL_PSSI_RDYPOL_ACTIVE_LOW 0x0U
217#define HAL_PSSI_RDYPOL_ACTIVE_HIGH PSSI_CR_RDYPOL
226#define HAL_PSSI_FALLING_EDGE 0x0U
227#define HAL_PSSI_RISING_EDGE 0x1U
240#define PSSI_MAX_NBYTE_SIZE 0x10000U /* 64 KB */
241#define PSSI_TIMEOUT_TRANSMIT 0x0000FFFFU
243#define PSSI_CR_OUTEN_INPUT 0x00000000U
244#define PSSI_CR_OUTEN_OUTPUT PSSI_CR_OUTEN
246#define PSSI_CR_DMA_ENABLE PSSI_CR_DMAEN
247#define PSSI_CR_DMA_DISABLE (~PSSI_CR_DMAEN)
249#define PSSI_CR_16BITS PSSI_CR_EDM
250#define PSSI_CR_8BITS (~PSSI_CR_EDM)
252#define PSSI_FLAG_RTT1B PSSI_SR_RTT1B
253#define PSSI_FLAG_RTT4B PSSI_SR_RTT4B
266#define PSSI_FLAG_OVR_RIS PSSI_RIS_OVR_RIS
267#define PSSI_FLAG_MASK PSSI_RIS_OVR_RIS_Msk
268#define PSSI_FLAG_OVR_MIS PSSI_MIS_OVR_MIS
278/* Exported macros ------------------------------------------------------------*/
289#define HAL_PSSI_RESET_HANDLE_STATE(__HANDLE__) do{ \
290 (__HANDLE__)->State = HAL_PSSI_STATE_RESET;\
291 (__HANDLE__)->MspInitCallback = NULL; \
292 (__HANDLE__)->MspDeInitCallback = NULL; \
293 }while(0)
294
295
301#define HAL_PSSI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= PSSI_CR_ENABLE)
307#define HAL_PSSI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (~PSSI_CR_ENABLE))
308
309/* PSSI pripheral STATUS */
320#define HAL_PSSI_GET_STATUS(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR & (__FLAG__))
321
322
323
324/* Interrupt & Flag management */
333#define HAL_PSSI_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->RIS & (__FLAG__))
334
343#define HAL_PSSI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
344
353#define HAL_PSSI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
354
363#define HAL_PSSI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__))
364
373#define HAL_PSSI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__))
374
375
382#define IS_PSSI_CONTROL_SIGNAL(__CONTROL__) (((__CONTROL__) == HAL_PSSI_DE_RDY_DISABLE ) || \
383 ((__CONTROL__) == HAL_PSSI_RDY_ENABLE ) || \
384 ((__CONTROL__) == HAL_PSSI_DE_ENABLE ) || \
385 ((__CONTROL__) == HAL_PSSI_DE_RDY_ALT_ENABLE ) || \
386 ((__CONTROL__) == HAL_PSSI_MAP_RDY_BIDIR_ENABLE ) || \
387 ((__CONTROL__) == HAL_PSSI_RDY_MAP_ENABLE ) || \
388 ((__CONTROL__) == HAL_PSSI_DE_MAP_ENABLE ) || \
389 ((__CONTROL__) == HAL_PSSI_MAP_DE_BIDIR_ENABLE ))
390
391
392
399#define IS_PSSI_BUSWIDTH(__BUSWIDTH__) (((__BUSWIDTH__) == HAL_PSSI_8LINES ) || \
400 ((__BUSWIDTH__) == HAL_PSSI_16LINES ))
401
409#define IS_PSSI_CLOCK_POLARITY(__CLOCKPOL__) (((__CLOCKPOL__) == HAL_PSSI_FALLING_EDGE ) || \
410 ((__CLOCKPOL__) == HAL_PSSI_RISING_EDGE ))
411
412
419#define IS_PSSI_DE_POLARITY(__DEPOL__) (((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_LOW ) || \
420 ((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_HIGH ))
421
428#define IS_PSSI_RDY_POLARITY(__RDYPOL__) (((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_LOW ) || \
429 ((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_HIGH ))
435/* Exported functions --------------------------------------------------------*/
444/* Initialization and de-initialization functions *******************************/
445HAL_StatusTypeDef HAL_PSSI_Init(PSSI_HandleTypeDef *hpssi);
446HAL_StatusTypeDef HAL_PSSI_DeInit(PSSI_HandleTypeDef *hpssi);
447void HAL_PSSI_MspInit(PSSI_HandleTypeDef *hpssi);
448void HAL_PSSI_MspDeInit(PSSI_HandleTypeDef *hpssi);
449/* Callbacks Register/UnRegister functions ***********************************/
450
451HAL_StatusTypeDef HAL_PSSI_RegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID,
452 pPSSI_CallbackTypeDef pCallback);
453HAL_StatusTypeDef HAL_PSSI_UnRegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID);
454
455
465/* IO operation functions *******************************************************/
466HAL_StatusTypeDef HAL_PSSI_Transmit(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout);
467HAL_StatusTypeDef HAL_PSSI_Receive(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout);
468HAL_StatusTypeDef HAL_PSSI_Transmit_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size);
469HAL_StatusTypeDef HAL_PSSI_Receive_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size);
470HAL_StatusTypeDef HAL_PSSI_Abort_DMA(PSSI_HandleTypeDef *hpssi);
471
480/* Peripheral State functions ***************************************************/
481HAL_PSSI_StateTypeDef HAL_PSSI_GetState(PSSI_HandleTypeDef *hpssi);
482uint32_t HAL_PSSI_GetError(PSSI_HandleTypeDef *hpssi);
483
492void HAL_PSSI_IRQHandler(PSSI_HandleTypeDef *hpssi);
493void HAL_PSSI_TxCpltCallback(PSSI_HandleTypeDef *hpssi);
494void HAL_PSSI_RxCpltCallback(PSSI_HandleTypeDef *hpssi);
495void HAL_PSSI_ErrorCallback(PSSI_HandleTypeDef *hpssi);
496void HAL_PSSI_AbortCpltCallback(PSSI_HandleTypeDef *hpssi);
497
498
509/* Private constants ---------------------------------------------------------*/
510
511
512/* Private macros ------------------------------------------------------------*/
513
514
518#endif /* PSSI */
519
525#ifdef __cplusplus
526}
527#endif
528
529#endif /* STM32H7xx_HAL_PSSI_H */
530
__IO
#define __IO
Definition: core_cm4.h:239
stm32h7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32h7xx_hal_def.h:47
HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32h7xx_hal_def.h:58
PSSI_TypeDef
PSSI.
Definition: stm32h723xx.h:580
__DMA_HandleTypeDef
DMA handle Structure definition.
Definition: stm32h7xx_hal_dma.h:138
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