20#ifndef STM32H7xx_HAL_LPTIM_H
21#define STM32H7xx_HAL_LPTIM_H
34#if defined (LPTIM1) || defined (LPTIM2) || defined (LPTIM3) || defined (LPTIM4) || defined (LPTIM5)
57} LPTIM_ClockConfigTypeDef;
75} LPTIM_ULPClockConfigTypeDef;
92} LPTIM_TriggerConfigTypeDef;
99 LPTIM_ClockConfigTypeDef Clock;
101 LPTIM_ULPClockConfigTypeDef UltraLowPowerClock;
103 LPTIM_TriggerConfigTypeDef Trigger;
105 uint32_t OutputPolarity;
112 uint32_t CounterSource;
116 uint32_t Input1Source;
119 uint32_t Input2Source;
130 HAL_LPTIM_STATE_RESET = 0x00U,
131 HAL_LPTIM_STATE_READY = 0x01U,
132 HAL_LPTIM_STATE_BUSY = 0x02U,
133 HAL_LPTIM_STATE_TIMEOUT = 0x03U,
134 HAL_LPTIM_STATE_ERROR = 0x04U
135} HAL_LPTIM_StateTypeDef;
140#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
141typedef struct __LPTIM_HandleTypeDef
148 LPTIM_InitTypeDef Init;
154 __IO HAL_LPTIM_StateTypeDef State;
156#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
157 void (* MspInitCallback)(
struct __LPTIM_HandleTypeDef *hlptim);
158 void (* MspDeInitCallback)(
struct __LPTIM_HandleTypeDef *hlptim);
159 void (* CompareMatchCallback)(
struct __LPTIM_HandleTypeDef *hlptim);
160 void (* AutoReloadMatchCallback)(
struct __LPTIM_HandleTypeDef *hlptim);
161 void (* TriggerCallback)(
struct __LPTIM_HandleTypeDef *hlptim);
162 void (* CompareWriteCallback)(
struct __LPTIM_HandleTypeDef *hlptim);
163 void (* AutoReloadWriteCallback)(
struct __LPTIM_HandleTypeDef *hlptim);
164 void (* DirectionUpCallback)(
struct __LPTIM_HandleTypeDef *hlptim);
165 void (* DirectionDownCallback)(
struct __LPTIM_HandleTypeDef *hlptim);
167} LPTIM_HandleTypeDef;
169#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
175 HAL_LPTIM_MSPINIT_CB_ID = 0x00U,
176 HAL_LPTIM_MSPDEINIT_CB_ID = 0x01U,
177 HAL_LPTIM_COMPARE_MATCH_CB_ID = 0x02U,
178 HAL_LPTIM_AUTORELOAD_MATCH_CB_ID = 0x03U,
179 HAL_LPTIM_TRIGGER_CB_ID = 0x04U,
180 HAL_LPTIM_COMPARE_WRITE_CB_ID = 0x05U,
181 HAL_LPTIM_AUTORELOAD_WRITE_CB_ID = 0x06U,
182 HAL_LPTIM_DIRECTION_UP_CB_ID = 0x07U,
183 HAL_LPTIM_DIRECTION_DOWN_CB_ID = 0x08U,
184} HAL_LPTIM_CallbackIDTypeDef;
189typedef void (*pLPTIM_CallbackTypeDef)(LPTIM_HandleTypeDef *hlptim);
206#define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC 0x00000000U
207#define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL
216#define LPTIM_PRESCALER_DIV1 0x00000000U
217#define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0
218#define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1
219#define LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1)
220#define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2
221#define LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2)
222#define LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2)
223#define LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC
233#define LPTIM_OUTPUTPOLARITY_HIGH 0x00000000U
234#define LPTIM_OUTPUTPOLARITY_LOW LPTIM_CFGR_WAVPOL
243#define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION 0x00000000U
244#define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS LPTIM_CFGR_CKFLT_0
245#define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS LPTIM_CFGR_CKFLT_1
246#define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS LPTIM_CFGR_CKFLT
255#define LPTIM_CLOCKPOLARITY_RISING 0x00000000U
256#define LPTIM_CLOCKPOLARITY_FALLING LPTIM_CFGR_CKPOL_0
257#define LPTIM_CLOCKPOLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1
266#define LPTIM_TRIGSOURCE_SOFTWARE 0x0000FFFFU
267#define LPTIM_TRIGSOURCE_0 0x00000000U
268#define LPTIM_TRIGSOURCE_1 LPTIM_CFGR_TRIGSEL_0
269#define LPTIM_TRIGSOURCE_2 LPTIM_CFGR_TRIGSEL_1
270#define LPTIM_TRIGSOURCE_3 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_1)
271#define LPTIM_TRIGSOURCE_4 LPTIM_CFGR_TRIGSEL_2
272#define LPTIM_TRIGSOURCE_5 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_2)
273#define LPTIM_TRIGSOURCE_6 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_2)
274#define LPTIM_TRIGSOURCE_7 LPTIM_CFGR_TRIGSEL
283#define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0
284#define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1
285#define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN
294#define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION 0x00000000U
295#define LPTIM_TRIGSAMPLETIME_2TRANSITIONS LPTIM_CFGR_TRGFLT_0
296#define LPTIM_TRIGSAMPLETIME_4TRANSITIONS LPTIM_CFGR_TRGFLT_1
297#define LPTIM_TRIGSAMPLETIME_8TRANSITIONS LPTIM_CFGR_TRGFLT
307#define LPTIM_UPDATE_IMMEDIATE 0x00000000U
308#define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD
318#define LPTIM_COUNTERSOURCE_INTERNAL 0x00000000U
319#define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE
329#define LPTIM_INPUT1SOURCE_GPIO 0x00000000U
330#define LPTIM_INPUT1SOURCE_COMP1 LPTIM_CFGR2_IN1SEL_0
331#define LPTIM_INPUT1SOURCE_COMP2 LPTIM_CFGR2_IN1SEL_1
332#define LPTIM_INPUT1SOURCE_COMP1_COMP2 (LPTIM_CFGR2_IN1SEL_1 | LPTIM_CFGR2_IN1SEL_0)
333#define LPTIM_INPUT1SOURCE_NOT_CONNECTED 0x00000000U
334#define LPTIM_INPUT1SOURCE_SAI4_FSA LPTIM_CFGR2_IN1SEL_0
335#define LPTIM_INPUT1SOURCE_SAI4_FSB LPTIM_CFGR2_IN1SEL_1
345#define LPTIM_INPUT2SOURCE_GPIO 0x00000000U
346#define LPTIM_INPUT2SOURCE_COMP2 LPTIM_CFGR2_IN2SEL_0
356#define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN
357#define LPTIM_FLAG_UP LPTIM_ISR_UP
358#define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK
359#define LPTIM_FLAG_CMPOK LPTIM_ISR_CMPOK
360#define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG
361#define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM
362#define LPTIM_FLAG_CMPM LPTIM_ISR_CMPM
371#define LPTIM_IT_DOWN LPTIM_IER_DOWNIE
372#define LPTIM_IT_UP LPTIM_IER_UPIE
373#define LPTIM_IT_ARROK LPTIM_IER_ARROKIE
374#define LPTIM_IT_CMPOK LPTIM_IER_CMPOKIE
375#define LPTIM_IT_EXTTRIG LPTIM_IER_EXTTRIGIE
376#define LPTIM_IT_ARRM LPTIM_IER_ARRMIE
377#define LPTIM_IT_CMPM LPTIM_IER_CMPMIE
396#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
397#define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) do { \
398 (__HANDLE__)->State = HAL_LPTIM_STATE_RESET; \
399 (__HANDLE__)->MspInitCallback = NULL; \
400 (__HANDLE__)->MspDeInitCallback = NULL; \
403#define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LPTIM_STATE_RESET)
411#define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE))
423#define __HAL_LPTIM_DISABLE(__HANDLE__) LPTIM_Disable(__HANDLE__)
430#define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT)
436#define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT)
443#define __HAL_LPTIM_RESET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_COUNTRST)
450#define __HAL_LPTIM_RESET_COUNTER_AFTERREAD(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_RSTARE)
459#define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__))
468#define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->CMP = (__VALUE__))
484#define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__))
500#define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
517#define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
534#define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__)))
551#define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER\
552 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
573void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim);
574void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim);
586HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
589HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
594HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
597HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
602HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
605HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
610HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
613HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
618HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout);
621HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout);
626HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
629HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
640uint32_t HAL_LPTIM_ReadCounter(
const LPTIM_HandleTypeDef *hlptim);
641uint32_t HAL_LPTIM_ReadAutoReload(
const LPTIM_HandleTypeDef *hlptim);
642uint32_t HAL_LPTIM_ReadCompare(
const LPTIM_HandleTypeDef *hlptim);
652void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim);
655void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim);
656void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim);
657void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim);
658void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim);
659void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim);
660void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim);
661void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim);
664#if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
665HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID,
666 pLPTIM_CallbackTypeDef pCallback);
667HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID);
678HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim);
723#define IS_LPTIM_CLOCK_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \
724 ((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC))
727#define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_PRESCALER_DIV1 ) || \
728 ((__PRESCALER__) == LPTIM_PRESCALER_DIV2 ) || \
729 ((__PRESCALER__) == LPTIM_PRESCALER_DIV4 ) || \
730 ((__PRESCALER__) == LPTIM_PRESCALER_DIV8 ) || \
731 ((__PRESCALER__) == LPTIM_PRESCALER_DIV16 ) || \
732 ((__PRESCALER__) == LPTIM_PRESCALER_DIV32 ) || \
733 ((__PRESCALER__) == LPTIM_PRESCALER_DIV64 ) || \
734 ((__PRESCALER__) == LPTIM_PRESCALER_DIV128))
736#define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) == LPTIM_PRESCALER_DIV1)
738#define IS_LPTIM_OUTPUT_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_OUTPUTPOLARITY_LOW ) || \
739 ((__POLARITY__) == LPTIM_OUTPUTPOLARITY_HIGH))
741#define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \
742 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS) || \
743 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS) || \
744 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS))
746#define IS_LPTIM_CLOCK_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING) || \
747 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \
748 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING))
750#define IS_LPTIM_TRG_SOURCE(__TRIG__) (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) || \
751 ((__TRIG__) == LPTIM_TRIGSOURCE_0) || \
752 ((__TRIG__) == LPTIM_TRIGSOURCE_1) || \
753 ((__TRIG__) == LPTIM_TRIGSOURCE_2) || \
754 ((__TRIG__) == LPTIM_TRIGSOURCE_3) || \
755 ((__TRIG__) == LPTIM_TRIGSOURCE_4) || \
756 ((__TRIG__) == LPTIM_TRIGSOURCE_5) || \
757 ((__TRIG__) == LPTIM_TRIGSOURCE_6) || \
758 ((__TRIG__) == LPTIM_TRIGSOURCE_7))
760#define IS_LPTIM_EXT_TRG_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING ) || \
761 ((__POLARITY__) == LPTIM_ACTIVEEDGE_FALLING ) || \
762 ((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING_FALLING ))
764#define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION) || \
765 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS ) || \
766 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS ) || \
767 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS ))
769#define IS_LPTIM_UPDATE_MODE(__MODE__) (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \
770 ((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD))
772#define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \
773 ((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL))
775#define IS_LPTIM_AUTORELOAD(__AUTORELOAD__) ((0x00000001UL <= (__AUTORELOAD__)) &&\
776 ((__AUTORELOAD__) <= 0x0000FFFFUL))
778#define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFUL)
780#define IS_LPTIM_PERIOD(__PERIOD__) ((0x00000001UL <= (__PERIOD__)) &&\
781 ((__PERIOD__) <= 0x0000FFFFUL))
783#define IS_LPTIM_PULSE(__PULSE__) ((__PULSE__) <= 0x0000FFFFUL)
785#define IS_LPTIM_INPUT1_SOURCE(__INSTANCE__, __SOURCE__) \
786 ((((__INSTANCE__) == LPTIM1) && \
787 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \
788 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1))) \
790 (((__INSTANCE__) == LPTIM2) && \
791 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \
792 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1) || \
793 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP2) || \
794 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1_COMP2))) \
796 (((__INSTANCE__) == LPTIM3) && \
797 (((__SOURCE__) == LPTIM_INPUT1SOURCE_NOT_CONNECTED) || \
798 ((__SOURCE__) == LPTIM_INPUT1SOURCE_SAI4_FSA) || \
799 ((__SOURCE__) == LPTIM_INPUT1SOURCE_SAI4_FSB))))
801#define IS_LPTIM_INPUT2_SOURCE(__INSTANCE__, __SOURCE__) \
802 ((((__INSTANCE__) == LPTIM1) || \
803 ((__INSTANCE__) == LPTIM2)) && \
804 (((__SOURCE__) == LPTIM_INPUT2SOURCE_GPIO) || \
805 ((__SOURCE__) == LPTIM_INPUT2SOURCE_COMP2)))
816void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim);
#define __IO
Definition: core_cm4.h:239
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32h7xx_hal_def.h:47
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32h7xx_hal_def.h:58
LPTIMIMER.
Definition: stm32h723xx.h:1559