alt_i2c.h File Reference

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Data Structures
struct	ALT_I2C_CON_s
struct	ALT_I2C_TAR_s
struct	ALT_I2C_SAR_s
struct	ALT_I2C_DATA_CMD_s
struct	ALT_I2C_SS_SCL_HCNT_s
struct	ALT_I2C_SS_SCL_LCNT_s
struct	ALT_I2C_FS_SCL_HCNT_s
struct	ALT_I2C_FS_SCL_LCNT_s
struct	ALT_I2C_INTR_STAT_s
struct	ALT_I2C_INTR_MSK_s
struct	ALT_I2C_RAW_INTR_STAT_s
struct	ALT_I2C_RX_TL_s
struct	ALT_I2C_TX_TL_s
struct	ALT_I2C_CLR_INTR_s
struct	ALT_I2C_CLR_RX_UNDER_s
struct	ALT_I2C_CLR_RX_OVER_s
struct	ALT_I2C_CLR_TX_OVER_s
struct	ALT_I2C_CLR_RD_REQ_s
struct	ALT_I2C_CLR_TX_ABRT_s
struct	ALT_I2C_CLR_RX_DONE_s
struct	ALT_I2C_CLR_ACTIVITY_s
struct	ALT_I2C_CLR_STOP_DET_s
struct	ALT_I2C_CLR_START_DET_s
struct	ALT_I2C_CLR_GEN_CALL_s
struct	ALT_I2C_EN_s
struct	ALT_I2C_STAT_s
struct	ALT_I2C_TXFLR_s
struct	ALT_I2C_RXFLR_s
struct	ALT_I2C_SDA_HOLD_s
struct	ALT_I2C_TX_ABRT_SRC_s
struct	ALT_I2C_SLV_DATA_NACK_ONLY_s
struct	ALT_I2C_DMA_CR_s
struct	ALT_I2C_DMA_TDLR_s
struct	ALT_I2C_DMA_RDLR_s
struct	ALT_I2C_SDA_SETUP_s
struct	ALT_I2C_ACK_GENERAL_CALL_s
struct	ALT_I2C_EN_STAT_s
struct	ALT_I2C_FS_SPKLEN_s
struct	ALT_I2C_COMP_PARAM_1_s
struct	ALT_I2C_COMP_VER_s
struct	ALT_I2C_COMP_TYPE_s
struct	ALT_I2C_s
struct	ALT_I2C_raw_s

Macros
#define	ALT_I2C_CON_MST_MOD_E_DIS   0x0
#define	ALT_I2C_CON_MST_MOD_E_EN   0x1
#define	ALT_I2C_CON_MST_MOD_LSB   0
#define	ALT_I2C_CON_MST_MOD_MSB   0
#define	ALT_I2C_CON_MST_MOD_WIDTH   1
#define	ALT_I2C_CON_MST_MOD_SET_MSK   0x00000001
#define	ALT_I2C_CON_MST_MOD_CLR_MSK   0xfffffffe
#define	ALT_I2C_CON_MST_MOD_RESET   0x1
#define	ALT_I2C_CON_MST_MOD_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_CON_MST_MOD_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_CON_SPEED_E_STANDARD   0x1
#define	ALT_I2C_CON_SPEED_E_FAST   0x2
#define	ALT_I2C_CON_SPEED_LSB   1
#define	ALT_I2C_CON_SPEED_MSB   2
#define	ALT_I2C_CON_SPEED_WIDTH   2
#define	ALT_I2C_CON_SPEED_SET_MSK   0x00000006
#define	ALT_I2C_CON_SPEED_CLR_MSK   0xfffffff9
#define	ALT_I2C_CON_SPEED_RESET   0x2
#define	ALT_I2C_CON_SPEED_GET(value)   (((value) & 0x00000006) >> 1)
#define	ALT_I2C_CON_SPEED_SET(value)   (((value) << 1) & 0x00000006)
#define	ALT_I2C_CON_IC_10BITADDR_SLV_E_SLVADDR7BIT   0x0
#define	ALT_I2C_CON_IC_10BITADDR_SLV_E_SLVADDR10BIT   0x1
#define	ALT_I2C_CON_IC_10BITADDR_SLV_LSB   3
#define	ALT_I2C_CON_IC_10BITADDR_SLV_MSB   3
#define	ALT_I2C_CON_IC_10BITADDR_SLV_WIDTH   1
#define	ALT_I2C_CON_IC_10BITADDR_SLV_SET_MSK   0x00000008
#define	ALT_I2C_CON_IC_10BITADDR_SLV_CLR_MSK   0xfffffff7
#define	ALT_I2C_CON_IC_10BITADDR_SLV_RESET   0x1
#define	ALT_I2C_CON_IC_10BITADDR_SLV_GET(value)   (((value) & 0x00000008) >> 3)
#define	ALT_I2C_CON_IC_10BITADDR_SLV_SET(value)   (((value) << 3) & 0x00000008)
#define	ALT_I2C_CON_IC_10BITADDR_MST_E_MSTADDR7BIT   0x0
#define	ALT_I2C_CON_IC_10BITADDR_MST_E_MSTADDR10BIT   0x1
#define	ALT_I2C_CON_IC_10BITADDR_MST_LSB   4
#define	ALT_I2C_CON_IC_10BITADDR_MST_MSB   4
#define	ALT_I2C_CON_IC_10BITADDR_MST_WIDTH   1
#define	ALT_I2C_CON_IC_10BITADDR_MST_SET_MSK   0x00000010
#define	ALT_I2C_CON_IC_10BITADDR_MST_CLR_MSK   0xffffffef
#define	ALT_I2C_CON_IC_10BITADDR_MST_RESET   0x1
#define	ALT_I2C_CON_IC_10BITADDR_MST_GET(value)   (((value) & 0x00000010) >> 4)
#define	ALT_I2C_CON_IC_10BITADDR_MST_SET(value)   (((value) << 4) & 0x00000010)
#define	ALT_I2C_CON_IC_RESTART_EN_E_DIS   0x0
#define	ALT_I2C_CON_IC_RESTART_EN_E_EN   0x1
#define	ALT_I2C_CON_IC_RESTART_EN_LSB   5
#define	ALT_I2C_CON_IC_RESTART_EN_MSB   5
#define	ALT_I2C_CON_IC_RESTART_EN_WIDTH   1
#define	ALT_I2C_CON_IC_RESTART_EN_SET_MSK   0x00000020
#define	ALT_I2C_CON_IC_RESTART_EN_CLR_MSK   0xffffffdf
#define	ALT_I2C_CON_IC_RESTART_EN_RESET   0x1
#define	ALT_I2C_CON_IC_RESTART_EN_GET(value)   (((value) & 0x00000020) >> 5)
#define	ALT_I2C_CON_IC_RESTART_EN_SET(value)   (((value) << 5) & 0x00000020)
#define	ALT_I2C_CON_IC_SLV_DIS_E_DIS   0x1
#define	ALT_I2C_CON_IC_SLV_DIS_E_EN   0x0
#define	ALT_I2C_CON_IC_SLV_DIS_LSB   6
#define	ALT_I2C_CON_IC_SLV_DIS_MSB   6
#define	ALT_I2C_CON_IC_SLV_DIS_WIDTH   1
#define	ALT_I2C_CON_IC_SLV_DIS_SET_MSK   0x00000040
#define	ALT_I2C_CON_IC_SLV_DIS_CLR_MSK   0xffffffbf
#define	ALT_I2C_CON_IC_SLV_DIS_RESET   0x1
#define	ALT_I2C_CON_IC_SLV_DIS_GET(value)   (((value) & 0x00000040) >> 6)
#define	ALT_I2C_CON_IC_SLV_DIS_SET(value)   (((value) << 6) & 0x00000040)
#define	ALT_I2C_CON_OFST   0x0
#define	ALT_I2C_CON_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CON_OFST))
#define	ALT_I2C_TAR_IC_TAR_LSB   0
#define	ALT_I2C_TAR_IC_TAR_MSB   9
#define	ALT_I2C_TAR_IC_TAR_WIDTH   10
#define	ALT_I2C_TAR_IC_TAR_SET_MSK   0x000003ff
#define	ALT_I2C_TAR_IC_TAR_CLR_MSK   0xfffffc00
#define	ALT_I2C_TAR_IC_TAR_RESET   0x55
#define	ALT_I2C_TAR_IC_TAR_GET(value)   (((value) & 0x000003ff) >> 0)
#define	ALT_I2C_TAR_IC_TAR_SET(value)   (((value) << 0) & 0x000003ff)
#define	ALT_I2C_TAR_GC_OR_START_E_GENCALL   0x0
#define	ALT_I2C_TAR_GC_OR_START_E_STARTBYTE   0x1
#define	ALT_I2C_TAR_GC_OR_START_LSB   10
#define	ALT_I2C_TAR_GC_OR_START_MSB   10
#define	ALT_I2C_TAR_GC_OR_START_WIDTH   1
#define	ALT_I2C_TAR_GC_OR_START_SET_MSK   0x00000400
#define	ALT_I2C_TAR_GC_OR_START_CLR_MSK   0xfffffbff
#define	ALT_I2C_TAR_GC_OR_START_RESET   0x0
#define	ALT_I2C_TAR_GC_OR_START_GET(value)   (((value) & 0x00000400) >> 10)
#define	ALT_I2C_TAR_GC_OR_START_SET(value)   (((value) << 10) & 0x00000400)
#define	ALT_I2C_TAR_SPECIAL_E_GENCALL   0x0
#define	ALT_I2C_TAR_SPECIAL_E_STARTBYTE   0x1
#define	ALT_I2C_TAR_SPECIAL_LSB   11
#define	ALT_I2C_TAR_SPECIAL_MSB   11
#define	ALT_I2C_TAR_SPECIAL_WIDTH   1
#define	ALT_I2C_TAR_SPECIAL_SET_MSK   0x00000800
#define	ALT_I2C_TAR_SPECIAL_CLR_MSK   0xfffff7ff
#define	ALT_I2C_TAR_SPECIAL_RESET   0x0
#define	ALT_I2C_TAR_SPECIAL_GET(value)   (((value) & 0x00000800) >> 11)
#define	ALT_I2C_TAR_SPECIAL_SET(value)   (((value) << 11) & 0x00000800)
#define	ALT_I2C_TAR_IC_10BITADDR_MST_E_START7   0x0
#define	ALT_I2C_TAR_IC_10BITADDR_MST_E_START10   0x1
#define	ALT_I2C_TAR_IC_10BITADDR_MST_LSB   12
#define	ALT_I2C_TAR_IC_10BITADDR_MST_MSB   12
#define	ALT_I2C_TAR_IC_10BITADDR_MST_WIDTH   1
#define	ALT_I2C_TAR_IC_10BITADDR_MST_SET_MSK   0x00001000
#define	ALT_I2C_TAR_IC_10BITADDR_MST_CLR_MSK   0xffffefff
#define	ALT_I2C_TAR_IC_10BITADDR_MST_RESET   0x1
#define	ALT_I2C_TAR_IC_10BITADDR_MST_GET(value)   (((value) & 0x00001000) >> 12)
#define	ALT_I2C_TAR_IC_10BITADDR_MST_SET(value)   (((value) << 12) & 0x00001000)
#define	ALT_I2C_TAR_OFST   0x4
#define	ALT_I2C_TAR_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_TAR_OFST))
#define	ALT_I2C_SAR_IC_SAR_LSB   0
#define	ALT_I2C_SAR_IC_SAR_MSB   9
#define	ALT_I2C_SAR_IC_SAR_WIDTH   10
#define	ALT_I2C_SAR_IC_SAR_SET_MSK   0x000003ff
#define	ALT_I2C_SAR_IC_SAR_CLR_MSK   0xfffffc00
#define	ALT_I2C_SAR_IC_SAR_RESET   0x55
#define	ALT_I2C_SAR_IC_SAR_GET(value)   (((value) & 0x000003ff) >> 0)
#define	ALT_I2C_SAR_IC_SAR_SET(value)   (((value) << 0) & 0x000003ff)
#define	ALT_I2C_SAR_OFST   0x8
#define	ALT_I2C_SAR_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_SAR_OFST))
#define	ALT_I2C_DATA_CMD_DAT_LSB   0
#define	ALT_I2C_DATA_CMD_DAT_MSB   7
#define	ALT_I2C_DATA_CMD_DAT_WIDTH   8
#define	ALT_I2C_DATA_CMD_DAT_SET_MSK   0x000000ff
#define	ALT_I2C_DATA_CMD_DAT_CLR_MSK   0xffffff00
#define	ALT_I2C_DATA_CMD_DAT_RESET   0x0
#define	ALT_I2C_DATA_CMD_DAT_GET(value)   (((value) & 0x000000ff) >> 0)
#define	ALT_I2C_DATA_CMD_DAT_SET(value)   (((value) << 0) & 0x000000ff)
#define	ALT_I2C_DATA_CMD_CMD_E_RD   0x1
#define	ALT_I2C_DATA_CMD_CMD_E_WR   0x0
#define	ALT_I2C_DATA_CMD_CMD_LSB   8
#define	ALT_I2C_DATA_CMD_CMD_MSB   8
#define	ALT_I2C_DATA_CMD_CMD_WIDTH   1
#define	ALT_I2C_DATA_CMD_CMD_SET_MSK   0x00000100
#define	ALT_I2C_DATA_CMD_CMD_CLR_MSK   0xfffffeff
#define	ALT_I2C_DATA_CMD_CMD_RESET   0x0
#define	ALT_I2C_DATA_CMD_CMD_GET(value)   (((value) & 0x00000100) >> 8)
#define	ALT_I2C_DATA_CMD_CMD_SET(value)   (((value) << 8) & 0x00000100)
#define	ALT_I2C_DATA_CMD_STOP_E_STOP   0x1
#define	ALT_I2C_DATA_CMD_STOP_E_NO_STOP   0x0
#define	ALT_I2C_DATA_CMD_STOP_LSB   9
#define	ALT_I2C_DATA_CMD_STOP_MSB   9
#define	ALT_I2C_DATA_CMD_STOP_WIDTH   1
#define	ALT_I2C_DATA_CMD_STOP_SET_MSK   0x00000200
#define	ALT_I2C_DATA_CMD_STOP_CLR_MSK   0xfffffdff
#define	ALT_I2C_DATA_CMD_STOP_RESET   0x0
#define	ALT_I2C_DATA_CMD_STOP_GET(value)   (((value) & 0x00000200) >> 9)
#define	ALT_I2C_DATA_CMD_STOP_SET(value)   (((value) << 9) & 0x00000200)
#define	ALT_I2C_DATA_CMD_RESTART_E_RESTART   0x1
#define	ALT_I2C_DATA_CMD_RESTART_E_RESTART_ON_DIR_CHANGE   0x0
#define	ALT_I2C_DATA_CMD_RESTART_LSB   10
#define	ALT_I2C_DATA_CMD_RESTART_MSB   10
#define	ALT_I2C_DATA_CMD_RESTART_WIDTH   1
#define	ALT_I2C_DATA_CMD_RESTART_SET_MSK   0x00000400
#define	ALT_I2C_DATA_CMD_RESTART_CLR_MSK   0xfffffbff
#define	ALT_I2C_DATA_CMD_RESTART_RESET   0x0
#define	ALT_I2C_DATA_CMD_RESTART_GET(value)   (((value) & 0x00000400) >> 10)
#define	ALT_I2C_DATA_CMD_RESTART_SET(value)   (((value) << 10) & 0x00000400)
#define	ALT_I2C_DATA_CMD_OFST   0x10
#define	ALT_I2C_DATA_CMD_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_DATA_CMD_OFST))
#define	ALT_I2C_SS_SCL_HCNT_IC_SS_SCL_HCNT_LSB   0
#define	ALT_I2C_SS_SCL_HCNT_IC_SS_SCL_HCNT_MSB   15
#define	ALT_I2C_SS_SCL_HCNT_IC_SS_SCL_HCNT_WIDTH   16
#define	ALT_I2C_SS_SCL_HCNT_IC_SS_SCL_HCNT_SET_MSK   0x0000ffff
#define	ALT_I2C_SS_SCL_HCNT_IC_SS_SCL_HCNT_CLR_MSK   0xffff0000
#define	ALT_I2C_SS_SCL_HCNT_IC_SS_SCL_HCNT_RESET   0x190
#define	ALT_I2C_SS_SCL_HCNT_IC_SS_SCL_HCNT_GET(value)   (((value) & 0x0000ffff) >> 0)
#define	ALT_I2C_SS_SCL_HCNT_IC_SS_SCL_HCNT_SET(value)   (((value) << 0) & 0x0000ffff)
#define	ALT_I2C_SS_SCL_HCNT_OFST   0x14
#define	ALT_I2C_SS_SCL_HCNT_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_SS_SCL_HCNT_OFST))
#define	ALT_I2C_SS_SCL_LCNT_IC_SS_SCL_LCNT_LSB   0
#define	ALT_I2C_SS_SCL_LCNT_IC_SS_SCL_LCNT_MSB   15
#define	ALT_I2C_SS_SCL_LCNT_IC_SS_SCL_LCNT_WIDTH   16
#define	ALT_I2C_SS_SCL_LCNT_IC_SS_SCL_LCNT_SET_MSK   0x0000ffff
#define	ALT_I2C_SS_SCL_LCNT_IC_SS_SCL_LCNT_CLR_MSK   0xffff0000
#define	ALT_I2C_SS_SCL_LCNT_IC_SS_SCL_LCNT_RESET   0x1d6
#define	ALT_I2C_SS_SCL_LCNT_IC_SS_SCL_LCNT_GET(value)   (((value) & 0x0000ffff) >> 0)
#define	ALT_I2C_SS_SCL_LCNT_IC_SS_SCL_LCNT_SET(value)   (((value) << 0) & 0x0000ffff)
#define	ALT_I2C_SS_SCL_LCNT_OFST   0x18
#define	ALT_I2C_SS_SCL_LCNT_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_SS_SCL_LCNT_OFST))
#define	ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_LSB   0
#define	ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_MSB   15
#define	ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_WIDTH   16
#define	ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_SET_MSK   0x0000ffff
#define	ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_CLR_MSK   0xffff0000
#define	ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_RESET   0x3c
#define	ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_GET(value)   (((value) & 0x0000ffff) >> 0)
#define	ALT_I2C_FS_SCL_HCNT_IC_FS_SCL_HCNT_SET(value)   (((value) << 0) & 0x0000ffff)
#define	ALT_I2C_FS_SCL_HCNT_OFST   0x1c
#define	ALT_I2C_FS_SCL_HCNT_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_FS_SCL_HCNT_OFST))
#define	ALT_I2C_FS_SCL_LCNT_IC_FS_SCL_LCNT_LSB   0
#define	ALT_I2C_FS_SCL_LCNT_IC_FS_SCL_LCNT_MSB   15
#define	ALT_I2C_FS_SCL_LCNT_IC_FS_SCL_LCNT_WIDTH   16
#define	ALT_I2C_FS_SCL_LCNT_IC_FS_SCL_LCNT_SET_MSK   0x0000ffff
#define	ALT_I2C_FS_SCL_LCNT_IC_FS_SCL_LCNT_CLR_MSK   0xffff0000
#define	ALT_I2C_FS_SCL_LCNT_IC_FS_SCL_LCNT_RESET   0x82
#define	ALT_I2C_FS_SCL_LCNT_IC_FS_SCL_LCNT_GET(value)   (((value) & 0x0000ffff) >> 0)
#define	ALT_I2C_FS_SCL_LCNT_IC_FS_SCL_LCNT_SET(value)   (((value) << 0) & 0x0000ffff)
#define	ALT_I2C_FS_SCL_LCNT_OFST   0x20
#define	ALT_I2C_FS_SCL_LCNT_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_FS_SCL_LCNT_OFST))
#define	ALT_I2C_INTR_STAT_R_RX_UNDER_LSB   0
#define	ALT_I2C_INTR_STAT_R_RX_UNDER_MSB   0
#define	ALT_I2C_INTR_STAT_R_RX_UNDER_WIDTH   1
#define	ALT_I2C_INTR_STAT_R_RX_UNDER_SET_MSK   0x00000001
#define	ALT_I2C_INTR_STAT_R_RX_UNDER_CLR_MSK   0xfffffffe
#define	ALT_I2C_INTR_STAT_R_RX_UNDER_RESET   0x0
#define	ALT_I2C_INTR_STAT_R_RX_UNDER_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_INTR_STAT_R_RX_UNDER_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_INTR_STAT_R_RX_OVER_LSB   1
#define	ALT_I2C_INTR_STAT_R_RX_OVER_MSB   1
#define	ALT_I2C_INTR_STAT_R_RX_OVER_WIDTH   1
#define	ALT_I2C_INTR_STAT_R_RX_OVER_SET_MSK   0x00000002
#define	ALT_I2C_INTR_STAT_R_RX_OVER_CLR_MSK   0xfffffffd
#define	ALT_I2C_INTR_STAT_R_RX_OVER_RESET   0x0
#define	ALT_I2C_INTR_STAT_R_RX_OVER_GET(value)   (((value) & 0x00000002) >> 1)
#define	ALT_I2C_INTR_STAT_R_RX_OVER_SET(value)   (((value) << 1) & 0x00000002)
#define	ALT_I2C_INTR_STAT_R_RX_FULL_LSB   2
#define	ALT_I2C_INTR_STAT_R_RX_FULL_MSB   2
#define	ALT_I2C_INTR_STAT_R_RX_FULL_WIDTH   1
#define	ALT_I2C_INTR_STAT_R_RX_FULL_SET_MSK   0x00000004
#define	ALT_I2C_INTR_STAT_R_RX_FULL_CLR_MSK   0xfffffffb
#define	ALT_I2C_INTR_STAT_R_RX_FULL_RESET   0x0
#define	ALT_I2C_INTR_STAT_R_RX_FULL_GET(value)   (((value) & 0x00000004) >> 2)
#define	ALT_I2C_INTR_STAT_R_RX_FULL_SET(value)   (((value) << 2) & 0x00000004)
#define	ALT_I2C_INTR_STAT_R_TX_OVER_LSB   3
#define	ALT_I2C_INTR_STAT_R_TX_OVER_MSB   3
#define	ALT_I2C_INTR_STAT_R_TX_OVER_WIDTH   1
#define	ALT_I2C_INTR_STAT_R_TX_OVER_SET_MSK   0x00000008
#define	ALT_I2C_INTR_STAT_R_TX_OVER_CLR_MSK   0xfffffff7
#define	ALT_I2C_INTR_STAT_R_TX_OVER_RESET   0x0
#define	ALT_I2C_INTR_STAT_R_TX_OVER_GET(value)   (((value) & 0x00000008) >> 3)
#define	ALT_I2C_INTR_STAT_R_TX_OVER_SET(value)   (((value) << 3) & 0x00000008)
#define	ALT_I2C_INTR_STAT_R_TX_EMPTY_LSB   4
#define	ALT_I2C_INTR_STAT_R_TX_EMPTY_MSB   4
#define	ALT_I2C_INTR_STAT_R_TX_EMPTY_WIDTH   1
#define	ALT_I2C_INTR_STAT_R_TX_EMPTY_SET_MSK   0x00000010
#define	ALT_I2C_INTR_STAT_R_TX_EMPTY_CLR_MSK   0xffffffef
#define	ALT_I2C_INTR_STAT_R_TX_EMPTY_RESET   0x0
#define	ALT_I2C_INTR_STAT_R_TX_EMPTY_GET(value)   (((value) & 0x00000010) >> 4)
#define	ALT_I2C_INTR_STAT_R_TX_EMPTY_SET(value)   (((value) << 4) & 0x00000010)
#define	ALT_I2C_INTR_STAT_R_RD_REQ_LSB   5
#define	ALT_I2C_INTR_STAT_R_RD_REQ_MSB   5
#define	ALT_I2C_INTR_STAT_R_RD_REQ_WIDTH   1
#define	ALT_I2C_INTR_STAT_R_RD_REQ_SET_MSK   0x00000020
#define	ALT_I2C_INTR_STAT_R_RD_REQ_CLR_MSK   0xffffffdf
#define	ALT_I2C_INTR_STAT_R_RD_REQ_RESET   0x0
#define	ALT_I2C_INTR_STAT_R_RD_REQ_GET(value)   (((value) & 0x00000020) >> 5)
#define	ALT_I2C_INTR_STAT_R_RD_REQ_SET(value)   (((value) << 5) & 0x00000020)
#define	ALT_I2C_INTR_STAT_R_TX_ABRT_LSB   6
#define	ALT_I2C_INTR_STAT_R_TX_ABRT_MSB   6
#define	ALT_I2C_INTR_STAT_R_TX_ABRT_WIDTH   1
#define	ALT_I2C_INTR_STAT_R_TX_ABRT_SET_MSK   0x00000040
#define	ALT_I2C_INTR_STAT_R_TX_ABRT_CLR_MSK   0xffffffbf
#define	ALT_I2C_INTR_STAT_R_TX_ABRT_RESET   0x0
#define	ALT_I2C_INTR_STAT_R_TX_ABRT_GET(value)   (((value) & 0x00000040) >> 6)
#define	ALT_I2C_INTR_STAT_R_TX_ABRT_SET(value)   (((value) << 6) & 0x00000040)
#define	ALT_I2C_INTR_STAT_R_RX_DONE_LSB   7
#define	ALT_I2C_INTR_STAT_R_RX_DONE_MSB   7
#define	ALT_I2C_INTR_STAT_R_RX_DONE_WIDTH   1
#define	ALT_I2C_INTR_STAT_R_RX_DONE_SET_MSK   0x00000080
#define	ALT_I2C_INTR_STAT_R_RX_DONE_CLR_MSK   0xffffff7f
#define	ALT_I2C_INTR_STAT_R_RX_DONE_RESET   0x0
#define	ALT_I2C_INTR_STAT_R_RX_DONE_GET(value)   (((value) & 0x00000080) >> 7)
#define	ALT_I2C_INTR_STAT_R_RX_DONE_SET(value)   (((value) << 7) & 0x00000080)
#define	ALT_I2C_INTR_STAT_R_ACTIVITY_LSB   8
#define	ALT_I2C_INTR_STAT_R_ACTIVITY_MSB   8
#define	ALT_I2C_INTR_STAT_R_ACTIVITY_WIDTH   1
#define	ALT_I2C_INTR_STAT_R_ACTIVITY_SET_MSK   0x00000100
#define	ALT_I2C_INTR_STAT_R_ACTIVITY_CLR_MSK   0xfffffeff
#define	ALT_I2C_INTR_STAT_R_ACTIVITY_RESET   0x0
#define	ALT_I2C_INTR_STAT_R_ACTIVITY_GET(value)   (((value) & 0x00000100) >> 8)
#define	ALT_I2C_INTR_STAT_R_ACTIVITY_SET(value)   (((value) << 8) & 0x00000100)
#define	ALT_I2C_INTR_STAT_R_STOP_DET_LSB   9
#define	ALT_I2C_INTR_STAT_R_STOP_DET_MSB   9
#define	ALT_I2C_INTR_STAT_R_STOP_DET_WIDTH   1
#define	ALT_I2C_INTR_STAT_R_STOP_DET_SET_MSK   0x00000200
#define	ALT_I2C_INTR_STAT_R_STOP_DET_CLR_MSK   0xfffffdff
#define	ALT_I2C_INTR_STAT_R_STOP_DET_RESET   0x0
#define	ALT_I2C_INTR_STAT_R_STOP_DET_GET(value)   (((value) & 0x00000200) >> 9)
#define	ALT_I2C_INTR_STAT_R_STOP_DET_SET(value)   (((value) << 9) & 0x00000200)
#define	ALT_I2C_INTR_STAT_R_START_DET_LSB   10
#define	ALT_I2C_INTR_STAT_R_START_DET_MSB   10
#define	ALT_I2C_INTR_STAT_R_START_DET_WIDTH   1
#define	ALT_I2C_INTR_STAT_R_START_DET_SET_MSK   0x00000400
#define	ALT_I2C_INTR_STAT_R_START_DET_CLR_MSK   0xfffffbff
#define	ALT_I2C_INTR_STAT_R_START_DET_RESET   0x0
#define	ALT_I2C_INTR_STAT_R_START_DET_GET(value)   (((value) & 0x00000400) >> 10)
#define	ALT_I2C_INTR_STAT_R_START_DET_SET(value)   (((value) << 10) & 0x00000400)
#define	ALT_I2C_INTR_STAT_R_GEN_CALL_LSB   11
#define	ALT_I2C_INTR_STAT_R_GEN_CALL_MSB   11
#define	ALT_I2C_INTR_STAT_R_GEN_CALL_WIDTH   1
#define	ALT_I2C_INTR_STAT_R_GEN_CALL_SET_MSK   0x00000800
#define	ALT_I2C_INTR_STAT_R_GEN_CALL_CLR_MSK   0xfffff7ff
#define	ALT_I2C_INTR_STAT_R_GEN_CALL_RESET   0x0
#define	ALT_I2C_INTR_STAT_R_GEN_CALL_GET(value)   (((value) & 0x00000800) >> 11)
#define	ALT_I2C_INTR_STAT_R_GEN_CALL_SET(value)   (((value) << 11) & 0x00000800)
#define	ALT_I2C_INTR_STAT_OFST   0x2c
#define	ALT_I2C_INTR_STAT_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_INTR_STAT_OFST))
#define	ALT_I2C_INTR_MSK_M_RX_UNDER_LSB   0
#define	ALT_I2C_INTR_MSK_M_RX_UNDER_MSB   0
#define	ALT_I2C_INTR_MSK_M_RX_UNDER_WIDTH   1
#define	ALT_I2C_INTR_MSK_M_RX_UNDER_SET_MSK   0x00000001
#define	ALT_I2C_INTR_MSK_M_RX_UNDER_CLR_MSK   0xfffffffe
#define	ALT_I2C_INTR_MSK_M_RX_UNDER_RESET   0x1
#define	ALT_I2C_INTR_MSK_M_RX_UNDER_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_INTR_MSK_M_RX_UNDER_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_INTR_MSK_M_RX_OVER_LSB   1
#define	ALT_I2C_INTR_MSK_M_RX_OVER_MSB   1
#define	ALT_I2C_INTR_MSK_M_RX_OVER_WIDTH   1
#define	ALT_I2C_INTR_MSK_M_RX_OVER_SET_MSK   0x00000002
#define	ALT_I2C_INTR_MSK_M_RX_OVER_CLR_MSK   0xfffffffd
#define	ALT_I2C_INTR_MSK_M_RX_OVER_RESET   0x1
#define	ALT_I2C_INTR_MSK_M_RX_OVER_GET(value)   (((value) & 0x00000002) >> 1)
#define	ALT_I2C_INTR_MSK_M_RX_OVER_SET(value)   (((value) << 1) & 0x00000002)
#define	ALT_I2C_INTR_MSK_M_RX_FULL_LSB   2
#define	ALT_I2C_INTR_MSK_M_RX_FULL_MSB   2
#define	ALT_I2C_INTR_MSK_M_RX_FULL_WIDTH   1
#define	ALT_I2C_INTR_MSK_M_RX_FULL_SET_MSK   0x00000004
#define	ALT_I2C_INTR_MSK_M_RX_FULL_CLR_MSK   0xfffffffb
#define	ALT_I2C_INTR_MSK_M_RX_FULL_RESET   0x1
#define	ALT_I2C_INTR_MSK_M_RX_FULL_GET(value)   (((value) & 0x00000004) >> 2)
#define	ALT_I2C_INTR_MSK_M_RX_FULL_SET(value)   (((value) << 2) & 0x00000004)
#define	ALT_I2C_INTR_MSK_M_TX_OVER_LSB   3
#define	ALT_I2C_INTR_MSK_M_TX_OVER_MSB   3
#define	ALT_I2C_INTR_MSK_M_TX_OVER_WIDTH   1
#define	ALT_I2C_INTR_MSK_M_TX_OVER_SET_MSK   0x00000008
#define	ALT_I2C_INTR_MSK_M_TX_OVER_CLR_MSK   0xfffffff7
#define	ALT_I2C_INTR_MSK_M_TX_OVER_RESET   0x1
#define	ALT_I2C_INTR_MSK_M_TX_OVER_GET(value)   (((value) & 0x00000008) >> 3)
#define	ALT_I2C_INTR_MSK_M_TX_OVER_SET(value)   (((value) << 3) & 0x00000008)
#define	ALT_I2C_INTR_MSK_M_TX_EMPTY_LSB   4
#define	ALT_I2C_INTR_MSK_M_TX_EMPTY_MSB   4
#define	ALT_I2C_INTR_MSK_M_TX_EMPTY_WIDTH   1
#define	ALT_I2C_INTR_MSK_M_TX_EMPTY_SET_MSK   0x00000010
#define	ALT_I2C_INTR_MSK_M_TX_EMPTY_CLR_MSK   0xffffffef
#define	ALT_I2C_INTR_MSK_M_TX_EMPTY_RESET   0x1
#define	ALT_I2C_INTR_MSK_M_TX_EMPTY_GET(value)   (((value) & 0x00000010) >> 4)
#define	ALT_I2C_INTR_MSK_M_TX_EMPTY_SET(value)   (((value) << 4) & 0x00000010)
#define	ALT_I2C_INTR_MSK_M_RD_REQ_LSB   5
#define	ALT_I2C_INTR_MSK_M_RD_REQ_MSB   5
#define	ALT_I2C_INTR_MSK_M_RD_REQ_WIDTH   1
#define	ALT_I2C_INTR_MSK_M_RD_REQ_SET_MSK   0x00000020
#define	ALT_I2C_INTR_MSK_M_RD_REQ_CLR_MSK   0xffffffdf
#define	ALT_I2C_INTR_MSK_M_RD_REQ_RESET   0x1
#define	ALT_I2C_INTR_MSK_M_RD_REQ_GET(value)   (((value) & 0x00000020) >> 5)
#define	ALT_I2C_INTR_MSK_M_RD_REQ_SET(value)   (((value) << 5) & 0x00000020)
#define	ALT_I2C_INTR_MSK_M_TX_ABRT_LSB   6
#define	ALT_I2C_INTR_MSK_M_TX_ABRT_MSB   6
#define	ALT_I2C_INTR_MSK_M_TX_ABRT_WIDTH   1
#define	ALT_I2C_INTR_MSK_M_TX_ABRT_SET_MSK   0x00000040
#define	ALT_I2C_INTR_MSK_M_TX_ABRT_CLR_MSK   0xffffffbf
#define	ALT_I2C_INTR_MSK_M_TX_ABRT_RESET   0x1
#define	ALT_I2C_INTR_MSK_M_TX_ABRT_GET(value)   (((value) & 0x00000040) >> 6)
#define	ALT_I2C_INTR_MSK_M_TX_ABRT_SET(value)   (((value) << 6) & 0x00000040)
#define	ALT_I2C_INTR_MSK_M_RX_DONE_LSB   7
#define	ALT_I2C_INTR_MSK_M_RX_DONE_MSB   7
#define	ALT_I2C_INTR_MSK_M_RX_DONE_WIDTH   1
#define	ALT_I2C_INTR_MSK_M_RX_DONE_SET_MSK   0x00000080
#define	ALT_I2C_INTR_MSK_M_RX_DONE_CLR_MSK   0xffffff7f
#define	ALT_I2C_INTR_MSK_M_RX_DONE_RESET   0x1
#define	ALT_I2C_INTR_MSK_M_RX_DONE_GET(value)   (((value) & 0x00000080) >> 7)
#define	ALT_I2C_INTR_MSK_M_RX_DONE_SET(value)   (((value) << 7) & 0x00000080)
#define	ALT_I2C_INTR_MSK_M_ACTIVITY_LSB   8
#define	ALT_I2C_INTR_MSK_M_ACTIVITY_MSB   8
#define	ALT_I2C_INTR_MSK_M_ACTIVITY_WIDTH   1
#define	ALT_I2C_INTR_MSK_M_ACTIVITY_SET_MSK   0x00000100
#define	ALT_I2C_INTR_MSK_M_ACTIVITY_CLR_MSK   0xfffffeff
#define	ALT_I2C_INTR_MSK_M_ACTIVITY_RESET   0x0
#define	ALT_I2C_INTR_MSK_M_ACTIVITY_GET(value)   (((value) & 0x00000100) >> 8)
#define	ALT_I2C_INTR_MSK_M_ACTIVITY_SET(value)   (((value) << 8) & 0x00000100)
#define	ALT_I2C_INTR_MSK_M_STOP_DET_LSB   9
#define	ALT_I2C_INTR_MSK_M_STOP_DET_MSB   9
#define	ALT_I2C_INTR_MSK_M_STOP_DET_WIDTH   1
#define	ALT_I2C_INTR_MSK_M_STOP_DET_SET_MSK   0x00000200
#define	ALT_I2C_INTR_MSK_M_STOP_DET_CLR_MSK   0xfffffdff
#define	ALT_I2C_INTR_MSK_M_STOP_DET_RESET   0x0
#define	ALT_I2C_INTR_MSK_M_STOP_DET_GET(value)   (((value) & 0x00000200) >> 9)
#define	ALT_I2C_INTR_MSK_M_STOP_DET_SET(value)   (((value) << 9) & 0x00000200)
#define	ALT_I2C_INTR_MSK_M_START_DET_LSB   10
#define	ALT_I2C_INTR_MSK_M_START_DET_MSB   10
#define	ALT_I2C_INTR_MSK_M_START_DET_WIDTH   1
#define	ALT_I2C_INTR_MSK_M_START_DET_SET_MSK   0x00000400
#define	ALT_I2C_INTR_MSK_M_START_DET_CLR_MSK   0xfffffbff
#define	ALT_I2C_INTR_MSK_M_START_DET_RESET   0x0
#define	ALT_I2C_INTR_MSK_M_START_DET_GET(value)   (((value) & 0x00000400) >> 10)
#define	ALT_I2C_INTR_MSK_M_START_DET_SET(value)   (((value) << 10) & 0x00000400)
#define	ALT_I2C_INTR_MSK_M_GEN_CALL_LSB   11
#define	ALT_I2C_INTR_MSK_M_GEN_CALL_MSB   11
#define	ALT_I2C_INTR_MSK_M_GEN_CALL_WIDTH   1
#define	ALT_I2C_INTR_MSK_M_GEN_CALL_SET_MSK   0x00000800
#define	ALT_I2C_INTR_MSK_M_GEN_CALL_CLR_MSK   0xfffff7ff
#define	ALT_I2C_INTR_MSK_M_GEN_CALL_RESET   0x1
#define	ALT_I2C_INTR_MSK_M_GEN_CALL_GET(value)   (((value) & 0x00000800) >> 11)
#define	ALT_I2C_INTR_MSK_M_GEN_CALL_SET(value)   (((value) << 11) & 0x00000800)
#define	ALT_I2C_INTR_MSK_OFST   0x30
#define	ALT_I2C_INTR_MSK_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_INTR_MSK_OFST))
#define	ALT_I2C_RAW_INTR_STAT_RX_UNDER_LSB   0
#define	ALT_I2C_RAW_INTR_STAT_RX_UNDER_MSB   0
#define	ALT_I2C_RAW_INTR_STAT_RX_UNDER_WIDTH   1
#define	ALT_I2C_RAW_INTR_STAT_RX_UNDER_SET_MSK   0x00000001
#define	ALT_I2C_RAW_INTR_STAT_RX_UNDER_CLR_MSK   0xfffffffe
#define	ALT_I2C_RAW_INTR_STAT_RX_UNDER_RESET   0x0
#define	ALT_I2C_RAW_INTR_STAT_RX_UNDER_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_RAW_INTR_STAT_RX_UNDER_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_RAW_INTR_STAT_RX_OVER_LSB   1
#define	ALT_I2C_RAW_INTR_STAT_RX_OVER_MSB   1
#define	ALT_I2C_RAW_INTR_STAT_RX_OVER_WIDTH   1
#define	ALT_I2C_RAW_INTR_STAT_RX_OVER_SET_MSK   0x00000002
#define	ALT_I2C_RAW_INTR_STAT_RX_OVER_CLR_MSK   0xfffffffd
#define	ALT_I2C_RAW_INTR_STAT_RX_OVER_RESET   0x0
#define	ALT_I2C_RAW_INTR_STAT_RX_OVER_GET(value)   (((value) & 0x00000002) >> 1)
#define	ALT_I2C_RAW_INTR_STAT_RX_OVER_SET(value)   (((value) << 1) & 0x00000002)
#define	ALT_I2C_RAW_INTR_STAT_RX_FULL_LSB   2
#define	ALT_I2C_RAW_INTR_STAT_RX_FULL_MSB   2
#define	ALT_I2C_RAW_INTR_STAT_RX_FULL_WIDTH   1
#define	ALT_I2C_RAW_INTR_STAT_RX_FULL_SET_MSK   0x00000004
#define	ALT_I2C_RAW_INTR_STAT_RX_FULL_CLR_MSK   0xfffffffb
#define	ALT_I2C_RAW_INTR_STAT_RX_FULL_RESET   0x0
#define	ALT_I2C_RAW_INTR_STAT_RX_FULL_GET(value)   (((value) & 0x00000004) >> 2)
#define	ALT_I2C_RAW_INTR_STAT_RX_FULL_SET(value)   (((value) << 2) & 0x00000004)
#define	ALT_I2C_RAW_INTR_STAT_TX_OVER_LSB   3
#define	ALT_I2C_RAW_INTR_STAT_TX_OVER_MSB   3
#define	ALT_I2C_RAW_INTR_STAT_TX_OVER_WIDTH   1
#define	ALT_I2C_RAW_INTR_STAT_TX_OVER_SET_MSK   0x00000008
#define	ALT_I2C_RAW_INTR_STAT_TX_OVER_CLR_MSK   0xfffffff7
#define	ALT_I2C_RAW_INTR_STAT_TX_OVER_RESET   0x0
#define	ALT_I2C_RAW_INTR_STAT_TX_OVER_GET(value)   (((value) & 0x00000008) >> 3)
#define	ALT_I2C_RAW_INTR_STAT_TX_OVER_SET(value)   (((value) << 3) & 0x00000008)
#define	ALT_I2C_RAW_INTR_STAT_TX_EMPTY_LSB   4
#define	ALT_I2C_RAW_INTR_STAT_TX_EMPTY_MSB   4
#define	ALT_I2C_RAW_INTR_STAT_TX_EMPTY_WIDTH   1
#define	ALT_I2C_RAW_INTR_STAT_TX_EMPTY_SET_MSK   0x00000010
#define	ALT_I2C_RAW_INTR_STAT_TX_EMPTY_CLR_MSK   0xffffffef
#define	ALT_I2C_RAW_INTR_STAT_TX_EMPTY_RESET   0x0
#define	ALT_I2C_RAW_INTR_STAT_TX_EMPTY_GET(value)   (((value) & 0x00000010) >> 4)
#define	ALT_I2C_RAW_INTR_STAT_TX_EMPTY_SET(value)   (((value) << 4) & 0x00000010)
#define	ALT_I2C_RAW_INTR_STAT_RD_REQ_LSB   5
#define	ALT_I2C_RAW_INTR_STAT_RD_REQ_MSB   5
#define	ALT_I2C_RAW_INTR_STAT_RD_REQ_WIDTH   1
#define	ALT_I2C_RAW_INTR_STAT_RD_REQ_SET_MSK   0x00000020
#define	ALT_I2C_RAW_INTR_STAT_RD_REQ_CLR_MSK   0xffffffdf
#define	ALT_I2C_RAW_INTR_STAT_RD_REQ_RESET   0x0
#define	ALT_I2C_RAW_INTR_STAT_RD_REQ_GET(value)   (((value) & 0x00000020) >> 5)
#define	ALT_I2C_RAW_INTR_STAT_RD_REQ_SET(value)   (((value) << 5) & 0x00000020)
#define	ALT_I2C_RAW_INTR_STAT_TX_ABRT_LSB   6
#define	ALT_I2C_RAW_INTR_STAT_TX_ABRT_MSB   6
#define	ALT_I2C_RAW_INTR_STAT_TX_ABRT_WIDTH   1
#define	ALT_I2C_RAW_INTR_STAT_TX_ABRT_SET_MSK   0x00000040
#define	ALT_I2C_RAW_INTR_STAT_TX_ABRT_CLR_MSK   0xffffffbf
#define	ALT_I2C_RAW_INTR_STAT_TX_ABRT_RESET   0x0
#define	ALT_I2C_RAW_INTR_STAT_TX_ABRT_GET(value)   (((value) & 0x00000040) >> 6)
#define	ALT_I2C_RAW_INTR_STAT_TX_ABRT_SET(value)   (((value) << 6) & 0x00000040)
#define	ALT_I2C_RAW_INTR_STAT_RX_DONE_LSB   7
#define	ALT_I2C_RAW_INTR_STAT_RX_DONE_MSB   7
#define	ALT_I2C_RAW_INTR_STAT_RX_DONE_WIDTH   1
#define	ALT_I2C_RAW_INTR_STAT_RX_DONE_SET_MSK   0x00000080
#define	ALT_I2C_RAW_INTR_STAT_RX_DONE_CLR_MSK   0xffffff7f
#define	ALT_I2C_RAW_INTR_STAT_RX_DONE_RESET   0x0
#define	ALT_I2C_RAW_INTR_STAT_RX_DONE_GET(value)   (((value) & 0x00000080) >> 7)
#define	ALT_I2C_RAW_INTR_STAT_RX_DONE_SET(value)   (((value) << 7) & 0x00000080)
#define	ALT_I2C_RAW_INTR_STAT_ACTIVITY_LSB   8
#define	ALT_I2C_RAW_INTR_STAT_ACTIVITY_MSB   8
#define	ALT_I2C_RAW_INTR_STAT_ACTIVITY_WIDTH   1
#define	ALT_I2C_RAW_INTR_STAT_ACTIVITY_SET_MSK   0x00000100
#define	ALT_I2C_RAW_INTR_STAT_ACTIVITY_CLR_MSK   0xfffffeff
#define	ALT_I2C_RAW_INTR_STAT_ACTIVITY_RESET   0x0
#define	ALT_I2C_RAW_INTR_STAT_ACTIVITY_GET(value)   (((value) & 0x00000100) >> 8)
#define	ALT_I2C_RAW_INTR_STAT_ACTIVITY_SET(value)   (((value) << 8) & 0x00000100)
#define	ALT_I2C_RAW_INTR_STAT_STOP_DET_LSB   9
#define	ALT_I2C_RAW_INTR_STAT_STOP_DET_MSB   9
#define	ALT_I2C_RAW_INTR_STAT_STOP_DET_WIDTH   1
#define	ALT_I2C_RAW_INTR_STAT_STOP_DET_SET_MSK   0x00000200
#define	ALT_I2C_RAW_INTR_STAT_STOP_DET_CLR_MSK   0xfffffdff
#define	ALT_I2C_RAW_INTR_STAT_STOP_DET_RESET   0x0
#define	ALT_I2C_RAW_INTR_STAT_STOP_DET_GET(value)   (((value) & 0x00000200) >> 9)
#define	ALT_I2C_RAW_INTR_STAT_STOP_DET_SET(value)   (((value) << 9) & 0x00000200)
#define	ALT_I2C_RAW_INTR_STAT_START_DET_LSB   10
#define	ALT_I2C_RAW_INTR_STAT_START_DET_MSB   10
#define	ALT_I2C_RAW_INTR_STAT_START_DET_WIDTH   1
#define	ALT_I2C_RAW_INTR_STAT_START_DET_SET_MSK   0x00000400
#define	ALT_I2C_RAW_INTR_STAT_START_DET_CLR_MSK   0xfffffbff
#define	ALT_I2C_RAW_INTR_STAT_START_DET_RESET   0x0
#define	ALT_I2C_RAW_INTR_STAT_START_DET_GET(value)   (((value) & 0x00000400) >> 10)
#define	ALT_I2C_RAW_INTR_STAT_START_DET_SET(value)   (((value) << 10) & 0x00000400)
#define	ALT_I2C_RAW_INTR_STAT_GEN_CALL_LSB   11
#define	ALT_I2C_RAW_INTR_STAT_GEN_CALL_MSB   11
#define	ALT_I2C_RAW_INTR_STAT_GEN_CALL_WIDTH   1
#define	ALT_I2C_RAW_INTR_STAT_GEN_CALL_SET_MSK   0x00000800
#define	ALT_I2C_RAW_INTR_STAT_GEN_CALL_CLR_MSK   0xfffff7ff
#define	ALT_I2C_RAW_INTR_STAT_GEN_CALL_RESET   0x0
#define	ALT_I2C_RAW_INTR_STAT_GEN_CALL_GET(value)   (((value) & 0x00000800) >> 11)
#define	ALT_I2C_RAW_INTR_STAT_GEN_CALL_SET(value)   (((value) << 11) & 0x00000800)
#define	ALT_I2C_RAW_INTR_STAT_OFST   0x34
#define	ALT_I2C_RAW_INTR_STAT_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_RAW_INTR_STAT_OFST))
#define	ALT_I2C_RX_TL_RX_TL_LSB   0
#define	ALT_I2C_RX_TL_RX_TL_MSB   7
#define	ALT_I2C_RX_TL_RX_TL_WIDTH   8
#define	ALT_I2C_RX_TL_RX_TL_SET_MSK   0x000000ff
#define	ALT_I2C_RX_TL_RX_TL_CLR_MSK   0xffffff00
#define	ALT_I2C_RX_TL_RX_TL_RESET   0x0
#define	ALT_I2C_RX_TL_RX_TL_GET(value)   (((value) & 0x000000ff) >> 0)
#define	ALT_I2C_RX_TL_RX_TL_SET(value)   (((value) << 0) & 0x000000ff)
#define	ALT_I2C_RX_TL_OFST   0x38
#define	ALT_I2C_RX_TL_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_RX_TL_OFST))
#define	ALT_I2C_TX_TL_TX_TL_LSB   0
#define	ALT_I2C_TX_TL_TX_TL_MSB   7
#define	ALT_I2C_TX_TL_TX_TL_WIDTH   8
#define	ALT_I2C_TX_TL_TX_TL_SET_MSK   0x000000ff
#define	ALT_I2C_TX_TL_TX_TL_CLR_MSK   0xffffff00
#define	ALT_I2C_TX_TL_TX_TL_RESET   0x0
#define	ALT_I2C_TX_TL_TX_TL_GET(value)   (((value) & 0x000000ff) >> 0)
#define	ALT_I2C_TX_TL_TX_TL_SET(value)   (((value) << 0) & 0x000000ff)
#define	ALT_I2C_TX_TL_OFST   0x3c
#define	ALT_I2C_TX_TL_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_TX_TL_OFST))
#define	ALT_I2C_CLR_INTR_CLR_INTR_LSB   0
#define	ALT_I2C_CLR_INTR_CLR_INTR_MSB   0
#define	ALT_I2C_CLR_INTR_CLR_INTR_WIDTH   1
#define	ALT_I2C_CLR_INTR_CLR_INTR_SET_MSK   0x00000001
#define	ALT_I2C_CLR_INTR_CLR_INTR_CLR_MSK   0xfffffffe
#define	ALT_I2C_CLR_INTR_CLR_INTR_RESET   0x0
#define	ALT_I2C_CLR_INTR_CLR_INTR_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_CLR_INTR_CLR_INTR_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_CLR_INTR_OFST   0x40
#define	ALT_I2C_CLR_INTR_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_INTR_OFST))
#define	ALT_I2C_CLR_RX_UNDER_CLR_RX_UNDER_LSB   0
#define	ALT_I2C_CLR_RX_UNDER_CLR_RX_UNDER_MSB   0
#define	ALT_I2C_CLR_RX_UNDER_CLR_RX_UNDER_WIDTH   1
#define	ALT_I2C_CLR_RX_UNDER_CLR_RX_UNDER_SET_MSK   0x00000001
#define	ALT_I2C_CLR_RX_UNDER_CLR_RX_UNDER_CLR_MSK   0xfffffffe
#define	ALT_I2C_CLR_RX_UNDER_CLR_RX_UNDER_RESET   0x0
#define	ALT_I2C_CLR_RX_UNDER_CLR_RX_UNDER_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_CLR_RX_UNDER_CLR_RX_UNDER_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_CLR_RX_UNDER_OFST   0x44
#define	ALT_I2C_CLR_RX_UNDER_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_RX_UNDER_OFST))
#define	ALT_I2C_CLR_RX_OVER_CLR_RX_OVER_LSB   0
#define	ALT_I2C_CLR_RX_OVER_CLR_RX_OVER_MSB   0
#define	ALT_I2C_CLR_RX_OVER_CLR_RX_OVER_WIDTH   1
#define	ALT_I2C_CLR_RX_OVER_CLR_RX_OVER_SET_MSK   0x00000001
#define	ALT_I2C_CLR_RX_OVER_CLR_RX_OVER_CLR_MSK   0xfffffffe
#define	ALT_I2C_CLR_RX_OVER_CLR_RX_OVER_RESET   0x0
#define	ALT_I2C_CLR_RX_OVER_CLR_RX_OVER_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_CLR_RX_OVER_CLR_RX_OVER_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_CLR_RX_OVER_OFST   0x48
#define	ALT_I2C_CLR_RX_OVER_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_RX_OVER_OFST))
#define	ALT_I2C_CLR_TX_OVER_CLR_TX_OVER_LSB   0
#define	ALT_I2C_CLR_TX_OVER_CLR_TX_OVER_MSB   0
#define	ALT_I2C_CLR_TX_OVER_CLR_TX_OVER_WIDTH   1
#define	ALT_I2C_CLR_TX_OVER_CLR_TX_OVER_SET_MSK   0x00000001
#define	ALT_I2C_CLR_TX_OVER_CLR_TX_OVER_CLR_MSK   0xfffffffe
#define	ALT_I2C_CLR_TX_OVER_CLR_TX_OVER_RESET   0x0
#define	ALT_I2C_CLR_TX_OVER_CLR_TX_OVER_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_CLR_TX_OVER_CLR_TX_OVER_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_CLR_TX_OVER_OFST   0x4c
#define	ALT_I2C_CLR_TX_OVER_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_TX_OVER_OFST))
#define	ALT_I2C_CLR_RD_REQ_CLR_RD_REQ_LSB   0
#define	ALT_I2C_CLR_RD_REQ_CLR_RD_REQ_MSB   0
#define	ALT_I2C_CLR_RD_REQ_CLR_RD_REQ_WIDTH   1
#define	ALT_I2C_CLR_RD_REQ_CLR_RD_REQ_SET_MSK   0x00000001
#define	ALT_I2C_CLR_RD_REQ_CLR_RD_REQ_CLR_MSK   0xfffffffe
#define	ALT_I2C_CLR_RD_REQ_CLR_RD_REQ_RESET   0x0
#define	ALT_I2C_CLR_RD_REQ_CLR_RD_REQ_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_CLR_RD_REQ_CLR_RD_REQ_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_CLR_RD_REQ_OFST   0x50
#define	ALT_I2C_CLR_RD_REQ_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_RD_REQ_OFST))
#define	ALT_I2C_CLR_TX_ABRT_CLR_TX_ABT_LSB   0
#define	ALT_I2C_CLR_TX_ABRT_CLR_TX_ABT_MSB   0
#define	ALT_I2C_CLR_TX_ABRT_CLR_TX_ABT_WIDTH   1
#define	ALT_I2C_CLR_TX_ABRT_CLR_TX_ABT_SET_MSK   0x00000001
#define	ALT_I2C_CLR_TX_ABRT_CLR_TX_ABT_CLR_MSK   0xfffffffe
#define	ALT_I2C_CLR_TX_ABRT_CLR_TX_ABT_RESET   0x0
#define	ALT_I2C_CLR_TX_ABRT_CLR_TX_ABT_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_CLR_TX_ABRT_CLR_TX_ABT_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_CLR_TX_ABRT_OFST   0x54
#define	ALT_I2C_CLR_TX_ABRT_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_TX_ABRT_OFST))
#define	ALT_I2C_CLR_RX_DONE_CLR_RX_DONE_LSB   0
#define	ALT_I2C_CLR_RX_DONE_CLR_RX_DONE_MSB   0
#define	ALT_I2C_CLR_RX_DONE_CLR_RX_DONE_WIDTH   1
#define	ALT_I2C_CLR_RX_DONE_CLR_RX_DONE_SET_MSK   0x00000001
#define	ALT_I2C_CLR_RX_DONE_CLR_RX_DONE_CLR_MSK   0xfffffffe
#define	ALT_I2C_CLR_RX_DONE_CLR_RX_DONE_RESET   0x0
#define	ALT_I2C_CLR_RX_DONE_CLR_RX_DONE_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_CLR_RX_DONE_CLR_RX_DONE_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_CLR_RX_DONE_OFST   0x58
#define	ALT_I2C_CLR_RX_DONE_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_RX_DONE_OFST))
#define	ALT_I2C_CLR_ACTIVITY_CLR_ACTIVITY_LSB   0
#define	ALT_I2C_CLR_ACTIVITY_CLR_ACTIVITY_MSB   0
#define	ALT_I2C_CLR_ACTIVITY_CLR_ACTIVITY_WIDTH   1
#define	ALT_I2C_CLR_ACTIVITY_CLR_ACTIVITY_SET_MSK   0x00000001
#define	ALT_I2C_CLR_ACTIVITY_CLR_ACTIVITY_CLR_MSK   0xfffffffe
#define	ALT_I2C_CLR_ACTIVITY_CLR_ACTIVITY_RESET   0x0
#define	ALT_I2C_CLR_ACTIVITY_CLR_ACTIVITY_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_CLR_ACTIVITY_CLR_ACTIVITY_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_CLR_ACTIVITY_OFST   0x5c
#define	ALT_I2C_CLR_ACTIVITY_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_ACTIVITY_OFST))
#define	ALT_I2C_CLR_STOP_DET_CLR_STOP_DET_LSB   0
#define	ALT_I2C_CLR_STOP_DET_CLR_STOP_DET_MSB   0
#define	ALT_I2C_CLR_STOP_DET_CLR_STOP_DET_WIDTH   1
#define	ALT_I2C_CLR_STOP_DET_CLR_STOP_DET_SET_MSK   0x00000001
#define	ALT_I2C_CLR_STOP_DET_CLR_STOP_DET_CLR_MSK   0xfffffffe
#define	ALT_I2C_CLR_STOP_DET_CLR_STOP_DET_RESET   0x0
#define	ALT_I2C_CLR_STOP_DET_CLR_STOP_DET_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_CLR_STOP_DET_CLR_STOP_DET_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_CLR_STOP_DET_OFST   0x60
#define	ALT_I2C_CLR_STOP_DET_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_STOP_DET_OFST))
#define	ALT_I2C_CLR_START_DET_CLR_START_DET_LSB   0
#define	ALT_I2C_CLR_START_DET_CLR_START_DET_MSB   0
#define	ALT_I2C_CLR_START_DET_CLR_START_DET_WIDTH   1
#define	ALT_I2C_CLR_START_DET_CLR_START_DET_SET_MSK   0x00000001
#define	ALT_I2C_CLR_START_DET_CLR_START_DET_CLR_MSK   0xfffffffe
#define	ALT_I2C_CLR_START_DET_CLR_START_DET_RESET   0x0
#define	ALT_I2C_CLR_START_DET_CLR_START_DET_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_CLR_START_DET_CLR_START_DET_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_CLR_START_DET_OFST   0x64
#define	ALT_I2C_CLR_START_DET_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_START_DET_OFST))
#define	ALT_I2C_CLR_GEN_CALL_CLR_GEN_CALL_LSB   0
#define	ALT_I2C_CLR_GEN_CALL_CLR_GEN_CALL_MSB   0
#define	ALT_I2C_CLR_GEN_CALL_CLR_GEN_CALL_WIDTH   1
#define	ALT_I2C_CLR_GEN_CALL_CLR_GEN_CALL_SET_MSK   0x00000001
#define	ALT_I2C_CLR_GEN_CALL_CLR_GEN_CALL_CLR_MSK   0xfffffffe
#define	ALT_I2C_CLR_GEN_CALL_CLR_GEN_CALL_RESET   0x0
#define	ALT_I2C_CLR_GEN_CALL_CLR_GEN_CALL_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_CLR_GEN_CALL_CLR_GEN_CALL_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_CLR_GEN_CALL_OFST   0x68
#define	ALT_I2C_CLR_GEN_CALL_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_CLR_GEN_CALL_OFST))
#define	ALT_I2C_EN_EN_E_DIS   0x0
#define	ALT_I2C_EN_EN_E_EN   0x1
#define	ALT_I2C_EN_EN_LSB   0
#define	ALT_I2C_EN_EN_MSB   0
#define	ALT_I2C_EN_EN_WIDTH   1
#define	ALT_I2C_EN_EN_SET_MSK   0x00000001
#define	ALT_I2C_EN_EN_CLR_MSK   0xfffffffe
#define	ALT_I2C_EN_EN_RESET   0x0
#define	ALT_I2C_EN_EN_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_EN_EN_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_EN_TXABT_LSB   1
#define	ALT_I2C_EN_TXABT_MSB   1
#define	ALT_I2C_EN_TXABT_WIDTH   1
#define	ALT_I2C_EN_TXABT_SET_MSK   0x00000002
#define	ALT_I2C_EN_TXABT_CLR_MSK   0xfffffffd
#define	ALT_I2C_EN_TXABT_RESET   0x0
#define	ALT_I2C_EN_TXABT_GET(value)   (((value) & 0x00000002) >> 1)
#define	ALT_I2C_EN_TXABT_SET(value)   (((value) << 1) & 0x00000002)
#define	ALT_I2C_EN_OFST   0x6c
#define	ALT_I2C_EN_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_EN_OFST))
#define	ALT_I2C_STAT_ACTIVITY_LSB   0
#define	ALT_I2C_STAT_ACTIVITY_MSB   0
#define	ALT_I2C_STAT_ACTIVITY_WIDTH   1
#define	ALT_I2C_STAT_ACTIVITY_SET_MSK   0x00000001
#define	ALT_I2C_STAT_ACTIVITY_CLR_MSK   0xfffffffe
#define	ALT_I2C_STAT_ACTIVITY_RESET   0x0
#define	ALT_I2C_STAT_ACTIVITY_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_STAT_ACTIVITY_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_STAT_TFNF_E_FULL   0x0
#define	ALT_I2C_STAT_TFNF_E_NOTFULL   0x1
#define	ALT_I2C_STAT_TFNF_LSB   1
#define	ALT_I2C_STAT_TFNF_MSB   1
#define	ALT_I2C_STAT_TFNF_WIDTH   1
#define	ALT_I2C_STAT_TFNF_SET_MSK   0x00000002
#define	ALT_I2C_STAT_TFNF_CLR_MSK   0xfffffffd
#define	ALT_I2C_STAT_TFNF_RESET   0x1
#define	ALT_I2C_STAT_TFNF_GET(value)   (((value) & 0x00000002) >> 1)
#define	ALT_I2C_STAT_TFNF_SET(value)   (((value) << 1) & 0x00000002)
#define	ALT_I2C_STAT_TFE_E_NOTEMPTY   0x0
#define	ALT_I2C_STAT_TFE_E_EMPTY   0x1
#define	ALT_I2C_STAT_TFE_LSB   2
#define	ALT_I2C_STAT_TFE_MSB   2
#define	ALT_I2C_STAT_TFE_WIDTH   1
#define	ALT_I2C_STAT_TFE_SET_MSK   0x00000004
#define	ALT_I2C_STAT_TFE_CLR_MSK   0xfffffffb
#define	ALT_I2C_STAT_TFE_RESET   0x1
#define	ALT_I2C_STAT_TFE_GET(value)   (((value) & 0x00000004) >> 2)
#define	ALT_I2C_STAT_TFE_SET(value)   (((value) << 2) & 0x00000004)
#define	ALT_I2C_STAT_RFNE_E_EMPTY   0x0
#define	ALT_I2C_STAT_RFNE_E_NOTEMPTY   0x1
#define	ALT_I2C_STAT_RFNE_LSB   3
#define	ALT_I2C_STAT_RFNE_MSB   3
#define	ALT_I2C_STAT_RFNE_WIDTH   1
#define	ALT_I2C_STAT_RFNE_SET_MSK   0x00000008
#define	ALT_I2C_STAT_RFNE_CLR_MSK   0xfffffff7
#define	ALT_I2C_STAT_RFNE_RESET   0x0
#define	ALT_I2C_STAT_RFNE_GET(value)   (((value) & 0x00000008) >> 3)
#define	ALT_I2C_STAT_RFNE_SET(value)   (((value) << 3) & 0x00000008)
#define	ALT_I2C_STAT_RFF_E_NOTFULL   0x0
#define	ALT_I2C_STAT_RFF_E_FULL   0x1
#define	ALT_I2C_STAT_RFF_LSB   4
#define	ALT_I2C_STAT_RFF_MSB   4
#define	ALT_I2C_STAT_RFF_WIDTH   1
#define	ALT_I2C_STAT_RFF_SET_MSK   0x00000010
#define	ALT_I2C_STAT_RFF_CLR_MSK   0xffffffef
#define	ALT_I2C_STAT_RFF_RESET   0x0
#define	ALT_I2C_STAT_RFF_GET(value)   (((value) & 0x00000010) >> 4)
#define	ALT_I2C_STAT_RFF_SET(value)   (((value) << 4) & 0x00000010)
#define	ALT_I2C_STAT_MST_ACTIVITY_E_IDLE   0x0
#define	ALT_I2C_STAT_MST_ACTIVITY_E_NOTIDLE   0x1
#define	ALT_I2C_STAT_MST_ACTIVITY_LSB   5
#define	ALT_I2C_STAT_MST_ACTIVITY_MSB   5
#define	ALT_I2C_STAT_MST_ACTIVITY_WIDTH   1
#define	ALT_I2C_STAT_MST_ACTIVITY_SET_MSK   0x00000020
#define	ALT_I2C_STAT_MST_ACTIVITY_CLR_MSK   0xffffffdf
#define	ALT_I2C_STAT_MST_ACTIVITY_RESET   0x0
#define	ALT_I2C_STAT_MST_ACTIVITY_GET(value)   (((value) & 0x00000020) >> 5)
#define	ALT_I2C_STAT_MST_ACTIVITY_SET(value)   (((value) << 5) & 0x00000020)
#define	ALT_I2C_STAT_SLV_ACTIVITY_E_IDLE   0x0
#define	ALT_I2C_STAT_SLV_ACTIVITY_E_NOTIDLE   0x1
#define	ALT_I2C_STAT_SLV_ACTIVITY_LSB   6
#define	ALT_I2C_STAT_SLV_ACTIVITY_MSB   6
#define	ALT_I2C_STAT_SLV_ACTIVITY_WIDTH   1
#define	ALT_I2C_STAT_SLV_ACTIVITY_SET_MSK   0x00000040
#define	ALT_I2C_STAT_SLV_ACTIVITY_CLR_MSK   0xffffffbf
#define	ALT_I2C_STAT_SLV_ACTIVITY_RESET   0x0
#define	ALT_I2C_STAT_SLV_ACTIVITY_GET(value)   (((value) & 0x00000040) >> 6)
#define	ALT_I2C_STAT_SLV_ACTIVITY_SET(value)   (((value) << 6) & 0x00000040)
#define	ALT_I2C_STAT_OFST   0x70
#define	ALT_I2C_STAT_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_STAT_OFST))
#define	ALT_I2C_TXFLR_TXFLR_LSB   0
#define	ALT_I2C_TXFLR_TXFLR_MSB   6
#define	ALT_I2C_TXFLR_TXFLR_WIDTH   7
#define	ALT_I2C_TXFLR_TXFLR_SET_MSK   0x0000007f
#define	ALT_I2C_TXFLR_TXFLR_CLR_MSK   0xffffff80
#define	ALT_I2C_TXFLR_TXFLR_RESET   0x0
#define	ALT_I2C_TXFLR_TXFLR_GET(value)   (((value) & 0x0000007f) >> 0)
#define	ALT_I2C_TXFLR_TXFLR_SET(value)   (((value) << 0) & 0x0000007f)
#define	ALT_I2C_TXFLR_OFST   0x74
#define	ALT_I2C_TXFLR_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_TXFLR_OFST))
#define	ALT_I2C_RXFLR_RXFLR_LSB   0
#define	ALT_I2C_RXFLR_RXFLR_MSB   6
#define	ALT_I2C_RXFLR_RXFLR_WIDTH   7
#define	ALT_I2C_RXFLR_RXFLR_SET_MSK   0x0000007f
#define	ALT_I2C_RXFLR_RXFLR_CLR_MSK   0xffffff80
#define	ALT_I2C_RXFLR_RXFLR_RESET   0x0
#define	ALT_I2C_RXFLR_RXFLR_GET(value)   (((value) & 0x0000007f) >> 0)
#define	ALT_I2C_RXFLR_RXFLR_SET(value)   (((value) << 0) & 0x0000007f)
#define	ALT_I2C_RXFLR_OFST   0x78
#define	ALT_I2C_RXFLR_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_RXFLR_OFST))
#define	ALT_I2C_SDA_HOLD_IC_SDA_HOLD_LSB   0
#define	ALT_I2C_SDA_HOLD_IC_SDA_HOLD_MSB   15
#define	ALT_I2C_SDA_HOLD_IC_SDA_HOLD_WIDTH   16
#define	ALT_I2C_SDA_HOLD_IC_SDA_HOLD_SET_MSK   0x0000ffff
#define	ALT_I2C_SDA_HOLD_IC_SDA_HOLD_CLR_MSK   0xffff0000
#define	ALT_I2C_SDA_HOLD_IC_SDA_HOLD_RESET   0x1
#define	ALT_I2C_SDA_HOLD_IC_SDA_HOLD_GET(value)   (((value) & 0x0000ffff) >> 0)
#define	ALT_I2C_SDA_HOLD_IC_SDA_HOLD_SET(value)   (((value) << 0) & 0x0000ffff)
#define	ALT_I2C_SDA_HOLD_OFST   0x7c
#define	ALT_I2C_SDA_HOLD_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_SDA_HOLD_OFST))
#define	ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_LSB   0
#define	ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_MSB   0
#define	ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_WIDTH   1
#define	ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_SET_MSK   0x00000001
#define	ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_CLR_MSK   0xfffffffe
#define	ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_RESET   0x0
#define	ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_7B_ADDR_NOACK_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_LSB   1
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_MSB   1
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_WIDTH   1
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_SET_MSK   0x00000002
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_CLR_MSK   0xfffffffd
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_RESET   0x0
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_GET(value)   (((value) & 0x00000002) >> 1)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR1_NOACK_SET(value)   (((value) << 1) & 0x00000002)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_LSB   2
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_MSB   2
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_WIDTH   1
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_SET_MSK   0x00000004
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_CLR_MSK   0xfffffffb
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_RESET   0x0
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_GET(value)   (((value) & 0x00000004) >> 2)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10ADDR2_NOACK_SET(value)   (((value) << 2) & 0x00000004)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_LSB   3
#define	ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_MSB   3
#define	ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_WIDTH   1
#define	ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_SET_MSK   0x00000008
#define	ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_CLR_MSK   0xfffffff7
#define	ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_RESET   0x0
#define	ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_GET(value)   (((value) & 0x00000008) >> 3)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_TXDATA_NOACK_SET(value)   (((value) << 3) & 0x00000008)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_LSB   4
#define	ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_MSB   4
#define	ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_WIDTH   1
#define	ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_SET_MSK   0x00000010
#define	ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_CLR_MSK   0xffffffef
#define	ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_RESET   0x0
#define	ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_GET(value)   (((value) & 0x00000010) >> 4)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_NOACK_SET(value)   (((value) << 4) & 0x00000010)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_LSB   5
#define	ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_MSB   5
#define	ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_WIDTH   1
#define	ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_SET_MSK   0x00000020
#define	ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_CLR_MSK   0xffffffdf
#define	ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_RESET   0x0
#define	ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_GET(value)   (((value) & 0x00000020) >> 5)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_GCALL_RD_SET(value)   (((value) << 5) & 0x00000020)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_LSB   6
#define	ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_MSB   6
#define	ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_WIDTH   1
#define	ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_SET_MSK   0x00000040
#define	ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_CLR_MSK   0xffffffbf
#define	ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_RESET   0x0
#define	ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_GET(value)   (((value) & 0x00000040) >> 6)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_HS_ACKDET_SET(value)   (((value) << 6) & 0x00000040)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_LSB   7
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_MSB   7
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_WIDTH   1
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_SET_MSK   0x00000080
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_CLR_MSK   0xffffff7f
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_RESET   0x0
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_GET(value)   (((value) & 0x00000080) >> 7)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_ACKDET_SET(value)   (((value) << 7) & 0x00000080)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_LSB   8
#define	ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_MSB   8
#define	ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_WIDTH   1
#define	ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_SET_MSK   0x00000100
#define	ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_CLR_MSK   0xfffffeff
#define	ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_RESET   0x0
#define	ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_GET(value)   (((value) & 0x00000100) >> 8)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_HS_NORSTRT_SET(value)   (((value) << 8) & 0x00000100)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_LSB   9
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_MSB   9
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_WIDTH   1
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_SET_MSK   0x00000200
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_CLR_MSK   0xfffffdff
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_RESET   0x0
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_GET(value)   (((value) & 0x00000200) >> 9)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SBYTE_NORSTRT_SET(value)   (((value) << 9) & 0x00000200)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_LSB   10
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_MSB   10
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_WIDTH   1
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_SET_MSK   0x00000400
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_CLR_MSK   0xfffffbff
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_RESET   0x0
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_GET(value)   (((value) & 0x00000400) >> 10)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_10B_RD_NORSTRT_SET(value)   (((value) << 10) & 0x00000400)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_LSB   11
#define	ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_MSB   11
#define	ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_WIDTH   1
#define	ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_SET_MSK   0x00000800
#define	ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_CLR_MSK   0xfffff7ff
#define	ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_RESET   0x0
#define	ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_GET(value)   (((value) & 0x00000800) >> 11)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_MST_DIS_SET(value)   (((value) << 11) & 0x00000800)
#define	ALT_I2C_TX_ABRT_SRC_ARB_LOST_LSB   12
#define	ALT_I2C_TX_ABRT_SRC_ARB_LOST_MSB   12
#define	ALT_I2C_TX_ABRT_SRC_ARB_LOST_WIDTH   1
#define	ALT_I2C_TX_ABRT_SRC_ARB_LOST_SET_MSK   0x00001000
#define	ALT_I2C_TX_ABRT_SRC_ARB_LOST_CLR_MSK   0xffffefff
#define	ALT_I2C_TX_ABRT_SRC_ARB_LOST_RESET   0x0
#define	ALT_I2C_TX_ABRT_SRC_ARB_LOST_GET(value)   (((value) & 0x00001000) >> 12)
#define	ALT_I2C_TX_ABRT_SRC_ARB_LOST_SET(value)   (((value) << 12) & 0x00001000)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_LSB   13
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_MSB   13
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_WIDTH   1
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_SET_MSK   0x00002000
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_CLR_MSK   0xffffdfff
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_RESET   0x0
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_GET(value)   (((value) & 0x00002000) >> 13)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLVFLUSH_TXFIFO_SET(value)   (((value) << 13) & 0x00002000)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_LSB   14
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_MSB   14
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_WIDTH   1
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_SET_MSK   0x00004000
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_CLR_MSK   0xffffbfff
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_RESET   0x0
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_GET(value)   (((value) & 0x00004000) >> 14)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLV_ARBLOST_SET(value)   (((value) << 14) & 0x00004000)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_LSB   15
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_MSB   15
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_WIDTH   1
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_SET_MSK   0x00008000
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_CLR_MSK   0xffff7fff
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_RESET   0x0
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_GET(value)   (((value) & 0x00008000) >> 15)
#define	ALT_I2C_TX_ABRT_SRC_ABRT_SLVRD_INTX_SET(value)   (((value) << 15) & 0x00008000)
#define	ALT_I2C_TX_ABRT_SRC_OFST   0x80
#define	ALT_I2C_TX_ABRT_SRC_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_TX_ABRT_SRC_OFST))
#define	ALT_I2C_SLV_DATA_NACK_ONLY_NACK_E_AFTERDBYTE   0x1
#define	ALT_I2C_SLV_DATA_NACK_ONLY_NACK_E_NORM   0x0
#define	ALT_I2C_SLV_DATA_NACK_ONLY_NACK_LSB   0
#define	ALT_I2C_SLV_DATA_NACK_ONLY_NACK_MSB   0
#define	ALT_I2C_SLV_DATA_NACK_ONLY_NACK_WIDTH   1
#define	ALT_I2C_SLV_DATA_NACK_ONLY_NACK_SET_MSK   0x00000001
#define	ALT_I2C_SLV_DATA_NACK_ONLY_NACK_CLR_MSK   0xfffffffe
#define	ALT_I2C_SLV_DATA_NACK_ONLY_NACK_RESET   0x0
#define	ALT_I2C_SLV_DATA_NACK_ONLY_NACK_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_SLV_DATA_NACK_ONLY_NACK_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_SLV_DATA_NACK_ONLY_OFST   0x84
#define	ALT_I2C_SLV_DATA_NACK_ONLY_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_SLV_DATA_NACK_ONLY_OFST))
#define	ALT_I2C_DMA_CR_RDMAE_E_DIS   0x0
#define	ALT_I2C_DMA_CR_RDMAE_E_EN   0x1
#define	ALT_I2C_DMA_CR_RDMAE_LSB   0
#define	ALT_I2C_DMA_CR_RDMAE_MSB   0
#define	ALT_I2C_DMA_CR_RDMAE_WIDTH   1
#define	ALT_I2C_DMA_CR_RDMAE_SET_MSK   0x00000001
#define	ALT_I2C_DMA_CR_RDMAE_CLR_MSK   0xfffffffe
#define	ALT_I2C_DMA_CR_RDMAE_RESET   0x0
#define	ALT_I2C_DMA_CR_RDMAE_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_DMA_CR_RDMAE_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_DMA_CR_TDMAE_E_DIS   0x0
#define	ALT_I2C_DMA_CR_TDMAE_E_EN   0x1
#define	ALT_I2C_DMA_CR_TDMAE_LSB   1
#define	ALT_I2C_DMA_CR_TDMAE_MSB   1
#define	ALT_I2C_DMA_CR_TDMAE_WIDTH   1
#define	ALT_I2C_DMA_CR_TDMAE_SET_MSK   0x00000002
#define	ALT_I2C_DMA_CR_TDMAE_CLR_MSK   0xfffffffd
#define	ALT_I2C_DMA_CR_TDMAE_RESET   0x0
#define	ALT_I2C_DMA_CR_TDMAE_GET(value)   (((value) & 0x00000002) >> 1)
#define	ALT_I2C_DMA_CR_TDMAE_SET(value)   (((value) << 1) & 0x00000002)
#define	ALT_I2C_DMA_CR_OFST   0x88
#define	ALT_I2C_DMA_CR_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_DMA_CR_OFST))
#define	ALT_I2C_DMA_TDLR_DMATDL_LSB   0
#define	ALT_I2C_DMA_TDLR_DMATDL_MSB   5
#define	ALT_I2C_DMA_TDLR_DMATDL_WIDTH   6
#define	ALT_I2C_DMA_TDLR_DMATDL_SET_MSK   0x0000003f
#define	ALT_I2C_DMA_TDLR_DMATDL_CLR_MSK   0xffffffc0
#define	ALT_I2C_DMA_TDLR_DMATDL_RESET   0x0
#define	ALT_I2C_DMA_TDLR_DMATDL_GET(value)   (((value) & 0x0000003f) >> 0)
#define	ALT_I2C_DMA_TDLR_DMATDL_SET(value)   (((value) << 0) & 0x0000003f)
#define	ALT_I2C_DMA_TDLR_OFST   0x8c
#define	ALT_I2C_DMA_TDLR_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_DMA_TDLR_OFST))
#define	ALT_I2C_DMA_RDLR_DMARDL_LSB   0
#define	ALT_I2C_DMA_RDLR_DMARDL_MSB   5
#define	ALT_I2C_DMA_RDLR_DMARDL_WIDTH   6
#define	ALT_I2C_DMA_RDLR_DMARDL_SET_MSK   0x0000003f
#define	ALT_I2C_DMA_RDLR_DMARDL_CLR_MSK   0xffffffc0
#define	ALT_I2C_DMA_RDLR_DMARDL_RESET   0x0
#define	ALT_I2C_DMA_RDLR_DMARDL_GET(value)   (((value) & 0x0000003f) >> 0)
#define	ALT_I2C_DMA_RDLR_DMARDL_SET(value)   (((value) << 0) & 0x0000003f)
#define	ALT_I2C_DMA_RDLR_OFST   0x90
#define	ALT_I2C_DMA_RDLR_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_DMA_RDLR_OFST))
#define	ALT_I2C_SDA_SETUP_SDA_SETUP_LSB   0
#define	ALT_I2C_SDA_SETUP_SDA_SETUP_MSB   7
#define	ALT_I2C_SDA_SETUP_SDA_SETUP_WIDTH   8
#define	ALT_I2C_SDA_SETUP_SDA_SETUP_SET_MSK   0x000000ff
#define	ALT_I2C_SDA_SETUP_SDA_SETUP_CLR_MSK   0xffffff00
#define	ALT_I2C_SDA_SETUP_SDA_SETUP_RESET   0x64
#define	ALT_I2C_SDA_SETUP_SDA_SETUP_GET(value)   (((value) & 0x000000ff) >> 0)
#define	ALT_I2C_SDA_SETUP_SDA_SETUP_SET(value)   (((value) << 0) & 0x000000ff)
#define	ALT_I2C_SDA_SETUP_OFST   0x94
#define	ALT_I2C_SDA_SETUP_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_SDA_SETUP_OFST))
#define	ALT_I2C_ACK_GENERAL_CALL_ACK_GEN_CALL_E_NACK   0x0
#define	ALT_I2C_ACK_GENERAL_CALL_ACK_GEN_CALL_E_ACK   0x1
#define	ALT_I2C_ACK_GENERAL_CALL_ACK_GEN_CALL_LSB   0
#define	ALT_I2C_ACK_GENERAL_CALL_ACK_GEN_CALL_MSB   0
#define	ALT_I2C_ACK_GENERAL_CALL_ACK_GEN_CALL_WIDTH   1
#define	ALT_I2C_ACK_GENERAL_CALL_ACK_GEN_CALL_SET_MSK   0x00000001
#define	ALT_I2C_ACK_GENERAL_CALL_ACK_GEN_CALL_CLR_MSK   0xfffffffe
#define	ALT_I2C_ACK_GENERAL_CALL_ACK_GEN_CALL_RESET   0x1
#define	ALT_I2C_ACK_GENERAL_CALL_ACK_GEN_CALL_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_ACK_GENERAL_CALL_ACK_GEN_CALL_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_ACK_GENERAL_CALL_OFST   0x98
#define	ALT_I2C_ACK_GENERAL_CALL_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_ACK_GENERAL_CALL_OFST))
#define	ALT_I2C_EN_STAT_IC_EN_LSB   0
#define	ALT_I2C_EN_STAT_IC_EN_MSB   0
#define	ALT_I2C_EN_STAT_IC_EN_WIDTH   1
#define	ALT_I2C_EN_STAT_IC_EN_SET_MSK   0x00000001
#define	ALT_I2C_EN_STAT_IC_EN_CLR_MSK   0xfffffffe
#define	ALT_I2C_EN_STAT_IC_EN_RESET   0x0
#define	ALT_I2C_EN_STAT_IC_EN_GET(value)   (((value) & 0x00000001) >> 0)
#define	ALT_I2C_EN_STAT_IC_EN_SET(value)   (((value) << 0) & 0x00000001)
#define	ALT_I2C_EN_STAT_SLV_DISD_WHILE_BUSY_LSB   1
#define	ALT_I2C_EN_STAT_SLV_DISD_WHILE_BUSY_MSB   1
#define	ALT_I2C_EN_STAT_SLV_DISD_WHILE_BUSY_WIDTH   1
#define	ALT_I2C_EN_STAT_SLV_DISD_WHILE_BUSY_SET_MSK   0x00000002
#define	ALT_I2C_EN_STAT_SLV_DISD_WHILE_BUSY_CLR_MSK   0xfffffffd
#define	ALT_I2C_EN_STAT_SLV_DISD_WHILE_BUSY_RESET   0x0
#define	ALT_I2C_EN_STAT_SLV_DISD_WHILE_BUSY_GET(value)   (((value) & 0x00000002) >> 1)
#define	ALT_I2C_EN_STAT_SLV_DISD_WHILE_BUSY_SET(value)   (((value) << 1) & 0x00000002)
#define	ALT_I2C_EN_STAT_SLV_RX_DATA_LOST_LSB   2
#define	ALT_I2C_EN_STAT_SLV_RX_DATA_LOST_MSB   2
#define	ALT_I2C_EN_STAT_SLV_RX_DATA_LOST_WIDTH   1
#define	ALT_I2C_EN_STAT_SLV_RX_DATA_LOST_SET_MSK   0x00000004
#define	ALT_I2C_EN_STAT_SLV_RX_DATA_LOST_CLR_MSK   0xfffffffb
#define	ALT_I2C_EN_STAT_SLV_RX_DATA_LOST_RESET   0x0
#define	ALT_I2C_EN_STAT_SLV_RX_DATA_LOST_GET(value)   (((value) & 0x00000004) >> 2)
#define	ALT_I2C_EN_STAT_SLV_RX_DATA_LOST_SET(value)   (((value) << 2) & 0x00000004)
#define	ALT_I2C_EN_STAT_OFST   0x9c
#define	ALT_I2C_EN_STAT_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_EN_STAT_OFST))
#define	ALT_I2C_FS_SPKLEN_SPKLEN_LSB   0
#define	ALT_I2C_FS_SPKLEN_SPKLEN_MSB   7
#define	ALT_I2C_FS_SPKLEN_SPKLEN_WIDTH   8
#define	ALT_I2C_FS_SPKLEN_SPKLEN_SET_MSK   0x000000ff
#define	ALT_I2C_FS_SPKLEN_SPKLEN_CLR_MSK   0xffffff00
#define	ALT_I2C_FS_SPKLEN_SPKLEN_RESET   0x2
#define	ALT_I2C_FS_SPKLEN_SPKLEN_GET(value)   (((value) & 0x000000ff) >> 0)
#define	ALT_I2C_FS_SPKLEN_SPKLEN_SET(value)   (((value) << 0) & 0x000000ff)
#define	ALT_I2C_FS_SPKLEN_OFST   0xa0
#define	ALT_I2C_FS_SPKLEN_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_FS_SPKLEN_OFST))
#define	ALT_I2C_COMP_PARAM_1_APB_DATA_WIDTH_E_WIDTH32BITS   0x2
#define	ALT_I2C_COMP_PARAM_1_APB_DATA_WIDTH_LSB   0
#define	ALT_I2C_COMP_PARAM_1_APB_DATA_WIDTH_MSB   1
#define	ALT_I2C_COMP_PARAM_1_APB_DATA_WIDTH_WIDTH   2
#define	ALT_I2C_COMP_PARAM_1_APB_DATA_WIDTH_SET_MSK   0x00000003
#define	ALT_I2C_COMP_PARAM_1_APB_DATA_WIDTH_CLR_MSK   0xfffffffc
#define	ALT_I2C_COMP_PARAM_1_APB_DATA_WIDTH_RESET   0x2
#define	ALT_I2C_COMP_PARAM_1_APB_DATA_WIDTH_GET(value)   (((value) & 0x00000003) >> 0)
#define	ALT_I2C_COMP_PARAM_1_APB_DATA_WIDTH_SET(value)   (((value) << 0) & 0x00000003)
#define	ALT_I2C_COMP_PARAM_1_MAX_SPEED_MOD_E_FAST   0x2
#define	ALT_I2C_COMP_PARAM_1_MAX_SPEED_MOD_LSB   2
#define	ALT_I2C_COMP_PARAM_1_MAX_SPEED_MOD_MSB   3
#define	ALT_I2C_COMP_PARAM_1_MAX_SPEED_MOD_WIDTH   2
#define	ALT_I2C_COMP_PARAM_1_MAX_SPEED_MOD_SET_MSK   0x0000000c
#define	ALT_I2C_COMP_PARAM_1_MAX_SPEED_MOD_CLR_MSK   0xfffffff3
#define	ALT_I2C_COMP_PARAM_1_MAX_SPEED_MOD_RESET   0x2
#define	ALT_I2C_COMP_PARAM_1_MAX_SPEED_MOD_GET(value)   (((value) & 0x0000000c) >> 2)
#define	ALT_I2C_COMP_PARAM_1_MAX_SPEED_MOD_SET(value)   (((value) << 2) & 0x0000000c)
#define	ALT_I2C_COMP_PARAM_1_HC_COUNT_VALUES_E_RDWR   0x0
#define	ALT_I2C_COMP_PARAM_1_HC_COUNT_VALUES_LSB   4
#define	ALT_I2C_COMP_PARAM_1_HC_COUNT_VALUES_MSB   4
#define	ALT_I2C_COMP_PARAM_1_HC_COUNT_VALUES_WIDTH   1
#define	ALT_I2C_COMP_PARAM_1_HC_COUNT_VALUES_SET_MSK   0x00000010
#define	ALT_I2C_COMP_PARAM_1_HC_COUNT_VALUES_CLR_MSK   0xffffffef
#define	ALT_I2C_COMP_PARAM_1_HC_COUNT_VALUES_RESET   0x0
#define	ALT_I2C_COMP_PARAM_1_HC_COUNT_VALUES_GET(value)   (((value) & 0x00000010) >> 4)
#define	ALT_I2C_COMP_PARAM_1_HC_COUNT_VALUES_SET(value)   (((value) << 4) & 0x00000010)
#define	ALT_I2C_COMP_PARAM_1_INTR_IO_E_COMBINED   0x1
#define	ALT_I2C_COMP_PARAM_1_INTR_IO_LSB   5
#define	ALT_I2C_COMP_PARAM_1_INTR_IO_MSB   5
#define	ALT_I2C_COMP_PARAM_1_INTR_IO_WIDTH   1
#define	ALT_I2C_COMP_PARAM_1_INTR_IO_SET_MSK   0x00000020
#define	ALT_I2C_COMP_PARAM_1_INTR_IO_CLR_MSK   0xffffffdf
#define	ALT_I2C_COMP_PARAM_1_INTR_IO_RESET   0x1
#define	ALT_I2C_COMP_PARAM_1_INTR_IO_GET(value)   (((value) & 0x00000020) >> 5)
#define	ALT_I2C_COMP_PARAM_1_INTR_IO_SET(value)   (((value) << 5) & 0x00000020)
#define	ALT_I2C_COMP_PARAM_1_HAS_DMA_E_PRESENT   0x1
#define	ALT_I2C_COMP_PARAM_1_HAS_DMA_LSB   6
#define	ALT_I2C_COMP_PARAM_1_HAS_DMA_MSB   6
#define	ALT_I2C_COMP_PARAM_1_HAS_DMA_WIDTH   1
#define	ALT_I2C_COMP_PARAM_1_HAS_DMA_SET_MSK   0x00000040
#define	ALT_I2C_COMP_PARAM_1_HAS_DMA_CLR_MSK   0xffffffbf
#define	ALT_I2C_COMP_PARAM_1_HAS_DMA_RESET   0x1
#define	ALT_I2C_COMP_PARAM_1_HAS_DMA_GET(value)   (((value) & 0x00000040) >> 6)
#define	ALT_I2C_COMP_PARAM_1_HAS_DMA_SET(value)   (((value) << 6) & 0x00000040)
#define	ALT_I2C_COMP_PARAM_1_ADD_ENC_PARAMS_E_ADDENCPARAMS   0x1
#define	ALT_I2C_COMP_PARAM_1_ADD_ENC_PARAMS_LSB   7
#define	ALT_I2C_COMP_PARAM_1_ADD_ENC_PARAMS_MSB   7
#define	ALT_I2C_COMP_PARAM_1_ADD_ENC_PARAMS_WIDTH   1
#define	ALT_I2C_COMP_PARAM_1_ADD_ENC_PARAMS_SET_MSK   0x00000080
#define	ALT_I2C_COMP_PARAM_1_ADD_ENC_PARAMS_CLR_MSK   0xffffff7f
#define	ALT_I2C_COMP_PARAM_1_ADD_ENC_PARAMS_RESET   0x1
#define	ALT_I2C_COMP_PARAM_1_ADD_ENC_PARAMS_GET(value)   (((value) & 0x00000080) >> 7)
#define	ALT_I2C_COMP_PARAM_1_ADD_ENC_PARAMS_SET(value)   (((value) << 7) & 0x00000080)
#define	ALT_I2C_COMP_PARAM_1_RX_BUF_DEPTH_E_FIFO64BYTES   0x40
#define	ALT_I2C_COMP_PARAM_1_RX_BUF_DEPTH_LSB   8
#define	ALT_I2C_COMP_PARAM_1_RX_BUF_DEPTH_MSB   15
#define	ALT_I2C_COMP_PARAM_1_RX_BUF_DEPTH_WIDTH   8
#define	ALT_I2C_COMP_PARAM_1_RX_BUF_DEPTH_SET_MSK   0x0000ff00
#define	ALT_I2C_COMP_PARAM_1_RX_BUF_DEPTH_CLR_MSK   0xffff00ff
#define	ALT_I2C_COMP_PARAM_1_RX_BUF_DEPTH_RESET   0x3f
#define	ALT_I2C_COMP_PARAM_1_RX_BUF_DEPTH_GET(value)   (((value) & 0x0000ff00) >> 8)
#define	ALT_I2C_COMP_PARAM_1_RX_BUF_DEPTH_SET(value)   (((value) << 8) & 0x0000ff00)
#define	ALT_I2C_COMP_PARAM_1_TX_BUF_DEPTH_E_FIFO64BYTES   0x40
#define	ALT_I2C_COMP_PARAM_1_TX_BUF_DEPTH_LSB   16
#define	ALT_I2C_COMP_PARAM_1_TX_BUF_DEPTH_MSB   23
#define	ALT_I2C_COMP_PARAM_1_TX_BUF_DEPTH_WIDTH   8
#define	ALT_I2C_COMP_PARAM_1_TX_BUF_DEPTH_SET_MSK   0x00ff0000
#define	ALT_I2C_COMP_PARAM_1_TX_BUF_DEPTH_CLR_MSK   0xff00ffff
#define	ALT_I2C_COMP_PARAM_1_TX_BUF_DEPTH_RESET   0x3f
#define	ALT_I2C_COMP_PARAM_1_TX_BUF_DEPTH_GET(value)   (((value) & 0x00ff0000) >> 16)
#define	ALT_I2C_COMP_PARAM_1_TX_BUF_DEPTH_SET(value)   (((value) << 16) & 0x00ff0000)
#define	ALT_I2C_COMP_PARAM_1_OFST   0xf4
#define	ALT_I2C_COMP_PARAM_1_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_COMP_PARAM_1_OFST))
#define	ALT_I2C_COMP_VER_IC_COMP_VER_E_VER_1_20A   0x3132302a
#define	ALT_I2C_COMP_VER_IC_COMP_VER_LSB   0
#define	ALT_I2C_COMP_VER_IC_COMP_VER_MSB   31
#define	ALT_I2C_COMP_VER_IC_COMP_VER_WIDTH   32
#define	ALT_I2C_COMP_VER_IC_COMP_VER_SET_MSK   0xffffffff
#define	ALT_I2C_COMP_VER_IC_COMP_VER_CLR_MSK   0x00000000
#define	ALT_I2C_COMP_VER_IC_COMP_VER_RESET   0x3132302a
#define	ALT_I2C_COMP_VER_IC_COMP_VER_GET(value)   (((value) & 0xffffffff) >> 0)
#define	ALT_I2C_COMP_VER_IC_COMP_VER_SET(value)   (((value) << 0) & 0xffffffff)
#define	ALT_I2C_COMP_VER_OFST   0xf8
#define	ALT_I2C_COMP_VER_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_COMP_VER_OFST))
#define	ALT_I2C_COMP_TYPE_IC_COMP_TYPE_LSB   0
#define	ALT_I2C_COMP_TYPE_IC_COMP_TYPE_MSB   31
#define	ALT_I2C_COMP_TYPE_IC_COMP_TYPE_WIDTH   32
#define	ALT_I2C_COMP_TYPE_IC_COMP_TYPE_SET_MSK   0xffffffff
#define	ALT_I2C_COMP_TYPE_IC_COMP_TYPE_CLR_MSK   0x00000000
#define	ALT_I2C_COMP_TYPE_IC_COMP_TYPE_RESET   0x44570140
#define	ALT_I2C_COMP_TYPE_IC_COMP_TYPE_GET(value)   (((value) & 0xffffffff) >> 0)
#define	ALT_I2C_COMP_TYPE_IC_COMP_TYPE_SET(value)   (((value) << 0) & 0xffffffff)
#define	ALT_I2C_COMP_TYPE_OFST   0xfc
#define	ALT_I2C_COMP_TYPE_ADDR(base)   ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_I2C_COMP_TYPE_OFST))

Typedefs
typedef volatile struct ALT_I2C_CON_s	ALT_I2C_CON_t
typedef volatile struct ALT_I2C_TAR_s	ALT_I2C_TAR_t
typedef volatile struct ALT_I2C_SAR_s	ALT_I2C_SAR_t
typedef volatile struct ALT_I2C_DATA_CMD_s	ALT_I2C_DATA_CMD_t
typedef volatile struct ALT_I2C_SS_SCL_HCNT_s	ALT_I2C_SS_SCL_HCNT_t
typedef volatile struct ALT_I2C_SS_SCL_LCNT_s	ALT_I2C_SS_SCL_LCNT_t
typedef volatile struct ALT_I2C_FS_SCL_HCNT_s	ALT_I2C_FS_SCL_HCNT_t
typedef volatile struct ALT_I2C_FS_SCL_LCNT_s	ALT_I2C_FS_SCL_LCNT_t
typedef volatile struct ALT_I2C_INTR_STAT_s	ALT_I2C_INTR_STAT_t
typedef volatile struct ALT_I2C_INTR_MSK_s	ALT_I2C_INTR_MSK_t
typedef volatile struct ALT_I2C_RAW_INTR_STAT_s	ALT_I2C_RAW_INTR_STAT_t
typedef volatile struct ALT_I2C_RX_TL_s	ALT_I2C_RX_TL_t
typedef volatile struct ALT_I2C_TX_TL_s	ALT_I2C_TX_TL_t
typedef volatile struct ALT_I2C_CLR_INTR_s	ALT_I2C_CLR_INTR_t
typedef volatile struct ALT_I2C_CLR_RX_UNDER_s	ALT_I2C_CLR_RX_UNDER_t
typedef volatile struct ALT_I2C_CLR_RX_OVER_s	ALT_I2C_CLR_RX_OVER_t
typedef volatile struct ALT_I2C_CLR_TX_OVER_s	ALT_I2C_CLR_TX_OVER_t
typedef volatile struct ALT_I2C_CLR_RD_REQ_s	ALT_I2C_CLR_RD_REQ_t
typedef volatile struct ALT_I2C_CLR_TX_ABRT_s	ALT_I2C_CLR_TX_ABRT_t
typedef volatile struct ALT_I2C_CLR_RX_DONE_s	ALT_I2C_CLR_RX_DONE_t
typedef volatile struct ALT_I2C_CLR_ACTIVITY_s	ALT_I2C_CLR_ACTIVITY_t
typedef volatile struct ALT_I2C_CLR_STOP_DET_s	ALT_I2C_CLR_STOP_DET_t
typedef volatile struct ALT_I2C_CLR_START_DET_s	ALT_I2C_CLR_START_DET_t
typedef volatile struct ALT_I2C_CLR_GEN_CALL_s	ALT_I2C_CLR_GEN_CALL_t
typedef volatile struct ALT_I2C_EN_s	ALT_I2C_EN_t
typedef volatile struct ALT_I2C_STAT_s	ALT_I2C_STAT_t
typedef volatile struct ALT_I2C_TXFLR_s	ALT_I2C_TXFLR_t
typedef volatile struct ALT_I2C_RXFLR_s	ALT_I2C_RXFLR_t
typedef volatile struct ALT_I2C_SDA_HOLD_s	ALT_I2C_SDA_HOLD_t
typedef volatile struct ALT_I2C_TX_ABRT_SRC_s	ALT_I2C_TX_ABRT_SRC_t
typedef volatile struct ALT_I2C_SLV_DATA_NACK_ONLY_s	ALT_I2C_SLV_DATA_NACK_ONLY_t
typedef volatile struct ALT_I2C_DMA_CR_s	ALT_I2C_DMA_CR_t
typedef volatile struct ALT_I2C_DMA_TDLR_s	ALT_I2C_DMA_TDLR_t
typedef volatile struct ALT_I2C_DMA_RDLR_s	ALT_I2C_DMA_RDLR_t
typedef volatile struct ALT_I2C_SDA_SETUP_s	ALT_I2C_SDA_SETUP_t
typedef volatile struct ALT_I2C_ACK_GENERAL_CALL_s	ALT_I2C_ACK_GENERAL_CALL_t
typedef volatile struct ALT_I2C_EN_STAT_s	ALT_I2C_EN_STAT_t
typedef volatile struct ALT_I2C_FS_SPKLEN_s	ALT_I2C_FS_SPKLEN_t
typedef volatile struct ALT_I2C_COMP_PARAM_1_s	ALT_I2C_COMP_PARAM_1_t
typedef volatile struct ALT_I2C_COMP_VER_s	ALT_I2C_COMP_VER_t
typedef volatile struct ALT_I2C_COMP_TYPE_s	ALT_I2C_COMP_TYPE_t
typedef volatile struct ALT_I2C_s	ALT_I2C_t
typedef volatile struct ALT_I2C_raw_s	ALT_I2C_raw_t