RTEMS 6.1-rc2
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sh4uart.h
1/*
2 * Generic UART Serial driver for SH-4 processors definitions
3 *
4 * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russian Fed.
5 * Author: Alexandra Kossovsky <sasha@oktet.ru>
6 *
7 * The license and distribution terms for this file may be
8 * found in the file LICENSE in this distribution or at
9 * http://www.rtems.org/license/LICENSE.
10 */
11
12#ifndef __SH4UART_H__
13#define __SH4UART_H__
14
15#include <rtems/score/sh7750_regs.h>
16
17
18/*
19 * Define this to work from gdb stub
20 */
21
22/* FIXME: This is BSP-specific */
23#define SH4_WITH_IPL
24
25#define SH4_SCI 1 /* Serial Communication Interface - SCI */
26#define SH4_SCIF 2 /* Serial Communication Interface with FIFO - SCIF */
27#define TRANSMIT_TRIGGER_VALUE(ttrg) ((ttrg) == SH7750_SCFCR2_RTRG_1 ? 1 : \
28 (ttrg) == SH7750_SCFCR2_RTRG_4 ? 4 : \
29 (ttrg) == SH7750_SCFCR2_RTRG_8 ? 8 : 14)
30
31/*
32 * Macros to call UART registers
33 */
34#define SCRDR(n) (*(volatile uint8_t*)SH7750_SCRDR(n))
35#define SCRDR1 SCRDR(1)
36#define SCRDR2 SCRDR(2)
37#define SCTDR(n) (*(volatile uint8_t*)SH7750_SCTDR(n))
38#define SCTDR1 SCTDR(1)
39#define SCTDR2 SCTDR(2)
40#define SCSMR(n) ((n) == 1 ? *(volatile uint8_t*)SH7750_SCSMR1 : \
41 *(volatile uint16_t*)SH7750_SCSMR2)
42#define SCSMR1 SCSMR(1)
43#define SCSMR2 SCSMR(2)
44#define SCSCR(n) ((n) == 1 ? *(volatile uint8_t*)SH7750_SCSCR1 : \
45 *(volatile uint16_t*)SH7750_SCSCR2)
46#define SCSCR1 SCSCR(1)
47#define SCSCR2 SCSCR(2)
48#define SCSSR(n) ((n) == 1 ? *(volatile uint8_t*)SH7750_SCSSR1 : \
49 *(volatile uint16_t*)SH7750_SCSSR2)
50#define SCSSR1 SCSSR(1)
51#define SCSSR2 SCSSR(2)
52#define SCSPTR1 (*(volatile uint8_t*)SH7750_SCSPTR1)
53#define SCSPTR2 (*(volatile uint16_t*)SH7750_SCSPTR2)
54#define SCBRR(n) (*(volatile uint8_t*)SH7750_SCBRR(n))
55#define SCBRR1 SCBRR(1)
56#define SCBRR2 SCBRR(2)
57#define SCFCR2 (*(volatile uint16_t*)SH7750_SCFCR2)
58#define SCFDR2 (*(volatile uint16_t*)SH7750_SCFDR2)
59#define SCLSR2 (*(volatile uint16_t*)SH7750_SCLSR2)
60
61#define IPRB (*(volatile uint16_t*)SH7750_IPRB)
62#define IPRC (*(volatile uint16_t*)SH7750_IPRC)
63
64/*
65 * The following structure is a descriptor of single UART channel.
66 * It contains the initialization information about channel and
67 * current operating values
68 */
69typedef struct sh4uart {
70 uint8_t chn; /* UART channel number */
71 uint8_t int_driven; /* UART interrupt vector number, or
72 0 if polled I/O */
73 void *tty; /* termios channel descriptor */
74
75 volatile const char *tx_buf; /* Transmit buffer from termios */
76 volatile uint32_t tx_buf_len; /* Transmit buffer length */
77 volatile uint32_t tx_ptr; /* Index of next char to transmit*/
78
79 rtems_isr_entry old_handler_transmit; /* Saved interrupt handlers */
80 rtems_isr_entry old_handler_receive;
81
82 tcflag_t c_iflag; /* termios input mode flags */
83 bool parerr_mark_flag; /* Parity error processing state */
84} sh4uart;
85
86/*
87 * Functions from sh4uart.c
88 */
89
90/* sh4uart_init --
91 * This function verifies the input parameters and perform initialization
92 * of the Motorola Coldfire on-chip UART descriptor structure.
93 *
94 */
96sh4uart_init(sh4uart *uart, void *tty, int chn, int int_driven);
97
98/* sh4uart_reset --
99 * This function perform the hardware initialization of Motorola
100 * Coldfire processor on-chip UART controller using parameters
101 * filled by the sh4uart_init function.
102 */
104sh4uart_reset(sh4uart *uart);
105
106/* sh4uart_disable --
107 * This function disable the operations on Motorola Coldfire UART
108 * controller
109 */
111sh4uart_disable(sh4uart *uart, int disable_port);
112
113/* sh4uart_set_attributes --
114 * This function parse the termios attributes structure and perform
115 * the appropriate settings in hardware.
116 */
118sh4uart_set_attributes(sh4uart *mcf, const struct termios *t);
119
120/* sh4uart_poll_read --
121 * This function tried to read character from MCF UART and perform
122 * error handling.
123 */
124int
125sh4uart_poll_read(sh4uart *uart);
126
127#ifdef SH4_WITH_IPL
128/* ipl_console_poll_read --
129 * This function tried to read character from MCF UART over SH-IPL.
130 */
131int
132ipl_console_poll_read(int minor);
133
134/* sh4uart_interrupt_write --
135 * This function initiate transmitting of the buffer in interrupt mode.
136 */
138sh4uart_interrupt_write(sh4uart *uart, const char *buf, int len);
139
140/* sh4uart_poll_write --
141 * This function transmit buffer byte-by-byte in polling mode.
142 */
143int
144sh4uart_poll_write(sh4uart *uart, const char *buf, int len);
145
146/* ipl_console_poll_write --
147 * This function transmit buffer byte-by-byte in polling mode over SH-IPL.
148 */
149int
150ipl_console_poll_write(int minor, const char *buf, int len);
151
152/*
153 * ipl_finish --
154 * Says gdb that program finished to get out from it.
155 */
156extern void ipl_finish(void);
157#endif
158
159/* sh4uart_stop_remote_tx --
160 * This function stop data flow from remote device.
161 */
163sh4uart_stop_remote_tx(sh4uart *uart);
164
165/* sh4uart_start_remote_tx --
166 * This function resume data flow from remote device.
167 */
169sh4uart_start_remote_tx(sh4uart *uart);
170
171/* Descriptor structures for two on-chip UART channels */
172extern sh4uart sh4_uarts[2];
173
174#endif
ISR_Handler_entry rtems_isr_entry
Interrupt service routines installed by rtems_interrupt_catch() shall have this type.
Definition: intr.h:134
rtems_status_code
This enumeration provides status codes for directives of the Classic API.
Definition: status.h:85
Definition: sh4uart.h:69