RTEMS 6.1-rc2
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qoriq.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
11/*
12 * Copyright (C) 2010, 2015 embedded brains GmbH & Co. KG
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 * POSSIBILITY OF SUCH DAMAGE.
34 */
35
36#ifndef LIBBSP_POWERPC_QORIQ_QORIQ_H
37#define LIBBSP_POWERPC_QORIQ_QORIQ_H
38
39#include <bsp.h>
40#include <bsp/tsec.h>
41#include <bsp/utility.h>
42
43#ifdef __cplusplus
44extern "C" {
45#endif /* __cplusplus */
46
47#define QORIQ_FILL(a, b, s) uint8_t reserved_ ## b [b - a - sizeof(s)]
48#define QORIQ_RESERVE(a, b) uint8_t reserved_ ## b [b - a]
49
50typedef struct {
51 uint32_t reg;
52 QORIQ_FILL(0x00000, 0x00010, uint32_t);
54
55typedef struct {
56 uint32_t ccr;
57 QORIQ_FILL(0x00000, 0x00010, uint32_t);
58 uint32_t bcr;
59 QORIQ_FILL(0x00010, 0x00020, uint32_t);
60 uint32_t vpr;
61 QORIQ_FILL(0x00020, 0x00030, uint32_t);
62 uint32_t dr;
63 QORIQ_FILL(0x00030, 0x00040, uint32_t);
65
66#define GTCCR_TOG BSP_BBIT32(0)
67#define GTCCR_COUNT_GET(reg) BSP_BFLD32GET(reg, 1, 31)
68
69#define GTBCR_CI BSP_BBIT32(0)
70#define GTBCR_COUNT(val) BSP_BFLD32(val, 1, 31)
71#define GTBCR_COUNT_GET(reg) BSP_BFLD32GET(reg, 1, 31)
72#define GTBCR_COUNT_SET(reg, val) BSP_BFLD32SET(reg, val, 1, 31)
73
74typedef struct {
75 uint32_t misc;
76 QORIQ_FILL(0x00000, 0x00010, uint32_t);
77 uint32_t internal [2];
78 QORIQ_FILL(0x00010, 0x00020, uint32_t [2]);
80
81typedef struct {
82 uint32_t vpr;
83 QORIQ_FILL(0x00000, 0x00010, uint32_t);
84 uint32_t dr;
85 QORIQ_FILL(0x00010, 0x00020, uint32_t);
87
88typedef struct {
89 QORIQ_RESERVE(0x00000, 0x00040);
90 qoriq_pic_reg ipidr [4];
91 uint32_t ctpr;
92 QORIQ_FILL(0x00080, 0x00090, uint32_t);
93 uint32_t whoami;
94 QORIQ_FILL(0x00090, 0x000a0, uint32_t);
95 uint32_t iack;
96 QORIQ_FILL(0x000a0, 0x000b0, uint32_t);
97 uint32_t eoi;
98 QORIQ_FILL(0x000b0, 0x01000, uint32_t);
100
101typedef struct {
102 uint32_t brr1;
103 QORIQ_FILL(0x00000, 0x00010, uint32_t);
104 uint32_t brr2;
105 QORIQ_FILL(0x00010, 0x00040, uint32_t);
106 qoriq_pic_reg ipidr [4];
107 uint32_t ctpr;
108 QORIQ_FILL(0x00080, 0x00090, uint32_t);
109 uint32_t whoami;
110 QORIQ_FILL(0x00090, 0x000a0, uint32_t);
111 uint32_t iack;
112 QORIQ_FILL(0x000a0, 0x000b0, uint32_t);
113 uint32_t eoi;
114 QORIQ_FILL(0x000b0, 0x01000, uint32_t);
115 uint32_t frr;
116 QORIQ_FILL(0x01000, 0x01020, uint32_t);
117 uint32_t gcr;
118 QORIQ_FILL(0x01020, 0x01080, uint32_t);
119 uint32_t vir;
120 QORIQ_FILL(0x01080, 0x01090, uint32_t);
121 uint32_t pir;
122 QORIQ_FILL(0x01090, 0x010a0, uint32_t);
123 qoriq_pic_reg ipivpr [4];
124 uint32_t svr;
125 QORIQ_FILL(0x010e0, 0x010f0, uint32_t);
126 uint32_t tfrra;
127 QORIQ_FILL(0x010f0, 0x01100, uint32_t);
129 QORIQ_RESERVE(0x01200, 0x01300);
130 uint32_t tcra;
131 QORIQ_FILL(0x01300, 0x01308, uint32_t);
132 uint32_t erqsr;
133 QORIQ_FILL(0x01308, 0x01310, uint32_t);
136 qoriq_pic_bit_field pm [4];
137 QORIQ_RESERVE(0x013d0, 0x01400);
138 qoriq_pic_reg msgr03 [4];
139 QORIQ_RESERVE(0x01440, 0x01500);
140 uint32_t mer03;
141 QORIQ_FILL(0x01500, 0x01510, uint32_t);
142 uint32_t msr03;
143 QORIQ_FILL(0x01510, 0x01600, uint32_t);
144 qoriq_pic_reg msir [8];
145 QORIQ_RESERVE(0x01680, 0x01720);
146 uint32_t msisr;
147 QORIQ_FILL(0x01720, 0x01740, uint32_t);
148 uint32_t msiir;
149 QORIQ_FILL(0x01740, 0x020f0, uint32_t);
150 uint32_t tfrrb;
151 QORIQ_FILL(0x020f0, 0x02100, uint32_t);
153 QORIQ_RESERVE(0x02200, 0x02300);
154 uint32_t tcrb;
155 QORIQ_FILL(0x02300, 0x02400, uint32_t);
156 qoriq_pic_reg msgr47 [4];
157 QORIQ_RESERVE(0x02440, 0x02500);
158 uint32_t mer47;
159 QORIQ_FILL(0x02500, 0x02510, uint32_t);
160 uint32_t msr47;
161 QORIQ_FILL(0x02510, 0x10000, uint32_t);
162 qoriq_pic_src_cfg ei [12];
163 QORIQ_RESERVE(0x10180, 0x10200);
164 qoriq_pic_src_cfg ii_0 [160];
165 qoriq_pic_src_cfg mi [8];
166 QORIQ_RESERVE(0x11700, 0x11c00);
167 qoriq_pic_src_cfg msi [8];
168 QORIQ_RESERVE(0x11d00, 0x13000);
169 qoriq_pic_src_cfg ii_1 [96];
170 QORIQ_RESERVE(0x13c00, 0x20000);
171 qoriq_pic_per_cpu per_cpu [2];
172} qoriq_pic;
173
174#define GTTCR_ROVR(val) BSP_BFLD32(val, 5, 7)
175#define GTTCR_ROVR_GET(reg) BSP_BFLD32GET(reg, 5, 7)
176#define GTTCR_ROVR_SET(reg, val) BSP_BFLD32SET(reg, val, 5, 7)
177#define GTTCR_RTM BSP_BBIT32(15)
178#define GTTCR_CLKR(val) BSP_BFLD32(val, 22, 23)
179#define GTTCR_CLKR_GET(reg) BSP_BFLD32GET(reg, 22, 23)
180#define GTTCR_CLKR_SET(reg, val) BSP_BFLD32SET(reg, val, 22, 23)
181#define GTTCR_CASC(val) BSP_BFLD32(val, 29, 31)
182#define GTTCR_CASC_GET(reg) BSP_BFLD32GET(reg, 29, 31)
183#define GTTCR_CASC_SET(reg, val) BSP_BFLD32SET(reg, val, 29, 31)
184
185typedef struct {
186} qoriq_uart;
187
188typedef struct {
189 uint32_t gpdir;
190 uint32_t gpodr;
191 uint32_t gpdat;
192 uint32_t gpier;
193 uint32_t gpimr;
194 uint32_t gpicr;
195 uint32_t gpibe;
196 QORIQ_RESERVE(0x001c, 0x1000);
197} qoriq_gpio;
198
199typedef struct {
200 QORIQ_RESERVE(0x000, 0x100);
201 uint16_t caplength;
202 uint16_t hciversion;
203 uint32_t hcsparams;
204 uint32_t hccparams;
205 QORIQ_RESERVE(0x10c, 0x120);
206 uint32_t dciversion;
207 uint32_t dccparams;
208 QORIQ_RESERVE(0x128, 0x140);
209 uint32_t usbcmd;
210 uint32_t usbsts;
211 uint32_t usbintr;
212 uint32_t frindex;
213 QORIQ_RESERVE(0x150, 0x154);
214 union {
215 uint32_t periodiclistbase;
216 uint32_t deviceaddr;
217 } perbase_devaddr;
218 union {
219 uint32_t asynclistaddr;
220 uint32_t addr;
221 } async_addr;
222 QORIQ_RESERVE(0x15c, 0x160);
223 uint32_t burstsize;
224 uint32_t txfilltuning;
225 QORIQ_RESERVE(0x168, 0x170);
226 uint32_t viewport;
227 QORIQ_RESERVE(0x174, 0x180);
228 uint32_t configflag;
229 uint32_t portsc1;
230 QORIQ_RESERVE(0x188, 0x1a8);
231 uint32_t usbmode;
232 uint32_t endptsetupstat;
233 uint32_t endpointprime;
234 uint32_t endptflush;
235 uint32_t endptstatus;
236 uint32_t endptcomplete;
237 uint32_t endptctrl[6];
238 QORIQ_RESERVE(0x1d8, 0x400);
239 uint32_t snoop1;
240 uint32_t snoop2;
241 uint32_t age_cnt_thresh;
242 uint32_t pri_ctrl;
243 uint32_t si_ctrl;
244 QORIQ_RESERVE(0x414, 0x500);
245 uint32_t control;
246} qoriq_usb;
247
248typedef struct {
249 uint32_t dsaddr;
250 uint32_t blkattr;
251 uint32_t cmdarg;
252 uint32_t xfertyp;
253 uint32_t cmdrsp0;
254 uint32_t cmdrsp1;
255 uint32_t cmdrsp2;
256 uint32_t cmdrsp3;
257 uint32_t datport;
258 uint32_t prsstat;
259 uint32_t proctl;
260 uint32_t sysctl;
261 uint32_t irqstat;
262 uint32_t irqstaten;
263 uint32_t irqsigen;
264 uint32_t autoc12err;
265 uint32_t hostcapblt;
266 uint32_t wml;
267 QORIQ_FILL(0x00044, 0x00050, uint32_t);
268 uint32_t fevt;
269 QORIQ_FILL(0x00050, 0x000fc, uint32_t);
270 uint32_t hostver;
271 QORIQ_FILL(0x000fc, 0x0040c, uint32_t);
272 uint32_t dcr;
274
275#if QORIQ_CHIP_IS_T_VARIANT(QORIQ_CHIP_VARIANT)
276
277typedef struct {
278 uint32_t ccsrbarh;
279 uint32_t ccsrbarl;
280 uint32_t ccsrar;
281 uint32_t altcbarh;
282 uint32_t altcbarl;
283 uint32_t altcar;
284 uint32_t bstrh;
285 uint32_t bstrl;
286 uint32_t bstar;
287} qoriq_lcc;
288
289#define LCC_BSTAR_EN BSP_BBIT32(0)
290
291typedef struct {
292 uint32_t lawbarh;
293 uint32_t lawbarl;
294 uint32_t lawar;
295 uint32_t reserved_0xc;
296} qoriq_law;
297
298typedef struct {
299 uint32_t reserved_0x0[640];
300 uint32_t qmbm_warmrst;
301} qoriq_dcfg;
302
303typedef struct {
304 QORIQ_RESERVE(0x0000, 0x1000);
305} qoriq_bman;
306
307typedef struct {
308 QORIQ_RESERVE(0x0000, 0x1000);
309} qoriq_qman;
310
311typedef struct {
312 QORIQ_RESERVE(0x000000, 0x100000);
313} qoriq_fman;
314
315typedef struct qoriq_ccsr {
316 qoriq_lcc lcc;
317 QORIQ_FILL(0x000000, 0x000c00, qoriq_lcc);
318 qoriq_law law [32];
319 QORIQ_FILL(0x000c00, 0x001000, qoriq_law [32]);
320 QORIQ_RESERVE(0x001000, 0x040000);
321 qoriq_pic pic;
322 QORIQ_FILL(0x040000, 0x070000, qoriq_pic);
323 QORIQ_RESERVE(0x070000, 0x0e0000);
324 qoriq_dcfg dcfg;
325 QORIQ_FILL(0x0e0000, 0x0e1000, qoriq_dcfg);
326 QORIQ_RESERVE(0x0e1000, 0x114000);
327 qoriq_esdhc esdhc;
328 QORIQ_FILL(0x114000, 0x115000, qoriq_esdhc);
329 QORIQ_RESERVE(0x115000, 0x11c500);
330 qoriq_uart uart_0;
331 QORIQ_FILL(0x11c500, 0x11c600, qoriq_uart);
332 qoriq_uart uart_1;
333 QORIQ_FILL(0x11c600, 0x11d500, qoriq_uart);
334 qoriq_uart uart_2;
335 QORIQ_FILL(0x11d500, 0x11d600, qoriq_uart);
336 qoriq_uart uart_3;
337 QORIQ_FILL(0x11d600, 0x11e000, qoriq_uart);
338 QORIQ_RESERVE(0x11e000, 0x130000);
339 qoriq_gpio gpio[4];
340 QORIQ_RESERVE(0x134000, 0x210000);
341 qoriq_usb usb_1;
342 QORIQ_FILL(0x210000, 0x211000, qoriq_usb);
343 QORIQ_RESERVE(0x211000, 0x318000);
344 qoriq_qman qman;
345 QORIQ_RESERVE(0x319000, 0x31a000);
346 qoriq_bman bman;
347 QORIQ_RESERVE(0x31b000, 0x400000);
348 qoriq_fman fman[2];
349 QORIQ_RESERVE(0x600000, 0x2000000);
350} qoriq_ccsr;
351
352#else /* QORIQ_CHIP_VARIANT */
353
354typedef struct {
355 uint32_t ccsrbar;
356 uint32_t reserved_0;
357 uint32_t altcbar;
358 uint32_t reserved_1;
359 uint32_t altcar;
360 uint32_t reserved_2 [3];
361 uint32_t bptr;
362} qoriq_lcc;
363
364#define CCSRBAR_BASE_ADDR(val) BSP_BFLD32(val, 8, 23)
365#define CCSRBAR_BASE_ADDR_GET(reg) BSP_BFLD32GET(reg, 8, 23)
366#define CCSRBAR_BASE_ADDR_SET(reg, val) BSP_BFLD32SET(reg, val, 8, 23)
367
368#define ALTCBAR_BASE_ADDR(val) BSP_BFLD32(val, 8, 23)
369#define ALTCBAR_BASE_ADDR_GET(reg) BSP_BFLD32GET(reg, 8, 23)
370#define ALTCBAR_BASE_ADDR_SET(reg, val) BSP_BFLD32SET(reg, val, 8, 23)
371
372#define ALTCAR_EN BSP_BBIT32(0)
373#define ALTCAR_TRGT_ID(val) BSP_BFLD32(val, 8, 11)
374#define ALTCAR_TRGT_ID_GET(reg) BSP_BFLD32GET(reg, 8, 11)
375#define ALTCAR_TRGT_ID_SET(reg, val) BSP_BFLD32SET(reg, val, 8, 11)
376
377#define BPTR_EN BSP_BBIT32(0)
378#define BPTR_BOOT_PAGE(val) BSP_BFLD32(val, 8, 31)
379#define BPTR_BOOT_PAGE_GET(reg) BSP_BFLD32GET(reg, 8, 31)
380#define BPTR_BOOT_PAGE_SET(reg, val) BSP_BFLD32SET(reg, val, 8, 31)
381
382typedef struct {
383 uint32_t bar;
384 uint32_t reserved_0;
385 uint32_t ar;
386 uint32_t reserved_1 [5];
387} qoriq_law;
388
389#define LAWBAR_BASE_ADDR(val) BSP_BFLD32(val, 8, 31)
390#define LAWBAR_BASE_ADDR_GET(reg) BSP_BFLD32GET(reg, 8, 31)
391#define LAWBAR_BASE_ADDR_SET(reg, val) BSP_BFLD32SET(reg, val, 8, 31)
392
393#define LAWAR_EN BSP_BBIT32(0)
394#define LAWAR_TRGT(val) BSP_BFLD32(val, 8, 11)
395#define LAWAR_TRGT_GET(reg) BSP_BFLD32GET(reg, 8, 11)
396#define LAWAR_TRGT_SET(reg, val) BSP_BFLD32SET(reg, val, 8, 11)
397#define LAWAR_SIZE(val) BSP_BFLD32(val, 26, 31)
398#define LAWAR_SIZE_GET(reg) BSP_BFLD32GET(reg, 26, 31)
399#define LAWAR_SIZE_SET(reg, val) BSP_BFLD32SET(reg, val, 26, 31)
400
401typedef struct {
402} qoriq_ecm;
403
404typedef struct {
406
407typedef struct {
408} qoriq_i2c;
409
410typedef struct {
412
413typedef struct {
414} qoriq_spi;
415
416typedef struct {
418
419typedef struct {
420} qoriq_tdm;
421
422typedef struct {
424
425typedef struct {
426} qoriq_dma;
427
428typedef struct {
430
431typedef struct {
432} qoriq_sec;
433
434typedef struct {
436
437typedef struct {
439
440typedef struct {
442
443typedef struct {
445
446typedef struct {
448
449typedef struct {
451
452typedef struct qoriq_ccsr {
453 qoriq_lcc lcc;
454 QORIQ_FILL(0x00000, 0x00c08, qoriq_lcc);
455 qoriq_law law [12];
456 QORIQ_FILL(0x00c08, 0x01000, qoriq_law [12]);
457 qoriq_ecm ecm;
458 QORIQ_FILL(0x01000, 0x02000, qoriq_ecm);
459 qoriq_ddr_controller ddr_controller;
460 QORIQ_FILL(0x02000, 0x03000, qoriq_ddr_controller);
462 QORIQ_FILL(0x03000, 0x04000, qoriq_i2c);
463 QORIQ_RESERVE(0x04000, 0x04500);
464 qoriq_uart uart_0;
465 QORIQ_FILL(0x04500, 0x04600, qoriq_uart);
466 qoriq_uart uart_1;
467 QORIQ_FILL(0x04600, 0x04700, qoriq_uart);
468 QORIQ_RESERVE(0x04700, 0x05000);
469 qoriq_local_bus local_bus;
470 QORIQ_FILL(0x05000, 0x06000, qoriq_local_bus);
471 qoriq_spi spi;
472 QORIQ_FILL(0x06000, 0x07000, qoriq_spi);
473 QORIQ_RESERVE(0x07000, 0x08000);
474 qoriq_pci_express pci_express_3;
475 QORIQ_FILL(0x08000, 0x09000, qoriq_pci_express);
476 qoriq_pci_express pci_express_2;
477 QORIQ_FILL(0x09000, 0x0a000, qoriq_pci_express);
478 qoriq_pci_express pci_express_1;
479 QORIQ_FILL(0x0a000, 0x0b000, qoriq_pci_express);
480 QORIQ_RESERVE(0x0b000, 0x0c000);
481 qoriq_dma dma_2;
482 QORIQ_FILL(0x0c000, 0x0d000, qoriq_dma);
483 QORIQ_RESERVE(0x0d000, 0x0f000);
484 qoriq_gpio gpio;
485 QORIQ_RESERVE(0x10000, 0x16000);
486 qoriq_tdm tdm;
487 QORIQ_FILL(0x16000, 0x17000, qoriq_tdm);
488 QORIQ_RESERVE(0x17000, 0x20000);
489 qoriq_l2_cache l2_cache;
490 QORIQ_FILL(0x20000, 0x21000, qoriq_l2_cache);
491 qoriq_dma dma_1;
492 QORIQ_FILL(0x21000, 0x22000, qoriq_dma);
493 qoriq_usb usb_1;
494 QORIQ_FILL(0x22000, 0x23000, qoriq_usb);
495 qoriq_usb usb_2;
496 QORIQ_FILL(0x23000, 0x24000, qoriq_usb);
497 tsec_registers tsec_1;
498 QORIQ_FILL(0x24000, 0x25000, tsec_registers);
499 tsec_registers tsec_2;
500 QORIQ_FILL(0x25000, 0x26000, tsec_registers);
501 tsec_registers tsec_3;
502 QORIQ_FILL(0x26000, 0x27000, tsec_registers);
503 QORIQ_RESERVE(0x27000, 0x2c000);
504 qoriq_tdm_dma tdm_dma;
505 QORIQ_FILL(0x2c000, 0x2d000, qoriq_tdm_dma);
506 QORIQ_RESERVE(0x2d000, 0x2e000);
507 qoriq_esdhc esdhc;
508 QORIQ_FILL(0x2e000, 0x2f000, qoriq_esdhc);
509 QORIQ_RESERVE(0x2f000, 0x30000);
510 qoriq_sec sec;
511 QORIQ_FILL(0x30000, 0x31000, qoriq_sec);
512 QORIQ_RESERVE(0x31000, 0x40000);
513 qoriq_pic pic;
514 QORIQ_FILL(0x40000, 0x80000, qoriq_pic);
515 QORIQ_RESERVE(0x80000, 0xb0000);
516 tsec_registers tsec_1_group_0;
517 QORIQ_FILL(0xb0000, 0xb1000, tsec_registers);
518 tsec_registers tsec_2_group_0;
519 QORIQ_FILL(0xb1000, 0xb2000, tsec_registers);
520 tsec_registers tsec_3_group_0;
521 QORIQ_FILL(0xb2000, 0xb3000, tsec_registers);
522 QORIQ_RESERVE(0xb3000, 0xb4000);
523 tsec_registers tsec_1_group_1;
524 QORIQ_FILL(0xb4000, 0xb5000, tsec_registers);
525 tsec_registers tsec_2_group_1;
526 QORIQ_FILL(0xb5000, 0xb6000, tsec_registers);
527 tsec_registers tsec_3_group_1;
528 QORIQ_FILL(0xb6000, 0xb7000, tsec_registers);
529 QORIQ_RESERVE(0xb7000, 0xc0000);
530 qoriq_serial_rapid_io serial_rapid_io;
531 QORIQ_FILL(0xc0000, 0xe0000, qoriq_serial_rapid_io);
532 qoriq_global_utilities global_utilities;
533 QORIQ_FILL(0xe0000, 0xe1000, qoriq_global_utilities);
534 qoriq_performance_monitor performance_monitor;
535 QORIQ_FILL(0xe1000, 0xe2000, qoriq_performance_monitor);
536 qoriq_debug_watchpoint debug_watchpoint;
537 QORIQ_FILL(0xe2000, 0xe3000, qoriq_debug_watchpoint);
538 qoriq_serdes serdes;
539 QORIQ_FILL(0xe3000, 0xe4000, qoriq_serdes);
540 QORIQ_RESERVE(0xe4000, 0xf0000);
541 qoriq_boot_rom boot_rom;
542 QORIQ_FILL(0xf0000, 0x100000, qoriq_boot_rom);
543} qoriq_ccsr;
544
545#endif /* QORIQ_CHIP_VARIANT */
546
547extern volatile qoriq_ccsr qoriq;
548
549#if QORIQ_CHIP_IS_T_VARIANT(QORIQ_CHIP_VARIANT)
550extern uint8_t qoriq_bman_portal[2][16777216];
551extern uint8_t qoriq_qman_portal[2][16777216];
552
553void qoriq_clear_ce_portal(void *base, size_t size);
554void qoriq_clear_ci_portal(void *base, size_t size);
555#endif
556
557static inline void qoriq_reset_qman_and_bman(void)
558{
559#if QORIQ_CHIP_IS_T_VARIANT(QORIQ_CHIP_VARIANT)
560 qoriq.dcfg.qmbm_warmrst = 0x3;
561
562 while ((qoriq.dcfg.qmbm_warmrst & 0x3) != 0) {
563 /* Wait for reset done */
564 }
565#endif
566}
567
568#ifdef __cplusplus
569}
570#endif /* __cplusplus */
571
572#endif /* LIBBSP_POWERPC_QORIQ_QORIQ_H */
This header file provides utility macros for BSPs.
Definition: intercom.c:87
Definition: 8xx_immap.h:210
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Definition: tsec.h:103