nand-mlc.h

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/*
 * Copyright (C) 2010, 2011 embedded brains GmbH & Co. KG
 *
 * Copyright (c) 2011 Stephan Hoffmann <sho@reLinux.de>
 *
 * The license and distribution terms for this file may be
 * found in the file LICENSE in this distribution or at
 * http://www.rtems.org/license/LICENSE.
 */
 
#ifndef LIBBSP_ARM_LPC32XX_NAND_MLC_H
#define LIBBSP_ARM_LPC32XX_NAND_MLC_H
 
#include <rtems.h>
 
#include <bsp/utility.h>
 
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
 
#define MLC_SMALL_PAGE_SIZE 528
#define MLC_SMALL_DATA_SIZE 512
#define MLC_SMALL_SPARE_SIZE 16
#define MLC_SMALL_USER_SPARE_SIZE 6
#define MLC_SMALL_ECC_SPARE_SIZE 10
#define MLC_SMALL_DATA_WORD_COUNT (MLC_SMALL_DATA_SIZE / 4)
#define MLC_SMALL_SPARE_WORD_COUNT (MLC_SMALL_SPARE_SIZE / 4)
#define MLC_SMALL_PAGES_PER_LARGE_PAGE 4
#define MLC_LARGE_PAGE_SIZE \
  (MLC_SMALL_PAGES_PER_LARGE_PAGE * MLC_SMALL_PAGE_SIZE)
#define MLC_LARGE_DATA_SIZE \
  (MLC_SMALL_PAGES_PER_LARGE_PAGE * MLC_SMALL_DATA_SIZE)
#define MLC_LARGE_SPARE_SIZE \
  (MLC_SMALL_PAGES_PER_LARGE_PAGE * MLC_SMALL_SPARE_SIZE)
#define MLC_LARGE_DATA_WORD_COUNT (MLC_LARGE_DATA_SIZE / 4)
#define MLC_LARGE_SPARE_WORD_COUNT (MLC_LARGE_SPARE_SIZE / 4)
 
#define FLASHCLK_IRQ_MLC BSP_BIT32(5)
#define FLASHCLK_MLC_DMA_RNB BSP_BIT32(4)
#define FLASHCLK_MLC_DMA_INT BSP_BIT32(3)
#define FLASHCLK_SELECT_SLC BSP_BIT32(2)
#define FLASHCLK_MLC_CLK_ENABLE BSP_BIT32(1)
#define FLASHCLK_SLC_CLK_ENABLE BSP_BIT32(0)
 
#define MLC_TIME_WR_LOW(val) BSP_FLD32(val, 0, 3)
#define MLC_TIME_WR_HIGH(val) BSP_FLD32(val, 4, 7)
#define MLC_TIME_RD_LOW(val) BSP_FLD32(val, 8, 11)
#define MLC_TIME_RD_HIGH(val) BSP_FLD32(val, 12, 15)
#define MLC_TIME_NAND_TA(val) BSP_FLD32(val, 16, 18)
#define MLC_TIME_BUSY_DELAY(val) BSP_FLD32(val, 19, 23)
#define MLC_TIME_TCEA_DELAY(val) BSP_FLD32(val, 24, 25)
 
#define MLC_UNLOCK_PROT 0xa25e
 
#define MLC_ISR_DECODER_FAILURE BSP_BIT32(6)
#define MLC_ISR_SYMBOL_ERRORS(reg) BSP_FLD32GET(reg, 4, 5)
#define MLC_ISR_ERRORS_DETECTED BSP_BIT32(3)
#define MLC_ISR_ECC_READY BSP_BIT32(2)
#define MLC_ISR_CONTROLLER_READY BSP_BIT32(1)
#define MLC_ISR_NAND_READY BSP_BIT32(0)
 
#define MLC_ICR_SOFT_WRITE_PROT BSP_BIT32(3)
#define MLC_ICR_LARGE_PAGES BSP_BIT32(2)
#define MLC_ICR_ADDR_WORD_COUNT_4_5 BSP_BIT32(1)
#define MLC_ICR_IO_BUS_16 BSP_BIT32(0)
 
#define MLC_ECC_AUTO_ENC_PROGRAM BSP_BIT32(8)
 
#define NAND_STATUS_ERROR (1U << 0)
#define NAND_STATUS_READY (1U << 6)
#define NAND_STATUS_NOT_PROTECTED (1U << 7)
 
typedef struct {
  uint32_t flags;
 
  uint32_t block_count;
 
  uint32_t time;
} lpc32xx_mlc_config;
 
#define MLC_SMALL_PAGES 0x1U
 
#define MLC_MANY_ADDRESS_CYCLES 0x2U
 
#define MLC_NORMAL_BLOCKS 0x4U
 
#define MLC_IO_WIDTH_16_BIT 0x8U
 
void lpc32xx_mlc_init(const lpc32xx_mlc_config *cfg);
 
uint32_t lpc32xx_mlc_page_size(void);
 
uint32_t lpc32xx_mlc_pages_per_block(void);
 
uint32_t lpc32xx_mlc_block_count(void);
 
uint32_t lpc32xx_mlc_io_width(void);
 
void lpc32xx_mlc_write_protection(
  uint32_t page_index_low,
  uint32_t page_index_high
);
 
void lpc32xx_mlc_read_id(uint8_t *id, size_t n);
 
rtems_status_code lpc32xx_mlc_read_page(
  uint32_t page_index,
  void *data,
  void *spare,
  uint32_t *symbol_error_count
);
 
rtems_status_code lpc32xx_mlc_is_valid_block(uint32_t block_index);
 
rtems_status_code lpc32xx_mlc_erase_block(uint32_t block_index);
 
rtems_status_code lpc32xx_mlc_erase_block_safe(uint32_t block_index);
 
rtems_status_code lpc32xx_mlc_erase_block_safe_3(
  uint32_t block_index,
  uint32_t page_begin,
  uint32_t page_end
);
 
void lpc32xx_mlc_zero_pages(uint32_t page_begin, uint32_t page_end);
 
rtems_status_code lpc32xx_mlc_write_page_with_ecc(
  uint32_t page_index,
  const void *data,
  const void *spare
);
 
rtems_status_code lpc32xx_mlc_write_blocks(
  uint32_t block_begin,
  uint32_t block_end,
  const void *src,
  size_t src_size,
  uint32_t page_buffer [MLC_LARGE_DATA_WORD_COUNT]
);
 
typedef bool (*lpc32xx_mlc_read_process)(
  void *process_arg,
  uint32_t page_index,
  uint32_t page_size,
  uint32_t page_data [MLC_LARGE_DATA_WORD_COUNT],
  uint32_t page_spare [MLC_LARGE_SPARE_WORD_COUNT]
);
 
rtems_status_code lpc32xx_mlc_read_blocks(
  uint32_t block_begin,
  uint32_t block_end,
  lpc32xx_mlc_read_process process,
  void *process_arg,
  uint32_t page_buffer_0 [MLC_LARGE_DATA_WORD_COUNT],
  uint32_t page_buffer_1 [MLC_LARGE_DATA_WORD_COUNT]
);
 
static inline bool lpc32xx_mlc_is_bad_page(const uint32_t *spare)
{
  uint32_t first_byte_mask = 0x000000ff;
  uint32_t sixth_byte_mask = 0x0000ff00;
 
  return (spare [0] & first_byte_mask) != first_byte_mask
    || (spare [1] & sixth_byte_mask) != sixth_byte_mask;
}
 
#ifdef __cplusplus
}
#endif /* __cplusplus */
 
#endif /* LIBBSP_ARM_LPC32XX_NAND_MLC_H */