RTEMS
6.1-rc2
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cpukit
score
cpu
mips
include
rtems
mips
iregdef.h
Go to the documentation of this file.
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/*
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* Copyright 1989 Integrated Device Technology, Inc
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* All Rights Reserved
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*
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* Based upon IDT provided code with the following release:
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*
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* This source code has been made available to you by IDT on an AS-IS
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* basis. Anyone receiving this source is licensed under IDT copyrights
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* to use it in any way he or she deems fit, including copying it,
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* modifying it, compiling it, and redistributing it either with or
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* without modifications. No license under IDT patents or patent
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* applications is to be implied by the copyright license.
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*
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* Any user of this software should understand that IDT cannot provide
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* technical support for this software and will not be responsible for
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* any consequences resulting from the use of this software.
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*
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* Any person who transfers this source code or any derivative work must
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* include the IDT copyright notice, this paragraph, and the preceeding
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* two paragraphs in the transferred software.
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*
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* COPYRIGHT IDT CORPORATION 1996
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* LICENSED MATERIAL - PROGRAM PROPERTY OF IDT
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*/
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#ifndef _RTEMS_MIPS_IREGDEF_H
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#define _RTEMS_MIPS_IREGDEF_H
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/* register names */
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#define r0 $0
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#define r1 $1
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#define r2 $2
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#define r3 $3
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#define r4 $4
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#define r5 $5
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#define r6 $6
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#define r7 $7
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#define r8 $8
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#define r9 $9
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#define r10 $10
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#define r11 $11
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#define r12 $12
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#define r13 $13
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#define r14 $14
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#define r15 $15
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#define r16 $16
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#define r17 $17
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#define r18 $18
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#define r19 $19
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#define r20 $20
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#define r21 $21
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#define r22 $22
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#define r23 $23
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#define r24 $24
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#define r25 $25
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#define r26 $26
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#define r27 $27
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#define r28 $28
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#define r29 $29
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#define r30 $30
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#define r31 $31
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#define fp0 $f0
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#define fp1 $f1
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#define fp2 $f2
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#define fp3 $f3
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#define fp4 $f4
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#define fp5 $f5
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#define fp6 $f6
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#define fp7 $f7
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#define fp8 $f8
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#define fp9 $f9
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#define fp10 $f10
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#define fp11 $f11
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#define fp12 $f12
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#define fp13 $f13
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#define fp14 $f14
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#define fp15 $f15
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#define fp16 $f16
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#define fp17 $f17
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#define fp18 $f18
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#define fp19 $f19
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#define fp20 $f20
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#define fp21 $f21
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#define fp22 $f22
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#define fp23 $f23
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#define fp24 $f24
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#define fp25 $f25
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#define fp26 $f26
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#define fp27 $f27
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#define fp28 $f28
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#define fp29 $f29
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#define fp30 $f30
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#define fp31 $f31
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#define fcr0 $0
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#define fcr30 $30
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#define fcr31 $31
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#define zero $0
/* wired zero */
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#define AT $at
/* assembler temp */
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#define v0 $2
/* return value */
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#define v1 $3
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#define a0 $4
/* argument registers a0-a3 */
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#define a1 $5
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#define a2 $6
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#define a3 $7
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#define t0 $8
/* caller saved t0-t9 */
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#define t1 $9
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#define t2 $10
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#define t3 $11
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#define t4 $12
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#define t5 $13
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#define t6 $14
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#define t7 $15
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#define s0 $16
/* callee saved s0-s8 */
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#define s1 $17
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#define s2 $18
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#define s3 $19
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#define s4 $20
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#define s5 $21
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#define s6 $22
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#define s7 $23
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#define t8 $24
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#define t9 $25
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#define k0 $26
/* kernel usage */
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#define k1 $27
/* kernel usage */
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#define gp $28
/* sdata pointer */
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#define sp $29
/* stack pointer */
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#define s8 $30
/* yet another saved reg for the callee */
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#define fp $30
/* frame pointer - this is being phased out by MIPS */
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#define ra $31
/* return address */
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/*
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** relative position of registers in interrupt/exception frame
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*/
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#define R_R0 0
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#define R_R1 1
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#define R_R2 2
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#define R_R3 3
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#define R_R4 4
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#define R_R5 5
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#define R_R6 6
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#define R_R7 7
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#define R_R8 8
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#define R_R9 9
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#define R_R10 10
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#define R_R11 11
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#define R_R12 12
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#define R_R13 13
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#define R_R14 14
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#define R_R15 15
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#define R_R16 16
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#define R_R17 17
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#define R_R18 18
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#define R_R19 19
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#define R_R20 20
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#define R_R21 21
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#define R_R22 22
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#define R_R23 23
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#define R_R24 24
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#define R_R25 25
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#define R_R26 26
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#define R_R27 27
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#define R_R28 28
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#define R_R29 29
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#define R_R30 30
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#define R_R31 31
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#define R_SR 32
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#define R_MDLO 33
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#define R_MDHI 34
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#define R_BADVADDR 35
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#define R_CAUSE 36
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#define R_EPC 37
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#define R_F0 38
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#define R_F1 39
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#define R_F2 40
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#define R_F3 41
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#define R_F4 42
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#define R_F5 43
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#define R_F6 44
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#define R_F7 45
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#define R_F8 46
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#define R_F9 47
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#define R_F10 48
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#define R_F11 49
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#define R_F12 50
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#define R_F13 41
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#define R_F14 42
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#define R_F15 43
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#define R_F16 44
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#define R_F17 45
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#define R_F18 56
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#define R_F19 57
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#define R_F20 58
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#define R_F21 59
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#define R_F22 60
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#define R_F23 61
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#define R_F24 62
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#define R_F25 63
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#define R_F26 64
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#define R_F27 65
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#define R_F28 66
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#define R_F29 67
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#define R_F30 68
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#define R_F31 69
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#define R_FCSR 70
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#define R_FEIR 71
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#define R_TLBHI 72
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#if __mips == 1
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#define R_TLBLO 73
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#endif
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#if (__mips == 3 ) || ( __mips == 32)
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#define R_TLBLO0 73
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#endif
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#define R_INX 74
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#define R_RAND 75
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#define R_CTXT 76
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#define R_EXCTYPE 77
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#define R_MODE 78
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#define R_PRID 79
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#define R_TAR 80
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#if __mips == 1
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#define NREGS 81
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#endif
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#if (__mips == 3 ) || ( __mips == 32)
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#define R_TLBLO1 81
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#define R_PAGEMASK 82
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#define R_WIRED 83
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#define R_COUNT 84
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#define R_COMPARE 85
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#define R_CONFIG 86
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#define R_LLADDR 87
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#define R_WATCHLO 88
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#define R_WATCHHI 89
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#define R_ECC 90
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#define R_CACHEERR 91
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#define R_TAGLO 92
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#define R_TAGHI 93
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#define R_ERRPC 94
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#define R_XCTXT 95
/* Ketan added from SIM64bit */
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#define NREGS 96
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#endif
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/*
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** For those who like to think in terms of the compiler names for the regs
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*/
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#define R_ZERO R_R0
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#define R_AT R_R1
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#define R_V0 R_R2
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#define R_V1 R_R3
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#define R_A0 R_R4
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#define R_A1 R_R5
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#define R_A2 R_R6
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#define R_A3 R_R7
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#define R_T0 R_R8
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#define R_T1 R_R9
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#define R_T2 R_R10
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#define R_T3 R_R11
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#define R_T4 R_R12
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#define R_T5 R_R13
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#define R_T6 R_R14
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#define R_T7 R_R15
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#define R_S0 R_R16
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#define R_S1 R_R17
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#define R_S2 R_R18
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#define R_S3 R_R19
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#define R_S4 R_R20
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#define R_S5 R_R21
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#define R_S6 R_R22
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#define R_S7 R_R23
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#define R_T8 R_R24
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#define R_T9 R_R25
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#define R_K0 R_R26
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#define R_K1 R_R27
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#define R_GP R_R28
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#define R_SP R_R29
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#define R_FP R_R30
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#define R_RA R_R31
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/* disabled for RTEMS */
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#if 0
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/* Ketan added the following */
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#if __mips == 1
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#define sreg sw
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#define lreg lw
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#define rmfc0 mfc0
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#define rmtc0 mtc0
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#define R_SZ 4
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#endif
/* __mips == 1 */
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/* #ifdef __mips == 3 */
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#if __mips < 3
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#define sreg sw
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#define lreg lw
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#define rmfc0 mfc0
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#define rmtc0 mtc0
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#define R_SZ 4
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#else
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#define sreg sd
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#define lreg ld
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#define rmfc0 dmfc0
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#define rmtc0 dmtc0
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#define R_SZ 8
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#endif
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/* #endif __mips == 3 */
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/* Ketan till here */
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#endif
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#endif
/* _RTEMS_MIPS_IREGDEF_H */
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