RTEMS 6.1-rc2
Loading...
Searching...
No Matches
idt.h
1/*
2 * Copyright (c) 2018.
3 * Amaan Cheval <amaan.cheval@gmail.com>
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#ifndef _RTEMS_SCORE_IDT_H
28#define _RTEMS_SCORE_IDT_H
29
31#include <rtems/rtems/intr.h>
32
33#ifdef __cplusplus
34extern "C" {
35#endif
36
37#define IDT_INTERRUPT_GATE (0b1110)
38#define IDT_PRESENT (0b10000000)
39
40/*
41 * XXX: The IDT size should be smaller given that we likely won't map all 256
42 * vectors, but for simplicity, this works better.
43 */
44#define IDT_SIZE 256
45
46/* Target vector number for spurious IRQs */
47#define BSP_VECTOR_SPURIOUS 0xFF
48/* Target vector number for the APIC timer */
49#define BSP_VECTOR_APIC_TIMER 32
50
51typedef struct _interrupt_descriptor {
52 uint16_t offset_0; // bits 0-15
53 uint16_t segment_selector; // a segment selector in the GDT or LDT
54 /* bits 0-2 are the offset into the IST, stored in the TSS */
55 uint8_t interrupt_stack_table;
56 uint8_t type_and_attributes;
57 uint16_t offset_1; // bits 16-31
58 uint32_t offset_2; // bits 32-63
59 uint32_t reserved_zero;
61
62extern interrupt_descriptor amd64_idt[IDT_SIZE];
63
64struct idt_record {
65 uint16_t limit; /* Size of IDT array - 1 */
66 uintptr_t base; /* Pointer to IDT array */
68
70 sizeof(struct idt_record) == 10,
71 "IDT pointer must be exactly 10 bytes"
72);
73
74void lidt(struct idt_record *idtr);
75
76interrupt_descriptor amd64_create_interrupt_descriptor(
77 uintptr_t handler, uint8_t types_and_attributes
78);
79
80uintptr_t amd64_get_handler_from_idt(uint32_t vector);
81
82void amd64_install_raw_interrupt(
83 uint32_t vector, uintptr_t new_handler, uintptr_t *old_handler
84);
85
86/*
87 * Called by _ISR_Handler to dispatch "RTEMS interrupts", i.e. call the
88 * registered RTEMS ISR.
89 */
90void amd64_dispatch_isr(rtems_vector_number vector);
91
92/* Defined in isr_handler.S */
93extern void rtems_irq_prologue_0(void);
94extern void rtems_irq_prologue_1(void);
95extern void rtems_irq_prologue_2(void);
96extern void rtems_irq_prologue_3(void);
97extern void rtems_irq_prologue_4(void);
98extern void rtems_irq_prologue_5(void);
99extern void rtems_irq_prologue_6(void);
100extern void rtems_irq_prologue_7(void);
101extern void rtems_irq_prologue_8(void);
102extern void rtems_irq_prologue_9(void);
103extern void rtems_irq_prologue_10(void);
104extern void rtems_irq_prologue_11(void);
105extern void rtems_irq_prologue_12(void);
106extern void rtems_irq_prologue_13(void);
107extern void rtems_irq_prologue_14(void);
108extern void rtems_irq_prologue_15(void);
109extern void rtems_irq_prologue_16(void);
110extern void rtems_irq_prologue_17(void);
111extern void rtems_irq_prologue_18(void);
112extern void rtems_irq_prologue_19(void);
113extern void rtems_irq_prologue_20(void);
114extern void rtems_irq_prologue_21(void);
115extern void rtems_irq_prologue_22(void);
116extern void rtems_irq_prologue_23(void);
117extern void rtems_irq_prologue_24(void);
118extern void rtems_irq_prologue_25(void);
119extern void rtems_irq_prologue_26(void);
120extern void rtems_irq_prologue_27(void);
121extern void rtems_irq_prologue_28(void);
122extern void rtems_irq_prologue_29(void);
123extern void rtems_irq_prologue_30(void);
124extern void rtems_irq_prologue_31(void);
125extern void rtems_irq_prologue_32(void);
126
127#ifdef __cplusplus
128}
129#endif
130
131#endif
This header file provides basic definitions used by the API and the implementation.
#define RTEMS_STATIC_ASSERT(_cond, _msg)
It is defined if a static analysis run is performed.
Definition: basedefs.h:841
ISR_Vector_number rtems_vector_number
This integer type represents interrupt vector numbers.
Definition: intr.h:102
This header file defines the Interrupt Manager API.
Used for passing and retrieving registers content to/from real mode interrupt call.
Definition: realmode_int.h:43
Definition: idt.h:51
Definition: idt.h:64