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#define | NAND_DEVICE 0x80000000UL |
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#define | NAND_WRITE_TIMEOUT 0x01000000UL |
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#define | CMD_AREA (1UL<<16U) /* A16 = CLE high */ |
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#define | ADDR_AREA (1UL<<17U) /* A17 = ALE high */ |
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#define | NAND_CMD_AREA_A ((uint8_t)0x00) |
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#define | NAND_CMD_AREA_B ((uint8_t)0x01) |
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#define | NAND_CMD_AREA_C ((uint8_t)0x50) |
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#define | NAND_CMD_AREA_TRUE1 ((uint8_t)0x30) |
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#define | NAND_CMD_WRITE0 ((uint8_t)0x80) |
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#define | NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10) |
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#define | NAND_CMD_ERASE0 ((uint8_t)0x60) |
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#define | NAND_CMD_ERASE1 ((uint8_t)0xD0) |
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#define | NAND_CMD_READID ((uint8_t)0x90) |
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#define | NAND_CMD_STATUS ((uint8_t)0x70) |
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#define | NAND_CMD_LOCK_STATUS ((uint8_t)0x7A) |
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#define | NAND_CMD_RESET ((uint8_t)0xFF) |
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#define | NAND_VALID_ADDRESS 0x00000100UL |
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#define | NAND_INVALID_ADDRESS 0x00000200UL |
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#define | NAND_TIMEOUT_ERROR 0x00000400UL |
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#define | NAND_BUSY 0x00000000UL |
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#define | NAND_ERROR 0x00000001UL |
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#define | NAND_READY 0x00000040UL |
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