46extern void griommu_register_drv(
void);
48#define GRIOMMU_ERR_OK 0
49#define GRIOMMU_ERR_NOINIT -1
50#define GRIOMMU_ERR_EINVAL -2
51#define GRIOMMU_ERR_IMPLEMENTED -3
52#define GRIOMMU_ERR_NOTFOUND -4
55#define GRIOMMU_APV_SIZE 0x20000000
58#define GRIOMMU_APV_ALIGN 0x10
61extern void * griommu_apv_new(
void);
62extern void griommu_apv_delete(
void * apv);
70#define MASTER_VENDOR (0xff << MASTER_VENDOR_BIT)
71#define MASTER_DEVICE (0xfff << MASTER_DEVICE_BIT)
72#define MASTER_BS (0x1 << MASTER_BS_BIT)
73#define MASTER_GROUP (0xf << MASTER_GROUP_BIT)
75#define MASTER_VENDOR_BIT 24
76#define MASTER_DEVICE_BIT 12
77#define MASTER_BS_BIT 4
78#define MASTER_GROUP_BIT 0
80#define GRIOMMU_OPTIONS_BUS0 0
81#define GRIOMMU_OPTIONS_BUS1 1
82extern int griommu_master_setup(
int master,
int group,
int options);
83extern int griommu_master_find(
int vendor,
int device,
int instance);
84extern int griommu_master_info(
int master, uint32_t * info);
85#define griommu_get_master_vendor(info) \
86 ((info & MASTER_VENDOR) >> MASTER_VENDOR_BIT)
87#define griommu_get_master_device(info) \
88 ((info & MASTER_DEVICE) >> MASTER_DEVICE_BIT)
89#define griommu_get_master_routing(info) \
90 ((info & MASTER_BS) >> MASTER_BS_BIT)
91#define griommu_get_master_group(info) \
92 ((info & MASTER_GROUP) >> MASTER_GROUP_BIT)
95#define GRIOMMU_OPTIONS_GROUP_PASSTHROUGH 2
96#define GRIOMMU_OPTIONS_GROUP_ENABLE 1
97#define GRIOMMU_OPTIONS_GROUP_DISABLE 0
98extern int griommu_group_setup(
int group,
void * apv,
int options);
99extern int griommu_group_info(
int group, uint32_t * info);
100#define GRIOMMU_OPTIONS_APV_ALLOW 0x1
101#define GRIOMMU_OPTIONS_APV_DONTALLOW 0x0
102extern int griommu_group_apv_init(
int group,
int options);
103extern int griommu_group_apv_address_set(
int group, uint32_t addr,
int size,
105extern int griommu_group_apv_page_set(
int group,
int index,
int size,
107extern int griommu_group_apv_flush(
int group);
113#define CTRL_PGSZ (0x7 << CTRL_PGSZ_BIT)
114#define CTRL_LB (0x1 << CTRL_LB_BIT)
115#define CTRL_SP (0x1 << CTRL_SP_BIT)
116#define CTRL_ITR (0xf << CTRL_ITR_BIT)
117#define CTRL_DP (0x1 << CTRL_DP_BIT)
118#define CTRL_SIV (0x1 << CTRL_SIV_BIT)
119#define CTRL_HPROT (0x3 << CTRL_HPROT_BIT)
120#define CTRL_AU (0x1 << CTRL_AU_BIT)
121#define CTRL_WP (0x1 << CTRL_WP_BIT)
122#define CTRL_DM (0x1 << CTRL_DM_BIT)
123#define CTRL_GS (0x1 << CTRL_GS_BIT)
124#define CTRL_CE (0x1 << CTRL_CE_BIT)
125#define CTRL_PM (0x3 << CTRL_PM_BIT)
126#define CTRL_PM_APV (0x0 << CTRL_PM_BIT)
127#define CTRL_PM_IOMMU (0x1 << CTRL_PM_BIT)
128#define CTRL_EN (0x1 << CTRL_EN_BIT)
130#define CTRL_PGSZ_BIT 18
131#define CTRL_LB_BIT 17
132#define CTRL_SP_BIT 16
133#define CTRL_ITR_BIT 12
134#define CTRL_DP_BIT 11
135#define CTRL_SIV_BIT 10
136#define CTRL_HPROT_BIT 8
145#define GRIOMMU_OPTIONS_LOOKUPBUS_BUS0 0
146#define GRIOMMU_OPTIONS_LOOKUPBUS_BUS1 CTRL_LB
147#define GRIOMMU_OPTIONS_CACHE_DISABLE 0
148#define GRIOMMU_OPTIONS_CACHE_ENABLE CTRL_CE
149#define GRIOMMU_OPTIONS_GROUPADDRESSING_DISABLE 0
150#define GRIOMMU_OPTIONS_GROUPADDRESSING_ENABLE CTRL_GS
151#define GRIOMMU_OPTIONS_WPROTONLY_DISABLE 0
152#define GRIOMMU_OPTIONS_WPROTONLY_ENABLE CTRL_WP
153#define GRIOMMU_OPTIONS_AHBUPDATE_DISABLE 0
154#define GRIOMMU_OPTIONS_AHBUPDATE_ENABLE CTRL_AU
155#define GRIOMMU_OPTIONS_PREFETCH_DISABLE CTRL_DP
156#define GRIOMMU_OPTIONS_PREFETCH_ENABLE 0
157#define GRIOMMU_OPTIONS_PAGESIZE_4KIB 0
158#define GRIOMMU_OPTIONS_PAGESIZE_8KIB (0x1 << CTRL_PGSZ_BIT)
159#define GRIOMMU_OPTIONS_PAGESIZE_16KIB (0x2 << CTRL_PGSZ_BIT)
160#define GRIOMMU_OPTIONS_PAGESIZE_32KIB (0x3 << CTRL_PGSZ_BIT)
161#define GRIOMMU_OPTIONS_PAGESIZE_64KIB (0x4 << CTRL_PGSZ_BIT)
162#define GRIOMMU_OPTIONS_PAGESIZE_128KIB (0x5 << CTRL_PGSZ_BIT)
163#define GRIOMMU_OPTIONS_PAGESIZE_256KIB (0x6 << CTRL_PGSZ_BIT)
164#define GRIOMMU_OPTIONS_PAGESIZE_512KIB (0x7 << CTRL_PGSZ_BIT)
165extern int griommu_setup(
int options);
166extern int griommu_status(
void);
168#define GRIOMMU_MODE_IOMMU 1
169#define GRIOMMU_MODE_GROUPAPV 0
170extern int griommu_enable(
int mode);
171extern int griommu_disable(
void);
174extern int griommu_apv_flush(
void);
175extern int griommu_apv_init(
void * apv,
int options);
176extern int griommu_apv_address_set(
void * apv, uint32_t addr,
int size,
178extern int griommu_apv_page_set(
void * apv,
int index,
int size,
int options);
186typedef void (*griommu_isr_t)(
void *arg, uint32_t access, uint32_t status);
187#define GRIOMMU_INTERRUPT_ALL (0x2f << 0)
188#define GRIOMMU_INTERRUPT_PARITY_ERROR (0x1 << 5)
189#define GRIOMMU_INTERRUPT_FLUSH_COMPLETED (0x1 << 3)
190#define GRIOMMU_INTERRUPT_FLUSH_START (0x1 << 2)
191#define GRIOMMU_INTERRUPT_ACCESS_DENIED (0x1 << 1)
192#define GRIOMMU_INTERRUPT_TRANSLATION_ERROR (0x1 << 0)
193extern int griommu_isr_register(griommu_isr_t isr,
void * arg,
int options);
194extern int griommu_isr_unregister(
void);
195extern int griommu_interrupt_unmask(
int options);
196extern int griommu_interrupt_mask(
int options);
198extern int griommu_error_status(uint32_t * access);
200extern int griommu_print(
void);