fsl_snvs_lp.h

/*
 * Copyright (c) 2016, Freescale Semiconductor, Inc.
 * Copyright 2017-2022, NXP
 * All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */
 
#ifndef _FSL_SNVS_LP_H_
#define _FSL_SNVS_LP_H_
 
#include "fsl_common.h"
 
/*******************************************************************************
 * Definitions
 ******************************************************************************/
 
#define FSL_SNVS_LP_DRIVER_VERSION (MAKE_VERSION(2, 4, 4)) 
 
#define SNVS_ZMK_REG_COUNT 8U /* 8 Zeroizable Master Key registers. */
 
typedef enum _snvs_lp_srtc_interrupts
{
    kSNVS_SRTC_AlarmInterrupt = SNVS_LPCR_LPTA_EN_MASK, 
} snvs_lp_srtc_interrupts_t;
 
typedef enum _snvs_lp_srtc_status_flags
{
    kSNVS_SRTC_AlarmInterruptFlag = SNVS_LPSR_LPTA_MASK, 
} snvs_lp_srtc_status_flags_t;
 
#if defined(FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER) && (FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER > 0)
 
typedef enum _snvs_lp_external_tamper
{
    kSNVS_ExternalTamper1 = 1U,
#if defined(FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER) && (FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER > 1)
    kSNVS_ExternalTamper2  = 2U,
    kSNVS_ExternalTamper3  = 3U,
    kSNVS_ExternalTamper4  = 4U,
    kSNVS_ExternalTamper5  = 5U,
    kSNVS_ExternalTamper6  = 6U,
    kSNVS_ExternalTamper7  = 7U,
    kSNVS_ExternalTamper8  = 8U,
    kSNVS_ExternalTamper9  = 9U,
    kSNVS_ExternalTamper10 = 10U
#endif /* defined(FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER) && (FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER > 1) */
} snvs_lp_external_tamper_t;
 
#endif /* defined(FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER) && (FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER > 0) */
 
#if defined(FSL_FEATURE_SNVS_HAS_ACTIVE_TAMPERS) && (FSL_FEATURE_SNVS_HAS_ACTIVE_TAMPERS > 0)
typedef enum _snvs_lp_active_tamper
{
    kSNVS_ActiveTamper1 = 1U,
    kSNVS_ActiveTamper2 = 2U,
    kSNVS_ActiveTamper3 = 3U,
    kSNVS_ActiveTamper4 = 4U,
    kSNVS_ActiveTamper5 = 5U,
} snvs_lp_active_tx_tamper_t;
 
typedef enum _snvs_lp_active_clock
{
    kSNVS_ActiveTamper16HZ = 0U,
    kSNVS_ActiveTamper8HZ  = 1U,
    kSNVS_ActiveTamper4HZ  = 2U,
    kSNVS_ActiveTamper2HZ  = 3U
} snvs_lp_active_clock_t;
 
typedef struct
{
    uint16_t polynomial;
    uint16_t seed;
    snvs_lp_active_clock_t clock;
} tamper_active_tx_config_t;
 
typedef struct
{
    uint16_t filterenable;
    uint8_t filter;
    snvs_lp_active_tx_tamper_t activeTamper;
} tamper_active_rx_config_t;
 
#endif /* FSL_FEATURE_SNVS_HAS_ACTIVE_TAMPERS */
 
typedef struct
{
    uint8_t polarity;
#if defined(FSL_FEATURE_SNVS_PASSIVE_TAMPER_FILTER) && (FSL_FEATURE_SNVS_PASSIVE_TAMPER_FILTER > 0)
    uint8_t filterenable;
    uint8_t filter;
#endif /* FSL_FEATURE_SNVS_PASSIVE_TAMPER_FILTER */
} snvs_lp_passive_tamper_t;
 
/* define max possible tamper present */
#if defined(FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER) && (FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER > 1)
#define SNVS_LP_MAX_TAMPER kSNVS_ExternalTamper10
#else
#define SNVS_LP_MAX_TAMPER kSNVS_ExternalTamper1
#endif
 
typedef enum _snvs_lp_external_tamper_status
{
    kSNVS_TamperNotDetected = 0U,
    kSNVS_TamperDetected    = 1U
} snvs_lp_external_tamper_status_t;
 
typedef enum _snvs_lp_external_tamper_polarity
{
    kSNVS_ExternalTamperActiveLow  = 0U,
    kSNVS_ExternalTamperActiveHigh = 1U
} snvs_lp_external_tamper_polarity_t;
 
typedef struct _snvs_lp_srtc_datetime
{
    uint16_t year;  
    uint8_t month;  
    uint8_t day;    
    uint8_t hour;   
    uint8_t minute; 
    uint8_t second; 
} snvs_lp_srtc_datetime_t;
 
typedef struct _snvs_lp_srtc_config
{
    bool srtcCalEnable;    
    uint32_t srtcCalValue; 
} snvs_lp_srtc_config_t;
 
typedef enum _snvs_lp_zmk_program_mode
{
    kSNVS_ZMKSoftwareProgram, 
    kSNVS_ZMKHardwareProgram, 
} snvs_lp_zmk_program_mode_t;
 
typedef enum _snvs_lp_master_key_mode
{
    kSNVS_OTPMK = 0, 
    kSNVS_ZMK   = 2, 
    kSNVS_CMK   = 3, 
} snvs_lp_master_key_mode_t;
 
/*******************************************************************************
 * API
 ******************************************************************************/
 
#if defined(__cplusplus)
extern "C" {
#endif
 
void SNVS_LP_Init(SNVS_Type *base);
 
void SNVS_LP_Deinit(SNVS_Type *base);
 
void SNVS_LP_SRTC_Init(SNVS_Type *base, const snvs_lp_srtc_config_t *config);
 
void SNVS_LP_SRTC_Deinit(SNVS_Type *base);
 
void SNVS_LP_SRTC_GetDefaultConfig(snvs_lp_srtc_config_t *config);
 
status_t SNVS_LP_SRTC_SetDatetime(SNVS_Type *base, const snvs_lp_srtc_datetime_t *datetime);
 
void SNVS_LP_SRTC_GetDatetime(SNVS_Type *base, snvs_lp_srtc_datetime_t *datetime);
 
status_t SNVS_LP_SRTC_SetAlarm(SNVS_Type *base, const snvs_lp_srtc_datetime_t *alarmTime);
 
void SNVS_LP_SRTC_GetAlarm(SNVS_Type *base, snvs_lp_srtc_datetime_t *datetime);
 
static inline void SNVS_LP_SRTC_EnableInterrupts(SNVS_Type *base, uint32_t mask)
{
    base->LPCR |= mask;
}
 
static inline void SNVS_LP_SRTC_DisableInterrupts(SNVS_Type *base, uint32_t mask)
{
    base->LPCR &= ~mask;
}
 
uint32_t SNVS_LP_SRTC_GetEnabledInterrupts(SNVS_Type *base);
 
uint32_t SNVS_LP_SRTC_GetStatusFlags(SNVS_Type *base);
 
static inline void SNVS_LP_SRTC_ClearStatusFlags(SNVS_Type *base, uint32_t mask)
{
    base->LPSR |= mask;
}
 
static inline void SNVS_LP_SRTC_StartTimer(SNVS_Type *base)
{
    base->LPCR |= SNVS_LPCR_SRTC_ENV_MASK;
    while ((0U == (base->LPCR & SNVS_LPCR_SRTC_ENV_MASK)))
    {
    }
}
 
static inline void SNVS_LP_SRTC_StopTimer(SNVS_Type *base)
{
    base->LPCR &= ~SNVS_LPCR_SRTC_ENV_MASK;
    while ((base->LPCR & SNVS_LPCR_SRTC_ENV_MASK) != 0U)
    {
    }
}
 
#if defined(FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER) && (FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER > 0)
 
void SNVS_LP_EnablePassiveTamper(SNVS_Type *base, snvs_lp_external_tamper_t pin, snvs_lp_passive_tamper_t config);
 
#endif /* defined(FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER) && (FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER > 0) */
 
#if defined(FSL_FEATURE_SNVS_HAS_ACTIVE_TAMPERS) && (FSL_FEATURE_SNVS_HAS_ACTIVE_TAMPERS > 0)
status_t SNVS_LP_EnableTxActiveTamper(SNVS_Type *base,
                                      snvs_lp_active_tx_tamper_t pin,
                                      tamper_active_tx_config_t config);
 
status_t SNVS_LP_EnableRxActiveTamper(SNVS_Type *base, snvs_lp_external_tamper_t rx, tamper_active_rx_config_t config);
 
status_t SNVS_LP_SetVoltageTamper(SNVS_Type *base, bool enable);
 
status_t SNVS_LP_SetTemperatureTamper(SNVS_Type *base, bool enable);
 
status_t SNVS_LP_SetClockTamper(SNVS_Type *base, bool enable);
 
snvs_lp_external_tamper_status_t SNVS_LP_CheckVoltageTamper(SNVS_Type *base);
 
snvs_lp_external_tamper_status_t SNVS_LP_CheckTemperatureTamper(SNVS_Type *base);
 
snvs_lp_external_tamper_status_t SNVS_LP_CheckClockTamper(SNVS_Type *base);
 
void SNVS_LP_TamperPinTx_GetDefaultConfig(tamper_active_tx_config_t *config);
 
void SNVS_LP_TamperPinRx_GetDefaultConfig(tamper_active_rx_config_t *config);
#endif /* defined(FSL_FEATURE_SNVS_HAS_ACTIVE_TAMPERS) && (FSL_FEATURE_SNVS_HAS_ACTIVE_TAMPERS > 0) */
 
void SNVS_LP_PassiveTamperPin_GetDefaultConfig(snvs_lp_passive_tamper_t *config);
 
#if defined(FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER) && (FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER > 0)
 
void SNVS_LP_DisableExternalTamper(SNVS_Type *base, snvs_lp_external_tamper_t pin);
 
void SNVS_LP_DisableAllExternalTamper(SNVS_Type *base);
 
snvs_lp_external_tamper_status_t SNVS_LP_GetExternalTamperStatus(SNVS_Type *base, snvs_lp_external_tamper_t pin);
 
void SNVS_LP_ClearExternalTamperStatus(SNVS_Type *base, snvs_lp_external_tamper_t pin);
 
void SNVS_LP_ClearAllExternalTamperStatus(SNVS_Type *base);
 
#endif /* defined(FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER) && (FSL_FEATURE_SNVS_HAS_MULTIPLE_TAMPER > 0) */
 
static inline void SNVS_LP_EnableMonotonicCounter(SNVS_Type *base, bool enable)
{
    if (enable)
    {
        base->LPCR |= SNVS_LPCR_MC_ENV_MASK;
    }
    else
    {
        base->LPCR &= (~SNVS_LPCR_MC_ENV_MASK);
    }
}
 
uint64_t SNVS_LP_GetMonotonicCounter(SNVS_Type *base);
 
static inline void SNVS_LP_IncreaseMonotonicCounter(SNVS_Type *base)
{
    /* Write to the LPSMCLR or LPSMCLR, the counter increases. */
    *((volatile uint32_t *)(uint32_t)(&(base->LPSMCLR))) = 0xFFFFFFFFU;
}
 
void SNVS_LP_WriteZeroizableMasterKey(SNVS_Type *base, uint32_t ZMKey[SNVS_ZMK_REG_COUNT]);
 
static inline void SNVS_LP_SetZeroizableMasterKeyValid(SNVS_Type *base, bool valid)
{
    if (valid)
    {
        base->LPMKCR |= SNVS_LPMKCR_ZMK_VAL_MASK;
    }
    else
    {
        base->LPMKCR &= (~SNVS_LPMKCR_ZMK_VAL_MASK);
    }
}
 
static inline bool SNVS_LP_GetZeroizableMasterKeyValid(SNVS_Type *base)
{
    return (SNVS_LPMKCR_ZMK_VAL_MASK == (base->LPMKCR & SNVS_LPMKCR_ZMK_VAL_MASK));
}
 
static inline void SNVS_LP_SetZeroizableMasterKeyProgramMode(SNVS_Type *base, snvs_lp_zmk_program_mode_t mode)
{
    if (kSNVS_ZMKSoftwareProgram == mode)
    {
        base->LPMKCR &= (~SNVS_LPMKCR_ZMK_HWP_MASK);
    }
    else
    {
        base->LPMKCR |= SNVS_LPMKCR_ZMK_HWP_MASK;
    }
}
 
static inline void SNVS_LP_EnableZeroizableMasterKeyECC(SNVS_Type *base, bool enable)
{
    if (enable)
    {
        base->LPMKCR |= SNVS_LPMKCR_ZMK_ECC_EN_MASK;
    }
    else
    {
        base->LPMKCR &= (~SNVS_LPMKCR_ZMK_ECC_EN_MASK);
    }
}
 
static inline void SNVS_LP_SetMasterKeyMode(SNVS_Type *base, snvs_lp_master_key_mode_t mode)
{
    uint32_t lpmkcr = base->LPMKCR;
    lpmkcr          = (lpmkcr & (~SNVS_LPMKCR_MASTER_KEY_SEL_MASK)) | SNVS_LPMKCR_MASTER_KEY_SEL(mode);
    base->LPMKCR    = lpmkcr;
}
 
#if defined(FSL_FEATURE_SNVS_HAS_STATE_TRANSITION) && (FSL_FEATURE_SNVS_HAS_STATE_TRANSITION > 0)
status_t SNVS_LP_SSM_State_Transition(SNVS_Type *base);
#endif /* FSL_FEATURE_SNVS_HAS_STATE_TRANSITION */
 
#if defined(__cplusplus)
}
#endif
 
#endif /* _FSL_SNVS_LP_H_ */