fsl_edma.h

/*
 * Copyright (c) 2015, Freescale Semiconductor, Inc.
 * Copyright 2016-2022 NXP
 * All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */
 
#ifndef _FSL_EDMA_H_
#define _FSL_EDMA_H_
 
#include "fsl_common.h"
 
/*******************************************************************************
 * Definitions
 ******************************************************************************/
 
#define FSL_EDMA_DRIVER_VERSION (MAKE_VERSION(2, 4, 3)) 
 
#define DMA_DCHPRI_INDEX(channel) (((channel) & ~0x03U) | (3U - ((channel)&0x03U)))
 
typedef enum _edma_transfer_size
{
    kEDMA_TransferSize1Bytes  = 0x0U, 
    kEDMA_TransferSize2Bytes  = 0x1U, 
    kEDMA_TransferSize4Bytes  = 0x2U, 
    kEDMA_TransferSize8Bytes  = 0x3U, 
    kEDMA_TransferSize16Bytes = 0x4U, 
    kEDMA_TransferSize32Bytes = 0x5U, 
} edma_transfer_size_t;
 
typedef enum _edma_modulo
{
    kEDMA_ModuloDisable = 0x0U, 
    kEDMA_Modulo2bytes,         
    kEDMA_Modulo4bytes,         
    kEDMA_Modulo8bytes,         
    kEDMA_Modulo16bytes,        
    kEDMA_Modulo32bytes,        
    kEDMA_Modulo64bytes,        
    kEDMA_Modulo128bytes,       
    kEDMA_Modulo256bytes,       
    kEDMA_Modulo512bytes,       
    kEDMA_Modulo1Kbytes,        
    kEDMA_Modulo2Kbytes,        
    kEDMA_Modulo4Kbytes,        
    kEDMA_Modulo8Kbytes,        
    kEDMA_Modulo16Kbytes,       
    kEDMA_Modulo32Kbytes,       
    kEDMA_Modulo64Kbytes,       
    kEDMA_Modulo128Kbytes,      
    kEDMA_Modulo256Kbytes,      
    kEDMA_Modulo512Kbytes,      
    kEDMA_Modulo1Mbytes,        
    kEDMA_Modulo2Mbytes,        
    kEDMA_Modulo4Mbytes,        
    kEDMA_Modulo8Mbytes,        
    kEDMA_Modulo16Mbytes,       
    kEDMA_Modulo32Mbytes,       
    kEDMA_Modulo64Mbytes,       
    kEDMA_Modulo128Mbytes,      
    kEDMA_Modulo256Mbytes,      
    kEDMA_Modulo512Mbytes,      
    kEDMA_Modulo1Gbytes,        
    kEDMA_Modulo2Gbytes,        
} edma_modulo_t;
 
typedef enum _edma_bandwidth
{
    kEDMA_BandwidthStallNone   = 0x0U, 
    kEDMA_BandwidthStall4Cycle = 0x2U, 
    kEDMA_BandwidthStall8Cycle = 0x3U, 
} edma_bandwidth_t;
 
typedef enum _edma_channel_link_type
{
    kEDMA_LinkNone = 0x0U, 
    kEDMA_MinorLink,       
    kEDMA_MajorLink,       
} edma_channel_link_type_t;
 
enum
{
    kEDMA_DoneFlag      = 0x1U, 
    kEDMA_ErrorFlag     = 0x2U, 
    kEDMA_InterruptFlag = 0x4U, 
};
 
enum
{
    kEDMA_DestinationBusErrorFlag    = DMA_ES_DBE_MASK, 
    kEDMA_SourceBusErrorFlag         = DMA_ES_SBE_MASK, 
    kEDMA_ScatterGatherErrorFlag     = DMA_ES_SGE_MASK, 
    kEDMA_NbytesErrorFlag            = DMA_ES_NCE_MASK, 
    kEDMA_DestinationOffsetErrorFlag = DMA_ES_DOE_MASK, 
    kEDMA_DestinationAddressErrorFlag = DMA_ES_DAE_MASK, 
    kEDMA_SourceOffsetErrorFlag       = DMA_ES_SOE_MASK, 
    kEDMA_SourceAddressErrorFlag      = DMA_ES_SAE_MASK, 
    kEDMA_ErrorChannelFlag            = DMA_ES_ERRCHN_MASK, 
    kEDMA_ChannelPriorityErrorFlag    = DMA_ES_CPE_MASK,    
    kEDMA_TransferCanceledFlag        = DMA_ES_ECX_MASK,    
#if defined(FSL_FEATURE_EDMA_CHANNEL_GROUP_COUNT) && (FSL_FEATURE_EDMA_CHANNEL_GROUP_COUNT > 1)
    kEDMA_GroupPriorityErrorFlag = DMA_ES_GPE_MASK, 
#endif
    kEDMA_ValidFlag = (int)DMA_ES_VLD_MASK, 
};
 
typedef enum _edma_interrupt_enable
{
    kEDMA_ErrorInterruptEnable = 0x1U,                  
    kEDMA_MajorInterruptEnable = DMA_CSR_INTMAJOR_MASK, 
    kEDMA_HalfInterruptEnable  = DMA_CSR_INTHALF_MASK,  
} edma_interrupt_enable_t;
 
typedef enum _edma_transfer_type
{
    kEDMA_MemoryToMemory = 0x0U,  
    kEDMA_PeripheralToMemory,     
    kEDMA_MemoryToPeripheral,     
    kEDMA_PeripheralToPeripheral, 
} edma_transfer_type_t;
 
enum
{
    kStatus_EDMA_QueueFull = MAKE_STATUS(kStatusGroup_EDMA, 0), 
    kStatus_EDMA_Busy      = MAKE_STATUS(kStatusGroup_EDMA, 1), 
};
 
typedef struct _edma_config
{
    bool enableContinuousLinkMode;    
    bool enableHaltOnError;           
    bool enableRoundRobinArbitration; 
    bool enableDebugMode; 
} edma_config_t;
 
typedef struct _edma_transfer_config
{
    uint32_t srcAddr;                      
    uint32_t destAddr;                     
    edma_transfer_size_t srcTransferSize;  
    edma_transfer_size_t destTransferSize; 
    int16_t srcOffset;                     
    int16_t destOffset;                    
    uint32_t minorLoopBytes;               
    uint32_t majorLoopCounts;              
} edma_transfer_config_t;
 
typedef struct _edma_channel_Preemption_config
{
    bool enableChannelPreemption; 
    bool enablePreemptAbility;    
    uint8_t channelPriority;      
} edma_channel_Preemption_config_t;
 
typedef struct _edma_minor_offset_config
{
    bool enableSrcMinorOffset;  
    bool enableDestMinorOffset; 
    uint32_t minorOffset;       
} edma_minor_offset_config_t;
 
typedef struct _edma_tcd
{
    __IO uint32_t SADDR;     
    __IO uint16_t SOFF;      
    __IO uint16_t ATTR;      
    __IO uint32_t NBYTES;    
    __IO uint32_t SLAST;     
    __IO uint32_t DADDR;     
    __IO uint16_t DOFF;      
    __IO uint16_t CITER;     
    __IO uint32_t DLAST_SGA; 
    __IO uint16_t CSR;       
    __IO uint16_t BITER;     
} edma_tcd_t;
 
struct _edma_handle;
 
typedef void (*edma_callback)(struct _edma_handle *handle, void *userData, bool transferDone, uint32_t tcds);
 
typedef struct _edma_handle
{
    edma_callback callback; 
    void *userData;         
    DMA_Type *base;         
    edma_tcd_t *tcdPool;    
    uint8_t channel;        
    volatile int8_t header; 
    volatile int8_t tail;   
    volatile int8_t tcdUsed; 
    volatile int8_t tcdSize; 
    uint8_t flags;           
} edma_handle_t;
 
/*******************************************************************************
 * APIs
 ******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus */
 
void EDMA_Init(DMA_Type *base, const edma_config_t *config);
 
void EDMA_Deinit(DMA_Type *base);
 
void EDMA_InstallTCD(DMA_Type *base, uint32_t channel, edma_tcd_t *tcd);
 
void EDMA_GetDefaultConfig(edma_config_t *config);
 
static inline void EDMA_EnableContinuousChannelLinkMode(DMA_Type *base, bool enable)
{
    if (enable)
    {
        base->CR |= DMA_CR_CLM_MASK;
    }
    else
    {
        base->CR &= ~DMA_CR_CLM_MASK;
    }
}
 
static inline void EDMA_EnableMinorLoopMapping(DMA_Type *base, bool enable)
{
    if (enable)
    {
        base->CR |= DMA_CR_EMLM_MASK;
    }
    else
    {
        base->CR &= ~DMA_CR_EMLM_MASK;
    }
}
 
/* @} */
void EDMA_ResetChannel(DMA_Type *base, uint32_t channel);
 
void EDMA_SetTransferConfig(DMA_Type *base,
                            uint32_t channel,
                            const edma_transfer_config_t *config,
                            edma_tcd_t *nextTcd);
 
void EDMA_SetMinorOffsetConfig(DMA_Type *base, uint32_t channel, const edma_minor_offset_config_t *config);
 
void EDMA_SetChannelPreemptionConfig(DMA_Type *base, uint32_t channel, const edma_channel_Preemption_config_t *config);
 
void EDMA_SetChannelLink(DMA_Type *base, uint32_t channel, edma_channel_link_type_t linkType, uint32_t linkedChannel);
 
void EDMA_SetBandWidth(DMA_Type *base, uint32_t channel, edma_bandwidth_t bandWidth);
 
void EDMA_SetModulo(DMA_Type *base, uint32_t channel, edma_modulo_t srcModulo, edma_modulo_t destModulo);
 
#if defined(FSL_FEATURE_EDMA_ASYNCHRO_REQUEST_CHANNEL_COUNT) && FSL_FEATURE_EDMA_ASYNCHRO_REQUEST_CHANNEL_COUNT
static inline void EDMA_EnableAsyncRequest(DMA_Type *base, uint32_t channel, bool enable)
{
    assert(channel < (uint32_t)FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
 
    base->EARS &= ~((uint32_t)1U << channel);
    base->EARS |= ((uint32_t)(true == enable ? 1U : 0U) << channel);
}
#endif /* FSL_FEATURE_EDMA_ASYNCHRO_REQUEST_CHANNEL_COUNT */
 
static inline void EDMA_EnableAutoStopRequest(DMA_Type *base, uint32_t channel, bool enable)
{
    assert(channel < (uint32_t)FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
 
    base->TCD[channel].CSR =
        (uint16_t)((base->TCD[channel].CSR & (~DMA_CSR_DREQ_MASK)) | DMA_CSR_DREQ((true == enable ? 1U : 0U)));
}
 
void EDMA_EnableChannelInterrupts(DMA_Type *base, uint32_t channel, uint32_t mask);
 
void EDMA_DisableChannelInterrupts(DMA_Type *base, uint32_t channel, uint32_t mask);
 
void EDMA_SetMajorOffsetConfig(DMA_Type *base, uint32_t channel, int32_t sourceOffset, int32_t destOffset);
 
/* @} */
void EDMA_TcdReset(edma_tcd_t *tcd);
 
void EDMA_TcdSetTransferConfig(edma_tcd_t *tcd, const edma_transfer_config_t *config, edma_tcd_t *nextTcd);
 
void EDMA_TcdSetMinorOffsetConfig(edma_tcd_t *tcd, const edma_minor_offset_config_t *config);
 
void EDMA_TcdSetChannelLink(edma_tcd_t *tcd, edma_channel_link_type_t linkType, uint32_t linkedChannel);
 
static inline void EDMA_TcdSetBandWidth(edma_tcd_t *tcd, edma_bandwidth_t bandWidth)
{
    assert(tcd != NULL);
    assert(((uint32_t)tcd & 0x1FU) == 0U);
 
    tcd->CSR = (uint16_t)((tcd->CSR & (~DMA_CSR_BWC_MASK)) | DMA_CSR_BWC(bandWidth));
}
 
void EDMA_TcdSetModulo(edma_tcd_t *tcd, edma_modulo_t srcModulo, edma_modulo_t destModulo);
 
static inline void EDMA_TcdEnableAutoStopRequest(edma_tcd_t *tcd, bool enable)
{
    assert(tcd != NULL);
    assert(((uint32_t)tcd & 0x1FU) == 0U);
 
    tcd->CSR = (uint16_t)((tcd->CSR & (~DMA_CSR_DREQ_MASK)) | DMA_CSR_DREQ((true == enable ? 1U : 0U)));
}
 
void EDMA_TcdEnableInterrupts(edma_tcd_t *tcd, uint32_t mask);
 
void EDMA_TcdDisableInterrupts(edma_tcd_t *tcd, uint32_t mask);
 
void EDMA_TcdSetMajorOffsetConfig(edma_tcd_t *tcd, int32_t sourceOffset, int32_t destOffset);
 
static inline void EDMA_EnableChannelRequest(DMA_Type *base, uint32_t channel)
{
    assert(channel < (uint32_t)FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
 
    base->SERQ = DMA_SERQ_SERQ(channel);
}
 
static inline void EDMA_DisableChannelRequest(DMA_Type *base, uint32_t channel)
{
    assert(channel < (uint32_t)FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
 
    base->CERQ = DMA_CERQ_CERQ(channel);
}
 
static inline void EDMA_TriggerChannelStart(DMA_Type *base, uint32_t channel)
{
    assert(channel < (uint32_t)FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
 
    base->SSRT = DMA_SSRT_SSRT(channel);
}
 
uint32_t EDMA_GetRemainingMajorLoopCount(DMA_Type *base, uint32_t channel);
 
static inline uint32_t EDMA_GetErrorStatusFlags(DMA_Type *base)
{
    return base->ES;
}
 
uint32_t EDMA_GetChannelStatusFlags(DMA_Type *base, uint32_t channel);
 
void EDMA_ClearChannelStatusFlags(DMA_Type *base, uint32_t channel, uint32_t mask);
 
void EDMA_CreateHandle(edma_handle_t *handle, DMA_Type *base, uint32_t channel);
 
void EDMA_InstallTCDMemory(edma_handle_t *handle, edma_tcd_t *tcdPool, uint32_t tcdSize);
 
void EDMA_SetCallback(edma_handle_t *handle, edma_callback callback, void *userData);
 
void EDMA_PrepareTransferConfig(edma_transfer_config_t *config,
                                void *srcAddr,
                                uint32_t srcWidth,
                                int16_t srcOffset,
                                void *destAddr,
                                uint32_t destWidth,
                                int16_t destOffset,
                                uint32_t bytesEachRequest,
                                uint32_t transferBytes);
 
void EDMA_PrepareTransfer(edma_transfer_config_t *config,
                          void *srcAddr,
                          uint32_t srcWidth,
                          void *destAddr,
                          uint32_t destWidth,
                          uint32_t bytesEachRequest,
                          uint32_t transferBytes,
                          edma_transfer_type_t transferType);
 
status_t EDMA_SubmitTransfer(edma_handle_t *handle, const edma_transfer_config_t *config);
 
void EDMA_StartTransfer(edma_handle_t *handle);
 
void EDMA_StopTransfer(edma_handle_t *handle);
 
void EDMA_AbortTransfer(edma_handle_t *handle);
 
static inline uint32_t EDMA_GetUnusedTCDNumber(edma_handle_t *handle)
{
    int8_t tmpTcdSize = handle->tcdSize;
    int8_t tmpTcdUsed = handle->tcdUsed;
    return ((uint32_t)tmpTcdSize - (uint32_t)tmpTcdUsed);
}
 
static inline uint32_t EDMA_GetNextTCDAddress(edma_handle_t *handle)
{
    return (uint32_t)(handle->base->TCD[handle->channel].DLAST_SGA);
}
 
void EDMA_HandleIRQ(edma_handle_t *handle);
 
/* @} */
 
#if defined(__cplusplus)
}
#endif /* __cplusplus */
 
/* @} */
 
#endif /*_FSL_EDMA_H_*/