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RTEMS 6.1-rc1
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Go to the source code of this file.
Functions | |
void | Xil_DCacheEnable (void) |
Enable the Data cache. More... | |
void | Xil_DCacheDisable (void) |
Disable the Data cache. More... | |
void | Xil_DCacheInvalidate (void) |
Invalidate the Data cache. The contents present in the cache are cleaned and invalidated. More... | |
void | Xil_DCacheInvalidateRange (INTPTR adr, u32 len) |
Invalidate the Data cache for the given address range. If the bytes specified by the address (adr) are cached by the Data cache,the cacheline containing that byte is invalidated. If the cacheline is modified (dirty), the modified contents are lost and are NOT written to system memory before the line is invalidated. More... | |
void | Xil_DCacheFlush (void) |
Flush the Data cache. More... | |
void | Xil_DCacheFlushRange (INTPTR adr, u32 len) |
Flush the Data cache for the given address range. If the bytes specified by the address (adr) are cached by the Data cache, the cacheline containing those bytes is invalidated.If the cacheline is modified (dirty), the written to system memory before the lines are invalidated. More... | |
void | Xil_ICacheEnable (void) |
Enable the instruction cache. More... | |
void | Xil_ICacheDisable (void) |
Disable the instruction cache. More... | |
void | Xil_ICacheInvalidate (void) |
Invalidate the entire instruction cache. More... | |
void | Xil_ICacheInvalidateRange (INTPTR adr, u32 len) |
Invalidate the instruction cache for the given address range. If the bytes specified by the address (adr) are cached by the Data cache, the cacheline containing that byte is invalidated. If the cachelineis modified (dirty), the modified contents are lost and are NOT written to system memory before the line is invalidated. More... | |