RTEMS 6.1-rc1
cpuimpl.h
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
9/*
10 * Copyright (c) 2013 embedded brains GmbH & Co. KG
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34#ifndef _RTEMS_SCORE_CPUIMPL_H
35#define _RTEMS_SCORE_CPUIMPL_H
36
37#include <rtems/score/cpu.h>
38
49#define CPU_PER_CPU_CONTROL_SIZE 0
50
51#define CPU_INTERRUPT_FRAME_SIZE 52
52
53#define CPU_THREAD_LOCAL_STORAGE_VARIANT 20
54
55#ifndef ASM
56
57#ifdef __cplusplus
58extern "C" {
59#endif
60
61RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error );
62
63static inline void _CPU_Context_volatile_clobber( uintptr_t pattern )
64{
65 (void) pattern;
66
67 /* TODO */
68}
69
70static inline void _CPU_Context_validate( uintptr_t pattern )
71{
72 (void) pattern;
73
74 while (1) {
75 /* TODO */
76 }
77}
78
79static inline void _CPU_Instruction_illegal( void )
80{
81 __asm__ volatile ( ".word 0" );
82}
83
84static inline void _CPU_Instruction_no_operation( void )
85{
86 __asm__ volatile ( "nop" );
87}
88
89static inline void _CPU_Use_thread_local_storage(
91)
92{
93 uint32_t tmp;
94 uint32_t cpu_index;
95
96#ifdef RTEMS_SMP
97 cpu_index = _CPU_SMP_Get_current_processor();
98#else
99 cpu_index = 0;
100#endif
101
102 __asm__ volatile (
103 "movl " RTEMS_XSTRING( I386_CONTEXT_CONTROL_GS_0_OFFSET ) "(%2), %0\n"
104 "movl %0, _Global_descriptor_table+24(,%1,8)\n"
105 "movl " RTEMS_XSTRING( I386_CONTEXT_CONTROL_GS_1_OFFSET ) "(%2), %0\n"
106 "movl %0, _Global_descriptor_table+28(,%1,8)\n"
107 "leal 24(,%1,8), %0\n"
108 "movl %0, %%gs\n"
109 : "=&r" ( tmp )
110 : "r" ( cpu_index ), "r" ( context )
111 : "memory"
112 );
113}
114
115static inline void *_CPU_Get_TLS_thread_pointer(
117)
118{
119 return (void *) &context->gs;
120}
121
122#ifdef __cplusplus
123}
124#endif
125
126#endif /* ASM */
127
130#endif /* _RTEMS_SCORE_CPUIMPL_H */
#define RTEMS_XSTRING(...)
Stringifies the expansion of the arguments.
Definition: basedefs.h:987
#define RTEMS_NO_RETURN
Tells the compiler in a function declaration that this function does not return.
Definition: basedefs.h:386
RTEMS_NO_RETURN void _CPU_Fatal_halt(uint32_t source, CPU_Uint32ptr error)
Definition: bsp_fatal_halt.c:31
uintptr_t CPU_Uint32ptr
Definition: cpu.h:557
register struct Per_CPU_Control *_SPARC_Per_CPU_current __asm__("g6")
The pointer to the current per-CPU control is available via register g6.
rtems_termios_device_context * context
Definition: console-config.c:62
Thread register context.
Definition: cpu.h:169