RTEMS
6.1-rc1
bsps
arm
tms570
include
bsp
ti_herc
reg_rti.h
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/* The header file is generated by make_header.py from RTI.json */
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/* Current script's version can be found at: */
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/* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
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/*
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* Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
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*
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* Czech Technical University in Prague
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* Zikova 1903/4
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* 166 36 Praha 6
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* Czech Republic
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* The views and conclusions contained in the software and documentation are those
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* of the authors and should not be interpreted as representing official policies,
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* either expressed or implied, of the FreeBSD Project.
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*/
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#ifndef LIBBSP_ARM_TMS570_RTI
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#define LIBBSP_ARM_TMS570_RTI
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#include <
bsp/utility.h
>
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typedef
struct
{
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uint32_t COMPx;
/*RTI Compare x Register*/
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uint32_t UDCPx;
/*RTI Update Compare x Register*/
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}
tms570_rti_compare_t
;
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typedef
struct
{
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uint32_t FRCx;
/*RTI Free Running Counter x Register*/
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uint32_t UCx;
/*RTI Up Counter x Register*/
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uint32_t CPUCx;
/*RTI Compare Up Counter x Register*/
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uint8_t reserved1 [4];
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uint32_t CAFRCx;
/*RTI Capture Free Running Counter x Register*/
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uint32_t CAUCx;
/*RTI Capture Up Counter x Register*/
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uint32_t rsvd[2];
/*Reserved*/
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}
tms570_rti_counter_t
;
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typedef
struct
{
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uint32_t GCTRL;
/*RTI Global Control Register*/
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uint32_t TBCTRL;
/*RTI Timebase Control Register*/
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uint32_t CAPCTRL;
/*RTI Capture Control Register*/
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uint32_t COMPCTRL;
/*RTI Compare Control Register*/
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tms570_rti_counter_t
CNT[2];
/*Counters*/
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tms570_rti_compare_t
CMP[4];
/*Compares*/
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uint32_t TBLCOMP;
/*RTI Timebase Low Compare Register*/
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uint32_t TBHCOMP;
/*RTI Timebase High Compare Register*/
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uint8_t reserved2 [8];
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uint32_t SETINTENA;
/*RTI Set Interrupt Enable Register*/
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uint32_t CLEARINTENA;
/*RTI Clear Interrupt Enable Register*/
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uint32_t INTFLAG;
/*RTI Interrupt Flag Register*/
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uint8_t reserved3 [4];
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uint32_t DWDCTRL;
/*Digital Watchdog Control Register*/
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uint32_t DWDPRLD;
/*Digital Watchdog Preload Register*/
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uint32_t WDSTATUS;
/*Watchdog Status Register*/
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uint32_t WDKEY;
/*RTI Watchdog Key Register*/
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uint32_t DWDCNTR;
/*RTI Digital Watchdog Down Counter Register*/
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uint32_t WWDRXNCTRL;
/*Digital Windowed Watchdog Reaction Control Register*/
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uint32_t WWDSIZECTRL;
/*Digital Windowed Watchdog Window Size Control Register*/
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uint32_t INTCLRENABLE;
/*RTI Compare Interrupt Clear Enable Register*/
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uint32_t COMP0CLR;
/*RTI Compare 0 Clear Register*/
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uint32_t COMP1CLR;
/*RTI Compare 1 Clear Register*/
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uint32_t COMP2CLR;
/*RTI Compare 2 Clear Register*/
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uint32_t COMP3CLR;
/*RTI Compare 3 Clear Register*/
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}
tms570_rti_t
;
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/*----------------------TMS570_RTI_COMPx----------------------*/
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/* field: COMPx - Compare x. */
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/* Whole 32 bits */
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/*----------------------TMS570_RTI_UDCPx----------------------*/
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/* field: UDCPx - Update compare x. */
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/* Whole 32 bits */
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/*----------------------TMS570_RTI_FRCx----------------------*/
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/* field: FRC0 - FRC0 */
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/* Whole 32 bits */
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/*-----------------------TMS570_RTI_UCx-----------------------*/
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/* field: UC0 - Up counter 0. */
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/* Whole 32 bits */
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/*----------------------TMS570_RTI_CPUCx----------------------*/
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/* field: CPUC0 - Compare up counter 0. This register holds the value that is compared with the up counter 0. */
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/* Whole 32 bits */
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/*---------------------TMS570_RTI_CAFRCx---------------------*/
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/* field: CAFRC0 - Capture free running counter 0. */
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/* Whole 32 bits */
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/*----------------------TMS570_RTI_CAUCx----------------------*/
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/* field: CAUC0 - Capture up counter 0. */
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/* Whole 32 bits */
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/*----------------------TMS570_RTI_rsvd----------------------*/
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/* field: CAUC0 - Capture up counter 0. */
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/* Whole 32 bits */
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/*----------------------TMS570_RTI_GCTRL----------------------*/
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/* field: NTUSEL - Select NTU signal. */
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#define TMS570_RTI_GCTRL_NTUSEL(val) BSP_FLD32(val,16, 19)
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#define TMS570_RTI_GCTRL_NTUSEL_GET(reg) BSP_FLD32GET(reg,16, 19)
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#define TMS570_RTI_GCTRL_NTUSEL_SET(reg,val) BSP_FLD32SET(reg, val,16, 19)
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/* field: COS - Continue on suspend. */
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#define TMS570_RTI_GCTRL_COS BSP_BIT32(15)
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/* field: CNT1EN - Counter 1 enable. This bit starts and stops counter block 1 (RTIUC1 and RTIFRC1). */
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#define TMS570_RTI_GCTRL_CNT1EN BSP_BIT32(1)
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/* field: CNT0EN - Counter 0 enable. This bit starts and stops counter block 0 (RTIUC0 and RTIFRC0). */
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#define TMS570_RTI_GCTRL_CNT0EN BSP_BIT32(0)
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/*---------------------TMS570_RTI_TBCTRL---------------------*/
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/* field: INC - Increment free running counter 0. */
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#define TMS570_RTI_TBCTRL_INC BSP_BIT32(1)
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/* field: TBEXT - Timebase external. */
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#define TMS570_RTI_TBCTRL_TBEXT BSP_BIT32(0)
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/*---------------------TMS570_RTI_CAPCTRL---------------------*/
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/* field: CAPCNTR1 - Capture counter 1. */
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#define TMS570_RTI_CAPCTRL_CAPCNTR1 BSP_BIT32(1)
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/* field: CAPCNTR0 - Capture counter 0. */
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#define TMS570_RTI_CAPCTRL_CAPCNTR0 BSP_BIT32(0)
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/*--------------------TMS570_RTI_COMPCTRL--------------------*/
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/* field: COMPSEL3 - Compare select 3. */
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#define TMS570_RTI_COMPCTRL_COMPSEL3 BSP_BIT32(12)
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/* field: COMPSEL2 - Compare select 2. */
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#define TMS570_RTI_COMPCTRL_COMPSEL2 BSP_BIT32(8)
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/* field: COMPSEL1 - Compare select 1. */
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#define TMS570_RTI_COMPCTRL_COMPSEL1 BSP_BIT32(4)
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/* field: COMPSEL0 - Compare select 0. */
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#define TMS570_RTI_COMPCTRL_COMPSEL0 BSP_BIT32(0)
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/*---------------------TMS570_RTI_TBLCOMP---------------------*/
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/* field: TBLCOMP - Timebase low compare value. */
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/* Whole 32 bits */
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/*---------------------TMS570_RTI_TBHCOMP---------------------*/
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/* field: TBHCOMP - Timebase high compare value. */
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/* Whole 32 bits */
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/*--------------------TMS570_RTI_SETINTENA--------------------*/
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/* field: SETOVL1INT - Set free running counter 1 overflow interrupt. */
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#define TMS570_RTI_SETINTENA_SETOVL1INT BSP_BIT32(18)
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/* field: SETOVL0INT - Set free running counter 0 overflow interrupt. */
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#define TMS570_RTI_SETINTENA_SETOVL0INT BSP_BIT32(17)
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/* field: SETTBINT - Set timebase interrupt. */
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#define TMS570_RTI_SETINTENA_SETTBINT BSP_BIT32(16)
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/* field: SETDMA3 - Set compare DMA request 3. */
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#define TMS570_RTI_SETINTENA_SETDMA3 BSP_BIT32(11)
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/* field: SETDMA2 - Set compare DMA request 2. */
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#define TMS570_RTI_SETINTENA_SETDMA2 BSP_BIT32(10)
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/* field: SETDMA1 - Set compare DMA request 1. */
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#define TMS570_RTI_SETINTENA_SETDMA1 BSP_BIT32(9)
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/* field: SETDMA0 - Set compare DMA request 0. */
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#define TMS570_RTI_SETINTENA_SETDMA0 BSP_BIT32(8)
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/* field: SETINT3 - Set compare interrupt 3. */
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#define TMS570_RTI_SETINTENA_SETINT3 BSP_BIT32(3)
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/* field: SETINT2 - Set compare interrupt 2. */
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#define TMS570_RTI_SETINTENA_SETINT2 BSP_BIT32(2)
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/* field: SETINT1 - Set compare interrupt 1. */
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#define TMS570_RTI_SETINTENA_SETINT1 BSP_BIT32(1)
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/* field: SETINT0 - Set compare interrupt 0. */
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#define TMS570_RTI_SETINTENA_SETINT0 BSP_BIT32(0)
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/*-------------------TMS570_RTI_CLEARINTENA-------------------*/
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/* field: CLEAROVL1INT - Clear free running counter 1 overflow interrupt. */
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#define TMS570_RTI_CLEARINTENA_CLEAROVL1INT BSP_BIT32(18)
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/* field: CLEAROVL0INT - Clear free running counter 0 overflow interrupt. */
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#define TMS570_RTI_CLEARINTENA_CLEAROVL0INT BSP_BIT32(17)
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/* field: CLEARTBINT - Clear timebase interrupt. */
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#define TMS570_RTI_CLEARINTENA_CLEARTBINT BSP_BIT32(16)
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/* field: CLEARDMA3 - Clear compare DMA request 3. */
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#define TMS570_RTI_CLEARINTENA_CLEARDMA3 BSP_BIT32(11)
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/* field: CLEARDMA2 - Clear compare DMA request 2. */
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#define TMS570_RTI_CLEARINTENA_CLEARDMA2 BSP_BIT32(10)
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/* field: CLEARDMA1 - Clear compare DMA request 1. */
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#define TMS570_RTI_CLEARINTENA_CLEARDMA1 BSP_BIT32(9)
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/* field: CLEARDMA0 - Clear compare DMA request 0. */
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#define TMS570_RTI_CLEARINTENA_CLEARDMA0 BSP_BIT32(8)
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/* field: CLEARINT3 - Clear compare interrupt 3. */
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#define TMS570_RTI_CLEARINTENA_CLEARINT3 BSP_BIT32(3)
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/* field: CLEARINT2 - Clear compare interrupt 2. */
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#define TMS570_RTI_CLEARINTENA_CLEARINT2 BSP_BIT32(2)
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/* field: CLEARINT1 - Clear compare interrupt 1. */
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#define TMS570_RTI_CLEARINTENA_CLEARINT1 BSP_BIT32(1)
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/* field: CLEARINT0 - Clear compare interrupt 0. */
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#define TMS570_RTI_CLEARINTENA_CLEARINT0 BSP_BIT32(0)
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/*---------------------TMS570_RTI_INTFLAG---------------------*/
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/* field: OVL1INT - Free running counter 1 overflow interrupt flag. This bit determines if an interrupt is pending. */
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#define TMS570_RTI_INTFLAG_OVL1INT BSP_BIT32(18)
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/* field: OVL0INT - Free running counter 0 overflow interrupt flag. This bit determines if an interrupt is pending. */
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#define TMS570_RTI_INTFLAG_OVL0INT BSP_BIT32(17)
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/* field: TBINT - Timebase interrupt flag. */
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#define TMS570_RTI_INTFLAG_TBINT BSP_BIT32(16)
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/* field: INT3 - Interrupt flag 3. These bits determine if an interrupt due to a Compare 3 match is pending. */
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#define TMS570_RTI_INTFLAG_INT3 BSP_BIT32(3)
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/* field: INT2 - Interrupt flag 2. These bits determine if an interrupt due to a Compare 2 match is pending. */
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#define TMS570_RTI_INTFLAG_INT2 BSP_BIT32(2)
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/* field: INT1 - Interrupt flag 1. These bits determine if an interrupt due to a Compare 1 match is pending. */
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#define TMS570_RTI_INTFLAG_INT1 BSP_BIT32(1)
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/* field: INT0 - Interrupt flag 0. These bits determine if an interrupt due to a Compare 0 match is pending. */
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#define TMS570_RTI_INTFLAG_INT0 BSP_BIT32(0)
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/*---------------------TMS570_RTI_DWDCTRL---------------------*/
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/* field: DWDCTRL - DWDCTRL Digital Watchdog Control. */
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/* Whole 32 bits */
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/*---------------------TMS570_RTI_DWDPRLD---------------------*/
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/* field: DWDPRLD - Digital Watchdog Preload Value. */
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#define TMS570_RTI_DWDPRLD_DWDPRLD(val) BSP_FLD32(val,0, 15)
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#define TMS570_RTI_DWDPRLD_DWDPRLD_GET(reg) BSP_FLD32GET(reg,0, 15)
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#define TMS570_RTI_DWDPRLD_DWDPRLD_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
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/*--------------------TMS570_RTI_WDSTATUS--------------------*/
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/* field: DWWD_ST - Windowed Watchdog Status */
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#define TMS570_RTI_WDSTATUS_DWWD_ST BSP_BIT32(5)
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/* field: END_TIME_VIOL - Windowed Watchdog End Time Violation Status. */
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#define TMS570_RTI_WDSTATUS_END_TIME_VIOL BSP_BIT32(4)
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/* field: START_TIME_VIOL - Windowed Watchdog Start Time Violation Status. */
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#define TMS570_RTI_WDSTATUS_START_TIME_VIOL BSP_BIT32(3)
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/* field: KEY_ST - Watchdog key status. */
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#define TMS570_RTI_WDSTATUS_KEY_ST BSP_BIT32(2)
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/* field: DWD_ST - DWD status. */
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#define TMS570_RTI_WDSTATUS_DWD_ST BSP_BIT32(1)
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/*----------------------TMS570_RTI_WDKEY----------------------*/
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/* field: WDKEY - Watchdog key. These bits provide the key sequence location. */
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#define TMS570_RTI_WDKEY_WDKEY(val) BSP_FLD32(val,0, 15)
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#define TMS570_RTI_WDKEY_WDKEY_GET(reg) BSP_FLD32GET(reg,0, 15)
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#define TMS570_RTI_WDKEY_WDKEY_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
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/*---------------------TMS570_RTI_DWDCNTR---------------------*/
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/* field: DWDCNTR - DWD down counter. */
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#define TMS570_RTI_DWDCNTR_DWDCNTR(val) BSP_FLD32(val,0, 24)
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#define TMS570_RTI_DWDCNTR_DWDCNTR_GET(reg) BSP_FLD32GET(reg,0, 24)
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#define TMS570_RTI_DWDCNTR_DWDCNTR_SET(reg,val) BSP_FLD32SET(reg, val,0, 24)
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/*-------------------TMS570_RTI_WWDRXNCTRL-------------------*/
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/* field: WWDRXN - The DWWD reaction */
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#define TMS570_RTI_WWDRXNCTRL_WWDRXN(val) BSP_FLD32(val,0, 3)
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#define TMS570_RTI_WWDRXNCTRL_WWDRXN_GET(reg) BSP_FLD32GET(reg,0, 3)
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#define TMS570_RTI_WWDRXNCTRL_WWDRXN_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
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/*-------------------TMS570_RTI_WWDSIZECTRL-------------------*/
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/* field: WWDSIZE - The DWWD window size */
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/* Whole 32 bits */
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/*------------------TMS570_RTI_INTCLRENABLE------------------*/
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/* field: INTCLRENABLE3 - Enables the auto-clear functionality on the compare 3 interrupt. */
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#define TMS570_RTI_INTCLRENABLE_INTCLRENABLE3(val) BSP_FLD32(val,24, 27)
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#define TMS570_RTI_INTCLRENABLE_INTCLRENABLE3_GET(reg) BSP_FLD32GET(reg,24, 27)
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#define TMS570_RTI_INTCLRENABLE_INTCLRENABLE3_SET(reg,val) BSP_FLD32SET(reg, val,24, 27)
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/* field: INTCLRENABLE2 - Enables the auto-clear functionality on the compare 2 interrupt. */
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#define TMS570_RTI_INTCLRENABLE_INTCLRENABLE2(val) BSP_FLD32(val,16, 19)
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#define TMS570_RTI_INTCLRENABLE_INTCLRENABLE2_GET(reg) BSP_FLD32GET(reg,16, 19)
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#define TMS570_RTI_INTCLRENABLE_INTCLRENABLE2_SET(reg,val) BSP_FLD32SET(reg, val,16, 19)
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/* field: INTCLRENABLE1 - Enables the auto-clear functionality on the compare 1 interrupt. */
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#define TMS570_RTI_INTCLRENABLE_INTCLRENABLE1(val) BSP_FLD32(val,8, 11)
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#define TMS570_RTI_INTCLRENABLE_INTCLRENABLE1_GET(reg) BSP_FLD32GET(reg,8, 11)
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#define TMS570_RTI_INTCLRENABLE_INTCLRENABLE1_SET(reg,val) BSP_FLD32SET(reg, val,8, 11)
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/* field: INTCLRENABLE0 - Enables the auto-clear functionality on the compare 0 interrupt. */
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#define TMS570_RTI_INTCLRENABLE_INTCLRENABLE0(val) BSP_FLD32(val,0, 3)
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#define TMS570_RTI_INTCLRENABLE_INTCLRENABLE0_GET(reg) BSP_FLD32GET(reg,0, 3)
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#define TMS570_RTI_INTCLRENABLE_INTCLRENABLE0_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
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/*--------------------TMS570_RTI_COMP0CLR--------------------*/
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/* field: CMP0CLR - Compare 0 clear. */
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/* Whole 32 bits */
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/*--------------------TMS570_RTI_COMP1CLR--------------------*/
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/* field: CMP0CLR - Compare 1 clear. */
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/* Whole 32 bits */
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/*--------------------TMS570_RTI_COMP2CLR--------------------*/
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/* field: CMP2CLR - Compare 2 clear. */
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/* Whole 32 bits */
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/*--------------------TMS570_RTI_COMP3CLR--------------------*/
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/* field: CMP3CLR - Compare 3 clear. */
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/* Whole 32 bits */
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#endif
/* LIBBSP_ARM_TMS570_RTI */
utility.h
This header file provides utility macros for BSPs.
tms570_rti_compare_t
Definition:
reg_rti.h:44
tms570_rti_counter_t
Definition:
reg_rti.h:49
tms570_rti_t
Definition:
reg_rti.h:59
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