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void | Xil_DCacheEnable (void) |
| Enable the Data cache. More...
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void | Xil_DCacheDisable (void) |
| Disable the Data cache. More...
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void | Xil_DCacheInvalidate (void) |
| Invalidate the Data cache. The contents present in the cache are cleaned and invalidated. More...
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void | Xil_DCacheInvalidateRange (INTPTR adr, INTPTR len) |
| Invalidate the Data cache for the given address range. The cachelines present in the adderss range are cleaned and invalidated. More...
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void | Xil_DCacheInvalidateLine (INTPTR adr) |
| Invalidate a Data cache line. The cacheline is cleaned and invalidated. More...
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void | Xil_DCacheFlush (void) |
| Flush the Data cache. More...
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void | Xil_DCacheFlushLine (INTPTR adr) |
| Flush a Data cache line. If the byte specified by the address (adr) is cached by the Data cache, the cacheline containing that byte is invalidated. If the cacheline is modified (dirty), the entire contents of the cacheline are written to system memory before the line is invalidated. More...
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void | Xil_ICacheEnable (void) |
| Enable the instruction cache. More...
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void | Xil_ICacheDisable (void) |
| Disable the instruction cache. More...
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void | Xil_ICacheInvalidate (void) |
| Invalidate the entire instruction cache. More...
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void | Xil_ICacheInvalidateRange (INTPTR adr, INTPTR len) |
| Invalidate the instruction cache for the given address range. If the instructions specified by the address range are cached by the instrunction cache, the cachelines containing those instructions are invalidated. More...
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void | Xil_ICacheInvalidateLine (INTPTR adr) |
| Invalidate an instruction cache line. If the instruction specified by the parameter adr is cached by the instruction cache, the cacheline containing that instruction is invalidated. More...
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void | Xil_ConfigureL1Prefetch (u8 num) |
| Configure the maximum number of outstanding data prefetches allowed in L1 cache. More...
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