39#ifndef LIBBSP_ARM_XILINX_ZYNQMP_IRQ_H
40#define LIBBSP_ARM_XILINX_ZYNQMP_IRQ_H
54#define BSP_SELECTED_TTC_IRQ ZYNQMP_IRQ_TTC_0_0
55#define BSP_INTERRUPT_VECTOR_COUNT 188
This header file is provided for backward compatiblility.
Xilinx Zynq Ultrascale+ MPSoC Peripheral memory map.