RTEMS 6.1-rc1
vc_defines.h
Go to the documentation of this file.
1
10/*
11 * Copyright (c) 2015 Yang Qiao
12 *
13 * The license and distribution terms for this file may be
14 * found in the file LICENSE in this distribution or at
15 *
16 * http://www.rtems.org/license/LICENSE
17 *
18 */
19
20#ifndef LIBBSP_ARM_RASPBERRYPI_VC_DEFINES_H
21#define LIBBSP_ARM_RASPBERRYPI_VC_DEFINES_H
22
23#include <string.h>
24
41#define BCM2835_MBOX_BUF_CODE_PROCESS_REQUEST 0x00000000
42#define BCM2835_MBOX_BUF_CODE_REQUEST_SUCCEED 0x80000000
43#define BCM2835_MBOX_BUF_CODE_REQUEST_PARSING_ERROR 0x80000001
44#define BCM2835_MBOX_TAG_VAL_LEN_REQUEST 0x00000000
45#define BCM2835_MBOX_TAG_VAL_LEN_RESPONSE 0x80000000
46
55typedef struct {
62 uint32_t buf_size;
63
71 uint32_t buf_code;
73
82typedef struct {
86 uint32_t tag;
90 uint32_t val_buf_size;
96 uint32_t val_len;
98
99#define BCM2835_MBOX_TAG_REPLY_IS_SET( _t_ ) \
100 ( ( _t_ )->tag_hdr.val_len & 0x80000000 )
101
102#define BCM2835_MBOX_INIT_BUF( _m_ ) { \
103 memset( ( _m_ ), 0, sizeof( *( _m_ ) ) ); \
104 ( _m_ )->hdr.buf_size = (void *)&(( _m_ )->end_tag) + 4 - (void *)( _m_ ); \
105 ( _m_ )->hdr.buf_code = BCM2835_MBOX_BUF_CODE_PROCESS_REQUEST; \
106 ( _m_ )->end_tag = 0; \
107}
108
109#define BCM2835_MBOX_INIT_TAG( _t_, _id_ ) { \
110 ( _t_ )->tag_hdr.tag = _id_; \
111 ( _t_ )->tag_hdr.val_buf_size = sizeof( ( _t_ )->body ); \
112 ( _t_ )->tag_hdr.val_len = sizeof( ( _t_ )->body.req ); \
113}
114
115#define BCM2835_MBOX_INIT_TAG_NO_REQ( _t_, _id_ ) { \
116 ( _t_ )->tag_hdr.tag = _id_; \
117 ( _t_ )->tag_hdr.val_buf_size = sizeof( ( _t_ )->body ); \
118 ( _t_ )->tag_hdr.val_len = 0; \
119}
120
121/*
122 * Mailbox buffers has to be aligned to 16 bytes because
123 * 4 LSB bits of the BCM2835_MBOX_WRITE and BCM2835_MBOX_READ
124 * registers are used to pass channel number.
125 *
126 * But there is another requirement for buffer allocation
127 * as well when interface is called after cache is enabled.
128 * The buffer should not share cache line with another variable
129 * which can be updated during data exchange with VideoCore.
130 * If cache is filled to satisfy another variable update
131 * during VideoCore output is stored into main memory then
132 * part of received data can be lost.
133 *
134 * Cache line length is 64 bytes for RPi2 Cortex-A7 data cache
135 * so align buffers to this value.
136 */
137#define BCM2835_MBOX_BUF_ALIGN_ATTRIBUTE __attribute__( ( aligned( 64 ) ) )
138
139/* Video Core */
140#define BCM2835_MAILBOX_TAG_FIRMWARE_REVISION 0x00000001
141typedef struct {
142 bcm2835_mbox_tag_hdr tag_hdr;
143 union {
144 struct {
145 } req;
146 struct {
147 uint32_t rev;
148 } resp;
149 } body;
151
152/* Hardware */
153#define BCM2835_MAILBOX_TAG_GET_BOARD_MODEL 0x00010001
154#define BCM2835_MAILBOX_TAG_GET_BOARD_VERSION 0x00010002
155typedef struct {
156 bcm2835_mbox_tag_hdr tag_hdr;
157 union {
158 struct {
159 } req;
160 struct {
161 uint32_t spec;
162 } resp;
163 } body;
165
166#if (BSP_IS_RPI2 == 1)
167#define BCM2836_MAILBOX_BOARD_V_2_B 0x4
168#else
169#define BCM2835_MAILBOX_BOARD_V_B_I2C0_2 0x2
170#define BCM2835_MAILBOX_BOARD_V_B_I2C0_3 0x3
171#define BCM2835_MAILBOX_BOARD_V_B_I2C1_4 0x4
172#define BCM2835_MAILBOX_BOARD_V_B_I2C1_5 0x5
173#define BCM2835_MAILBOX_BOARD_V_B_I2C1_6 0x6
174#define BCM2835_MAILBOX_BOARD_V_A_7 0x7
175#define BCM2835_MAILBOX_BOARD_V_A_8 0x8
176#define BCM2835_MAILBOX_BOARD_V_A_9 0x9
177#define BCM2835_MAILBOX_BOARD_V_B_REV2_d 0xd
178#define BCM2835_MAILBOX_BOARD_V_B_REV2_e 0xe
179#define BCM2835_MAILBOX_BOARD_V_B_REV2_f 0xf
180#define BCM2835_MAILBOX_BOARD_V_B_PLUS 0x10
181#define BCM2835_MAILBOX_BOARD_V_CM 0x11
182#define BCM2835_MAILBOX_BOARD_V_A_PLUS 0x12
183#endif
184
185#define BCM2835_MAILBOX_TAG_GET_BOARD_MAC 0x00010003
186#define BCM2835_MAILBOX_TAG_GET_BOARD_SERIAL 0x00010004
187typedef struct {
188 bcm2835_mbox_tag_hdr tag_hdr;
189 union {
190 struct {
191 } req;
192 struct {
193 uint64_t board_serial;
194 } resp;
195 } body;
197
198#define BCM2835_MAILBOX_TAG_GET_ARM_MEMORY 0x00010005
199typedef struct {
200 bcm2835_mbox_tag_hdr tag_hdr;
201 union {
202 struct {
203 } req;
204 struct {
205 uint32_t base;
206 uint32_t size;
207 } resp;
208 } body;
210
211#define BCM2835_MAILBOX_TAG_GET_VC_MEMORY 0x00010006
212typedef struct {
213 bcm2835_mbox_tag_hdr tag_hdr;
214 union {
215 struct {
216 } req;
217 struct {
218 uint32_t base;
219 uint32_t size;
220 } resp;
221 } body;
223
224#define BCM2835_MAILBOX_TAG_GET_CLOCKS 0x00010007
225typedef struct {
226 bcm2835_mbox_tag_hdr tag_hdr;
227 union {
228 struct {
229 uint32_t clock_id;
230 } req;
231 struct {
232 uint32_t clock_id;
233 uint32_t clock_rate;
234 } resp;
235 } body;
237
238/* Config */
239#define BCM2835_MAILBOX_TAG_GET_CMD_LINE 0x00050001
240typedef struct {
241 bcm2835_mbox_tag_hdr tag_hdr;
242 union {
243 struct {
244 } req;
245 struct {
246 uint8_t cmdline[ 1024 ];
247 } resp;
248 } body;
250
251/* Shared resource management */
252#define BCM2835_MAILBOX_TAG_GET_DMA_CHANNELS 0x00060001
253
254/* Power */
255#define BCM2835_MAILBOX_POWER_UDID_SD_Card 0x00000000
256#define BCM2835_MAILBOX_POWER_UDID_UART0 0x00000001
257#define BCM2835_MAILBOX_POWER_UDID_UART1 0x00000002
258#define BCM2835_MAILBOX_POWER_UDID_USB_HCD 0x00000003
259#define BCM2835_MAILBOX_POWER_UDID_I2C0 0x00000004
260#define BCM2835_MAILBOX_POWER_UDID_I2C1 0x00000005
261#define BCM2835_MAILBOX_POWER_UDID_I2C2 0x00000006
262#define BCM2835_MAILBOX_POWER_UDID_SPI 0x00000007
263#define BCM2835_MAILBOX_POWER_UDID_CCP2TX 0x00000008
264
265#define BCM2835_MAILBOX_TAG_GET_POWER_STATE 0x00020001
266typedef struct {
267 bcm2835_mbox_tag_hdr tag_hdr;
268 union {
269 struct {
270 uint32_t dev_id;
271 } req;
272 struct {
273 uint32_t dev_id;
274 uint32_t state;
275 } resp;
276 } body;
278
279#define BCM2835_MAILBOX_POWER_STATE_RESP_ON (1 << 0)
280#define BCM2835_MAILBOX_POWER_STATE_RESP_NODEV (1 << 1)
281
282#define BCM2835_MAILBOX_TAG_GET_TIMING 0x00020002
283#define BCM2835_MAILBOX_TAG_SET_POWER_STATE 0x00028001
284typedef struct {
285 bcm2835_mbox_tag_hdr tag_hdr;
286 union {
287 struct {
288 uint32_t dev_id;
289 uint32_t state;
290 } req;
291 struct {
292 uint32_t dev_id;
293 uint32_t state;
294 } resp;
295 } body;
297
298#ifndef BCM2835_MAILBOX_SET_POWER_STATE_REQ_ON
299/* Value is defined as a part of public VideoCore API */
300#define BCM2835_MAILBOX_SET_POWER_STATE_REQ_ON (1 << 0)
301#define BCM2835_MAILBOX_SET_POWER_STATE_REQ_WAIT (1 << 1)
302#endif
303
304/* Clocks */
305#define BCM2835_MAILBOX_UCID_CLOCK_RESERVED 0x000000000
306#define BCM2835_MAILBOX_UCID_CLOCK_EMMC 0x000000001
307#define BCM2835_MAILBOX_UCID_CLOCK_UART 0x000000002
308#define BCM2835_MAILBOX_UCID_CLOCK_ARM 0x000000003
309#define BCM2835_MAILBOX_UCID_CLOCK_CORE 0x000000004
310#define BCM2835_MAILBOX_UCID_CLOCK_V3D 0x000000005
311#define BCM2835_MAILBOX_UCID_CLOCK_H264 0x000000006
312#define BCM2835_MAILBOX_UCID_CLOCK_ISP 0x000000007
313#define BCM2835_MAILBOX_UCID_CLOCK_SDRAM 0x000000008
314#define BCM2835_MAILBOX_UCID_CLOCK_PIXEL 0x000000009
315#define BCM2835_MAILBOX_UCID_CLOCK_PWM 0x00000000a
316
317#define BCM2835_MAILBOX_TAG_GET_CLOCK_STATE 0x00030001
318#define BCM2835_MAILBOX_TAG_SET_CLOCK_STATE 0x00038001
319#define BCM2835_MAILBOX_TAG_GET_CLOCK_RATE 0x00030002
320#define BCM2835_MAILBOX_TAG_SET_CLOCK_RATE 0x00038002
321#define BCM2835_MAILBOX_TAG_GET_MAX_CLOCK_RATE 0x00030004
322#define BCM2835_MAILBOX_TAG_GET_MIN_CLOCK_RATE 0x00030007
323#define BCM2835_MAILBOX_TAG_GET_TRUBO 0x00030009
324#define BCM2835_MAILBOX_TAG_SET_TURBO 0x00038009
325
326#define BCM2835_MAILBOX_TAG_GET_DOMAIN_STATE 0x00030030
327#define BCM2835_MAILBOX_TAG_SET_DOMAIN_STATE 0x00038030
328
329/* Voltage */
330#define BCM2835_MAILBOX_VOLTAGE_RESERVED_UVID 0x000000000
331#define BCM2835_MAILBOX_VOLTAGE_CORE_UVID 0x000000001
332#define BCM2835_MAILBOX_VOLTAGE_SDRAM_C_UVID 0x000000002
333#define BCM2835_MAILBOX_VOLTAGE_SDRAM_P_UVID 0x000000003
334#define BCM2835_MAILBOX_VOLTAGE_SDRAM_I_UVID 0x000000004
335
336#define BCM2835_MAILBOX_TAG_GET_VOLTAGE 0x00030003
337#define BCM2835_MAILBOX_TAG_SET_VOLTAGE 0x00038003
338#define BCM2835_MAILBOX_TAG_GET_MAX_VOLTAGE 0x00030005
339#define BCM2835_MAILBOX_TAG_GET_MIN_VOLTAGE 0x00030008
340#define BCM2835_MAILBOX_TAG_GET_TEMPERATURE 0x00030006
341#define BCM2835_MAILBOX_TAG_GET_MAX_TEMPERATURE 0x0003000a
342
343/* Memory */
344#define BCM2835_MAILBOX_TAG_ALLOCATE_MEMORY 0x0003000c
345#define BCM2835_MAILBOX_TAG_LOCK_MEMORY 0x0003000d
346#define BCM2835_MAILBOX_TAG_UNLOCK_MEMORY 0x0003000e
347#define BCM2835_MAILBOX_TAG_RELEASE_MEMORY 0x0003000f
348#define BCM2835_MAILBOX_TAG_EXECUTE_CODE 0x00030010
349#define BCM2835_MAILBOX_TAG_GET_DISPMANX_RESOURCE_MEM_HANDLE 0x00030014
350
351#define BCM2835_MAILBOX_TAG_GET_EDID_BLOCK 0x00030020
352
353/* Framebuffer */
354#define BCM2835_MAILBOX_TAG_ALLOCATE_BUFFER 0x00040001
355typedef struct {
356 bcm2835_mbox_tag_hdr tag_hdr;
357 union {
358 struct {
359 uint32_t align;
360 } req;
361 struct {
362 uint32_t base;
363 uint32_t size;
364 } resp;
365 } body;
367
368#define BCM2835_MAILBOX_TAG_RELEASE_BUFFER 0x00048001
369
370#define BCM2835_MAILBOX_TAG_BLANK_SCREEN 0x00040002
371
372#define BCM2835_MAILBOX_TAG_GET_DISPLAY_SIZE 0x00040003
373#define BCM2835_MAILBOX_TAG_TEST_DISPLAY_SIZE 0x00044003
374#define BCM2835_MAILBOX_TAG_SET_DISPLAY_SIZE 0x00048003
375typedef struct {
376 bcm2835_mbox_tag_hdr tag_hdr;
377 union {
378 struct {
379 uint32_t width;
380 uint32_t height;
381 } req;
382 struct {
383 uint32_t width;
384 uint32_t height;
385 } resp;
386 } body;
388
389#define BCM2835_MAILBOX_TAG_GET_VIRTUAL_SIZE 0x00040004
390#define BCM2835_MAILBOX_TAG_TEST_VIRTUAL_SIZE 0x00044004
391#define BCM2835_MAILBOX_TAG_SET_VIRTUAL_SIZE 0x00048004
392typedef struct {
393 bcm2835_mbox_tag_hdr tag_hdr;
394 union {
395 struct {
396 uint32_t vwidth;
397 uint32_t vheight;
398 } req;
399 struct {
400 uint32_t vwidth;
401 uint32_t vheight;
402 } resp;
403 } body;
405
406#define BCM2835_MAILBOX_TAG_GET_DEPTH 0x00040005
407#define BCM2835_MAILBOX_TAG_TEST_DEPTH 0x00044005
408#define BCM2835_MAILBOX_TAG_SET_DEPTH 0x00048005
409typedef struct {
410 bcm2835_mbox_tag_hdr tag_hdr;
411 union {
412 struct {
413 uint32_t depth;
414 } req;
415 struct {
416 uint32_t depth;
417 } resp;
418 } body;
420
421#define BCM2835_MAILBOX_TAG_GET_PIXEL_ORDER 0x00040006
422#define BCM2835_MAILBOX_TAG_TEST_PIXEL_ORDER 0x00044006
423#define BCM2835_MAILBOX_TAG_SET_PIXEL_ORDER 0x00048006
424
425#define BCM2835_MAILBOX_PIXEL_ORDER_BGR 0
426#define BCM2835_MAILBOX_PIXEL_ORDER_RGB 1
427typedef struct {
428 bcm2835_mbox_tag_hdr tag_hdr;
429 union {
430 struct {
431 uint32_t pixel_order;
432 } req;
433 struct {
434 uint32_t pixel_order;
435 } resp;
436 } body;
438
439#define BCM2835_MAILBOX_TAG_GET_ALPHA_MODE 0x00040007
440#define BCM2835_MAILBOX_TAG_TEST_ALPHA_MODE 0x00044007
441#define BCM2835_MAILBOX_TAG_SET_ALPHA_MODE 0x00048007
442typedef struct {
443 bcm2835_mbox_tag_hdr tag_hdr;
444 union {
445 struct {
446 uint32_t alpha_mode;
447 } req;
448 struct {
449 uint32_t alpha_mode;
450 } resp;
451 } body;
453
454#define BCM2835_MAILBOX_ALPHA_MODE_0_OPAQUE 0
455#define BCM2835_MAILBOX_ALPHA_MODE_0_TRANSPARENT 1
456#define BCM2835_MAILBOX_ALPHA_MODE_IGNORED 2
457
458#define BCM2835_MAILBOX_TAG_GET_PITCH 0x00040008
459typedef struct {
460 bcm2835_mbox_tag_hdr tag_hdr;
461 union {
462 struct {
463 } req;
464 struct {
465 uint32_t pitch;
466 } resp;
467 } body;
469
470#define BCM2835_MAILBOX_TAG_GET_VIRTUAL_OFFSET 0x00040009
471#define BCM2835_MAILBOX_TAG_TEST_VIRTUAL_OFFSET 0x00044009
472#define BCM2835_MAILBOX_TAG_SET_VIRTUAL_OFFSET 0x00048009
473typedef struct {
474 bcm2835_mbox_tag_hdr tag_hdr;
475 union {
476 struct {
477 uint32_t voffset_x;
478 uint32_t voffset_y;
479 } req;
480 struct {
481 uint32_t voffset_x;
482 uint32_t voffset_y;
483 } resp;
484 } body;
486
487#define BCM2835_MAILBOX_TAG_GET_OVERSCAN 0x0004000a
488#define BCM2835_MAILBOX_TAG_TEST_OVERSCAN 0x0004400a
489#define BCM2835_MAILBOX_TAG_SET_OVERSCAN 0x0004800a
490typedef struct {
491 bcm2835_mbox_tag_hdr tag_hdr;
492 union {
493 struct {
494 uint32_t overscan_top;
495 uint32_t overscan_bottom;
496 uint32_t overscan_left;
497 uint32_t overscan_right;
498 } req;
499 struct {
500 uint32_t overscan_top;
501 uint32_t overscan_bottom;
502 uint32_t overscan_left;
503 uint32_t overscan_right;
504 } resp;
505 } body;
507
508#define BCM2835_MAILBOX_TAG_GET_PALETTE 0x0004000b
509#define BCM2835_MAILBOX_TAG_TEST_PALETTE 0x0004400b
510#define BCM2835_MAILBOX_TAG_SET_PALETTE 0x0004800b
511#define BCM2835_MAILBOX_TAG_SET_CURSOR_INFO 0x00008011
512#define BCM2835_MAILBOX_TAG_SET_CURSOR_STATE 0x00008010
513
518#endif /* LIBBSP_ARM_RASPBERRYPI_VC_DEFINES_H */
Buffer Header.
Definition: vc_defines.h:55
uint32_t buf_code
Buffer Code.
Definition: vc_defines.h:71
uint32_t buf_size
Buffer Size.
Definition: vc_defines.h:62
Definition: vc_defines.h:355
Definition: vc_defines.h:442
Definition: vc_defines.h:409
Definition: vc_defines.h:375
Definition: vc_defines.h:199
Definition: vc_defines.h:187
Definition: vc_defines.h:155
Definition: vc_defines.h:225
Definition: vc_defines.h:240
Definition: vc_defines.h:141
Definition: vc_defines.h:459
Definition: vc_defines.h:266
Definition: vc_defines.h:212
Tag Header.
Definition: vc_defines.h:82
uint32_t tag
Property Tag ID.
Definition: vc_defines.h:86
uint32_t val_buf_size
The size of request qnd responce buffer.
Definition: vc_defines.h:90
uint32_t val_len
The size of response buffer set by videocore.
Definition: vc_defines.h:96
Definition: vc_defines.h:490
Definition: vc_defines.h:427
Definition: vc_defines.h:284
Definition: vc_defines.h:473
Definition: vc_defines.h:392
unsigned size
Definition: tte.h:1