RTEMS 6.1-rc1
usbhs.h
Go to the documentation of this file.
1/* ---------------------------------------------------------------------------- */
2/* Atmel Microcontroller Software Support */
3/* SAM Software Package License */
4/* ---------------------------------------------------------------------------- */
5/* Copyright (c) 2015, Atmel Corporation */
6/* */
7/* All rights reserved. */
8/* */
9/* Redistribution and use in source and binary forms, with or without */
10/* modification, are permitted provided that the following condition is met: */
11/* */
12/* - Redistributions of source code must retain the above copyright notice, */
13/* this list of conditions and the disclaimer below. */
14/* */
15/* Atmel's name may not be used to endorse or promote products derived from */
16/* this software without specific prior written permission. */
17/* */
18/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
19/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
20/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
21/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
22/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
23/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
24/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
25/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
26/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
27/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
28/* ---------------------------------------------------------------------------- */
29
32#ifndef USBHS_H
33#define USBHS_H
38#define USB_DEVICE_HS_SUPPORT
39
41#define USB_DEVICE_EP_CTRL_SIZE 64
42
44#define CHIP_USB_UDP
45
47#define CHIP_USB_PULLUP_INTERNAL
48
50#define CHIP_USB_NUMENDPOINTS 10
51
53#define CHIP_USB_ENDPOINTS_MAXPACKETSIZE(ep) \
54 ((ep == 0) ? 64 : 1024)
55
57#define CHIP_USB_ENDPOINTS_BANKS(ep) ((ep==0)?1:((ep<=2)?3:2))
58
59
60#define CHIP_USB_ENDPOINTS_HBW(ep) ((((ep)>=1) &&((ep)<=2))?true:false)
61
63#define CHIP_USB_ENDPOINTS_DMA(ep) ((((ep)>=1)&&((ep)<=7))?true:false)
64
66#define DMA_MAX_FIFO_SIZE (65536/1)
68#define EPT_VIRTUAL_SIZE 8192
69
70
75#define uhd_get_pipe_max_nbr() (9)
76#define USBHS_EPT_NUM (uhd_get_pipe_max_nbr()+1)
78#define uhd_get_pipe_bank_max_nbr(ep) ((ep == 0) ? 1 : ((ep <= 2) ? 3 : 2))
80#define uhd_get_pipe_size_max(ep) (((ep) == 0) ? 64 : 1024)
82#define Is_uhd_pipe_dma_supported(ep) ((((ep) >= 1) && ((ep) <= 7)) ? true : false)
84#define Is_uhd_pipe_high_bw_supported(ep) (((ep) >= 2) ? true : false)
86
87typedef enum {
88 HOST_MODE = 0,
89 DEVICE_MODE = 1
90} USB_Mode_t;
91
93#define UHD_PIPE_MAX_TRANS 0x8000
94
106__STATIC_INLINE void USBHS_FreezeClock(Usbhs *pUsbhs)
107{
108 pUsbhs->USBHS_CTRL |= USBHS_CTRL_FRZCLK;
109}
110
116__STATIC_INLINE void USBHS_UnFreezeClock(Usbhs *pUsbhs)
117{
118 pUsbhs->USBHS_CTRL &= ~((uint32_t)USBHS_CTRL_FRZCLK);
119}
125__STATIC_INLINE void USBHS_VBusHWC(Usbhs *pUsbhs, uint8_t Enable)
126{
127
128 if (!Enable)
129 pUsbhs->USBHS_CTRL |= (1 << 8);
130 else
131 pUsbhs->USBHS_CTRL &= ~((uint32_t)(1 << 8));
132}
133
140__STATIC_INLINE void USBHS_UsbEnable(Usbhs *pUsbhs, uint8_t Enable)
141{
142 if (Enable)
143 pUsbhs->USBHS_CTRL |= USBHS_CTRL_USBE;
144 else
145 pUsbhs->USBHS_CTRL &= ~((uint32_t)USBHS_CTRL_USBE);
146}
147
148
155__STATIC_INLINE void USBHS_UsbMode(Usbhs *pUsbhs, USB_Mode_t Mode)
156{
157 if (Mode)
158 pUsbhs->USBHS_CTRL |= USBHS_CTRL_UIMOD_DEVICE;
159 else
160 pUsbhs->USBHS_CTRL &= ~((uint32_t)USBHS_CTRL_UIMOD_DEVICE);
161}
162
163/********************* USBHS_SR *****************/
164
171__STATIC_INLINE uint8_t USBHS_ISUsableClock(Usbhs *pUsbhs)
172{
173 return ((pUsbhs->USBHS_SR & USBHS_SR_CLKUSABLE) >> 14);
174}
175
176
183__STATIC_INLINE uint32_t USBHS_ReadStatus(Usbhs *pUsbhs)
184{
185 return (pUsbhs->USBHS_SR);
186}
187
194__STATIC_INLINE uint32_t USBHS_GetUsbSpeed(Usbhs *pUsbhs)
195{
196 return ((pUsbhs->USBHS_SR & USBHS_SR_SPEED_Msk));
197}
198
199
206__STATIC_INLINE bool USBHS_IsUsbFullSpeed(Usbhs *pUsbhs)
207{
208 return ((pUsbhs->USBHS_SR & USBHS_SR_SPEED_Msk) == USBHS_SR_SPEED_FULL_SPEED) ?
209 true : false;
210}
211
212
219__STATIC_INLINE bool USBHS_IsUsbHighSpeed(Usbhs *pUsbhs)
220{
221 return ((pUsbhs->USBHS_SR & USBHS_SR_SPEED_Msk) == USBHS_SR_SPEED_HIGH_SPEED) ?
222 true : false;
223}
224
231__STATIC_INLINE bool USBHS_IsUsbLowSpeed(Usbhs *pUsbhs)
232{
233 return ((pUsbhs->USBHS_SR & USBHS_SR_SPEED_Msk) == USBHS_SR_SPEED_LOW_SPEED) ?
234 true : false;
235}
236/********************* USBHS_SCR *****************/
237
244__STATIC_INLINE void USBHS_Ack(Usbhs *pUsbhs, uint32_t AckType)
245{
246 pUsbhs->USBHS_SCR |= AckType;
247}
248
249/********************* USBHS_SFR *****************/
250
257__STATIC_INLINE void USBHS_Set(Usbhs *pUsbhs, uint32_t SetStatus)
258{
259 pUsbhs->USBHS_SFR |= SetStatus;
260}
261
262
263/*--------------------------------------------------------
264* =========== USB Device functions ======================
265*---------------------------------------------------------*/
266
273__STATIC_INLINE void USBHS_EnableAddress(Usbhs *pUsbhs, uint8_t Enable)
274{
275 if (Enable)
276 pUsbhs->USBHS_DEVCTRL |= USBHS_DEVCTRL_ADDEN;
277 else
278 pUsbhs->USBHS_DEVCTRL &= ~((uint32_t)USBHS_DEVCTRL_ADDEN);
279}
280
287__STATIC_INLINE void USBHS_SetAddress(Usbhs *pUsbhs, uint8_t Addr)
288{
289 pUsbhs->USBHS_DEVCTRL |= USBHS_DEVCTRL_UADD(Addr);
290 pUsbhs->USBHS_DEVCTRL |= USBHS_DEVCTRL_ADDEN;
291}
292
298__STATIC_INLINE uint8_t USBHS_GetAddress(Usbhs *pUsbhs)
299{
300 return (pUsbhs->USBHS_DEVCTRL & USBHS_DEVCTRL_UADD_Msk);
301}
302
309__STATIC_INLINE void USBHS_DetachUsb(Usbhs *pUsbhs, uint8_t Enable)
310{
311 if (Enable)
312 pUsbhs->USBHS_DEVCTRL |= USBHS_DEVCTRL_DETACH;
313 else
314 pUsbhs->USBHS_DEVCTRL &= ~((uint32_t)USBHS_DEVCTRL_DETACH);
315
316}
317
324__STATIC_INLINE void USBHS_ForceLowSpeed(Usbhs *pUsbhs, uint8_t Enable)
325{
326 if (Enable)
327 pUsbhs->USBHS_DEVCTRL |= USBHS_DEVCTRL_LS;
328 else
329 pUsbhs->USBHS_DEVCTRL &= ~((uint32_t)USBHS_DEVCTRL_LS);
330}
331
338__STATIC_INLINE void USBHS_EnableHighSpeed(Usbhs *pUsbhs, uint8_t Enable)
339{
340 uint32_t cfg = pUsbhs->USBHS_DEVCTRL;
341 cfg &= ~((uint32_t)USBHS_DEVCTRL_SPDCONF_Msk);
342
343 if (Enable)
344 pUsbhs->USBHS_DEVCTRL |= cfg;
345 else
346 pUsbhs->USBHS_DEVCTRL |= (cfg | USBHS_DEVCTRL_SPDCONF_FORCED_FS);
347
348}
349
355__STATIC_INLINE void USBHS_SetRemoteWakeUp(Usbhs *pUsbhs)
356{
357 pUsbhs->USBHS_DEVCTRL |= USBHS_DEVCTRL_RMWKUP;
358}
359
366__STATIC_INLINE void USBHS_EnableTestMode(Usbhs *pUsbhs, uint32_t mode)
367{
368 pUsbhs->USBHS_DEVCTRL |= mode;
369}
370
371
377__STATIC_INLINE void USBHS_EnableHSTestMode(Usbhs *pUsbhs)
378{
379 pUsbhs->USBHS_DEVCTRL |= USBHS_DEVCTRL_SPDCONF_HIGH_SPEED;
380}
381
388__STATIC_INLINE uint32_t USBHS_ReadIntStatus(Usbhs *pUsbhs, uint32_t IntType)
389{
390 return (pUsbhs->USBHS_DEVISR & IntType);
391}
392
399__STATIC_INLINE uint32_t USBHS_ReadEpIntStatus(Usbhs *pUsbhs, uint8_t EpNum)
400{
401 return (pUsbhs->USBHS_DEVISR & (USBHS_DEVISR_PEP_0 << EpNum));
402}
403
409__STATIC_INLINE uint32_t USBHS_ReadDmaIntStatus(Usbhs *pUsbhs, uint8_t DmaNum)
410{
411 return (pUsbhs->USBHS_DEVISR & (USBHS_DEVISR_DMA_1 << DmaNum));
412}
413
420__STATIC_INLINE void USBHS_AckInt(Usbhs *pUsbhs, uint32_t IntType)
421{
422 pUsbhs->USBHS_DEVICR |= IntType;
423}
424
432__STATIC_INLINE void USBHS_RaiseInt(Usbhs *pUsbhs, uint32_t IntType)
433{
434 pUsbhs->USBHS_DEVIFR |= IntType;
435}
436
442__STATIC_INLINE void USBHS_RaiseDmaInt(Usbhs *pUsbhs, uint8_t Dma)
443{
444 assert(Dma < USBHSDEVDMA_NUMBER);
445 pUsbhs->USBHS_DEVIFR |= (USBHS_DEVIFR_DMA_1 << Dma);
446}
447
454__STATIC_INLINE uint32_t USBHS_IsIntEnable(Usbhs *pUsbhs, uint32_t IntType)
455{
456 return (pUsbhs->USBHS_DEVIMR & IntType);
457}
458
465__STATIC_INLINE uint32_t USBHS_IsIntEnableEP(Usbhs *pUsbhs, uint8_t EpNum)
466{
467 return (pUsbhs->USBHS_DEVIMR & (USBHS_DEVIMR_PEP_0 << EpNum));
468}
469
470
478__STATIC_INLINE uint32_t USBHS_IsDmaIntEnable(Usbhs *pUsbhs, uint8_t DmaNum)
479{
480 return (pUsbhs->USBHS_DEVIMR & (USBHS_DEVIMR_DMA_1 << DmaNum));
481}
482
483
489__STATIC_INLINE void USBHS_EnableInt(Usbhs *pUsbhs, uint32_t IntType)
490{
491 pUsbhs->USBHS_DEVIER |= IntType;
492}
493
499__STATIC_INLINE void USBHS_EnableIntEP(Usbhs *pUsbhs, uint8_t EpNum)
500{
501 pUsbhs->USBHS_DEVIER |= (USBHS_DEVIER_PEP_0 << EpNum);
502}
503
510__STATIC_INLINE void USBHS_EnableDMAIntEP(Usbhs *pUsbhs, uint32_t DmaEp)
511{
512 assert(DmaEp < USBHSDEVDMA_NUMBER);
513 pUsbhs->USBHS_DEVIER |= (USBHS_DEVIER_DMA_1 << DmaEp);
514}
515
522__STATIC_INLINE void USBHS_DisableInt(Usbhs *pUsbhs, uint32_t IntType)
523{
524 pUsbhs->USBHS_DEVIDR |= IntType;
525}
526
533__STATIC_INLINE void USBHS_DisableIntEP(Usbhs *pUsbhs, uint8_t Ep)
534{
535 pUsbhs->USBHS_DEVIDR |= (USBHS_DEVIDR_PEP_0 << Ep);
536}
537
543__STATIC_INLINE void USBHS_DisableDMAIntEP(Usbhs *pUsbhs, uint8_t DmaEp)
544{
545 assert(DmaEp < USBHSDEVDMA_NUMBER);
546 pUsbhs->USBHS_DEVIDR |= (USBHS_DEVIDR_DMA_1 << DmaEp);
547}
548
549
556__STATIC_INLINE void USBHS_EnableEP(Usbhs *pUsbhs, uint8_t Ep, uint8_t Enable)
557{
558 if (Enable)
559 pUsbhs->USBHS_DEVEPT |= (USBHS_DEVEPT_EPEN0 << Ep);
560 else
561 pUsbhs->USBHS_DEVEPT &= ~(uint32_t)(USBHS_DEVEPT_EPEN0 << Ep);
562
563}
564
565
572__STATIC_INLINE void USBHS_ResetEP(Usbhs *pUsbhs, uint8_t Ep)
573{
574 pUsbhs->USBHS_DEVEPT |= (USBHS_DEVEPT_EPRST0 << Ep);
575 pUsbhs->USBHS_DEVEPT &= ~(uint32_t)(USBHS_DEVEPT_EPRST0 << Ep);
576}
577
584__STATIC_INLINE uint32_t USBHS_IsEPEnabled(Usbhs *pUsbhs, uint8_t Ep)
585{
586 return (pUsbhs->USBHS_DEVEPT & (USBHS_DEVEPT_EPEN0 << Ep));
587}
588
594__STATIC_INLINE uint8_t USBHS_GetMicroFrameNum(Usbhs *pUsbhs)
595{
596 return (pUsbhs->USBHS_DEVFNUM & USBHS_DEVFNUM_MFNUM_Msk);
597}
598
599
605__STATIC_INLINE uint8_t USBHS_GetFrameNum(Usbhs *pUsbhs)
606{
607 return ((pUsbhs->USBHS_DEVFNUM & USBHS_DEVFNUM_FNUM_Msk)
608 >> USBHS_DEVFNUM_FNUM_Pos);
609}
610
616__STATIC_INLINE uint8_t USBHS_GetFrameNumCrcErr(Usbhs *pUsbhs)
617{
618 return ((pUsbhs->USBHS_DEVFNUM & USBHS_DEVFNUM_FNCERR) >> 15);
619}
620
621/*-----------------------------------------
622* =========== USB Device's Endpoint functions ========
623*------------------------------------------*/
624
629__STATIC_INLINE void USBHS_ConfigureEPs(Usbhs *pUsbhs, const uint8_t Ep,
630 const uint8_t Type, const uint8_t Dir,
631 const uint8_t Size, const uint8_t Bank)
632{
633
634 pUsbhs->USBHS_DEVEPTCFG[Ep] |=
635 ((Size << USBHS_DEVEPTCFG_EPSIZE_Pos) & USBHS_DEVEPTCFG_EPSIZE_Msk);
636 pUsbhs->USBHS_DEVEPTCFG[Ep] |=
637 ((Dir << 8) & USBHS_DEVEPTCFG_EPDIR);
638 pUsbhs->USBHS_DEVEPTCFG[Ep] |=
639 (((Type) << USBHS_DEVEPTCFG_EPTYPE_Pos) & USBHS_DEVEPTCFG_EPTYPE_Msk);
640 pUsbhs->USBHS_DEVEPTCFG[Ep] |=
641 (((Bank) << USBHS_DEVEPTCFG_EPBK_Pos) & USBHS_DEVEPTCFG_EPBK_Msk);
642}
643
644
648__STATIC_INLINE void USBHS_AutoSwitchBankEnable(Usbhs *pUsbhs, uint8_t Ep,
649 uint8_t Enable)
650{
651 if (Enable)
652 pUsbhs->USBHS_DEVEPTCFG[Ep] |= USBHS_DEVEPTCFG_AUTOSW;
653 else
654 pUsbhs->USBHS_DEVEPTCFG[Ep] &= ~((uint32_t)USBHS_DEVEPTCFG_AUTOSW);
655}
656
657
661__STATIC_INLINE void USBHS_AllocateMemory(Usbhs *pUsbhs, uint8_t Ep)
662{
663 pUsbhs->USBHS_DEVEPTCFG[Ep] |= USBHS_DEVEPTCFG_ALLOC;
664}
665
666
670__STATIC_INLINE void USBHS_FreeMemory(Usbhs *pUsbhs, uint8_t Ep)
671{
672 pUsbhs->USBHS_DEVEPTCFG[Ep] &= ~((uint32_t)USBHS_DEVEPTCFG_ALLOC);
673}
674
675
679__STATIC_INLINE uint32_t USBHS_GetConfigureEPs(Usbhs *pUsbhs, uint8_t Ep,
680 uint32_t IntType)
681{
682 return ((pUsbhs->USBHS_DEVEPTCFG[Ep]) & IntType);
683}
684
688__STATIC_INLINE uint8_t USBHS_GetEpType(Usbhs *pUsbhs, uint8_t Ep)
689{
690 return ((pUsbhs->USBHS_DEVEPTCFG[Ep] & USBHS_DEVEPTCFG_EPTYPE_Msk)
691 >> USBHS_DEVEPTCFG_EPTYPE_Pos);
692}
693
697__STATIC_INLINE uint32_t USBHS_GetEpSize(Usbhs *pUsbhs, uint8_t Ep)
698{
699 return (8 << ((pUsbhs->USBHS_DEVEPTCFG[Ep] & USBHS_DEVEPTCFG_EPSIZE_Msk)
700 >> USBHS_DEVEPTCFG_EPSIZE_Pos));
701}
702
703
707__STATIC_INLINE void USBHS_SetIsoTrans(Usbhs *pUsbhs, uint8_t Ep,
708 uint8_t nbTrans)
709{
710 pUsbhs->USBHS_DEVEPTCFG[Ep] |= USBHS_DEVEPTCFG_NBTRANS(nbTrans);
711}
712
716__STATIC_INLINE uint32_t USBHS_IsEpIntEnable(Usbhs *pUsbhs, uint8_t Ep,
717 uint32_t EpIntType)
718{
719 return (pUsbhs->USBHS_DEVEPTIMR[Ep] & EpIntType);
720}
721
722
726__STATIC_INLINE void USBHS_EnableEPIntType(Usbhs *pUsbhs, uint8_t Ep,
727 uint32_t EpInt)
728{
729 pUsbhs->USBHS_DEVEPTIER[Ep] |= EpInt;
730}
731
735__STATIC_INLINE uint32_t USBHS_IsBankKilled(Usbhs *pUsbhs, uint8_t Ep)
736{
737 return (pUsbhs->USBHS_DEVEPTIMR[Ep] & USBHS_DEVEPTIMR_KILLBK);
738}
739
743__STATIC_INLINE void USBHS_KillBank(Usbhs *pUsbhs, uint8_t Ep)
744{
745 pUsbhs->USBHS_DEVEPTIER[Ep] = USBHS_DEVEPTIER_KILLBKS;
746}
750__STATIC_INLINE void USBHS_DisableEPIntType(Usbhs *pUsbhs, uint8_t Ep,
751 uint32_t EpInt)
752{
753 pUsbhs->USBHS_DEVEPTIDR[Ep] |= EpInt;
754}
755
759__STATIC_INLINE void USBHS_AckEpInterrupt(Usbhs *pUsbhs, uint8_t Ep,
760 uint32_t EpInt)
761{
762 pUsbhs->USBHS_DEVEPTICR[Ep] |= EpInt;
763}
764
768__STATIC_INLINE void USBHS_RaiseEPInt(Usbhs *pUsbhs, uint8_t Ep, uint32_t EpInt)
769{
770 pUsbhs->USBHS_DEVEPTIFR[Ep] |= EpInt;
771}
772
776__STATIC_INLINE uint32_t USBHS_ReadEPStatus(Usbhs *pUsbhs, uint8_t Ep,
777 uint32_t EpInt)
778{
779 return (pUsbhs->USBHS_DEVEPTISR[Ep] & EpInt);
780}
781
785__STATIC_INLINE uint8_t USBHS_IsBankFree(Usbhs *pUsbhs, uint8_t Ep)
786{
787 if ((pUsbhs->USBHS_DEVEPTISR[Ep] & USBHS_DEVEPTISR_NBUSYBK_Msk))
788 return false;
789 else
790 return true;
791}
792
796__STATIC_INLINE uint8_t USBHS_NumOfBanksInUse(Usbhs *pUsbhs, uint8_t Ep)
797{
798 return ((pUsbhs->USBHS_DEVEPTISR[Ep] & USBHS_DEVEPTISR_NBUSYBK_Msk)
799 >> USBHS_DEVEPTISR_NBUSYBK_Pos);
800}
801
802
806__STATIC_INLINE uint16_t USBHS_ByteCount(Usbhs *pUsbhs, uint8_t Ep)
807{
808 return (uint16_t)((pUsbhs->USBHS_DEVEPTISR[Ep] & USBHS_DEVEPTISR_BYCT_Msk)
809 >> USBHS_DEVEPTISR_BYCT_Pos);
810}
811
812/*--------------------------------------------------------
813* =========== USB Device's Ep's DMA functions =========
814*---------------------------------------------------------*/
815
821__STATIC_INLINE void USBHS_SetDmaNDA(UsbhsDevdma *pUsbDma, uint32_t Desc)
822{
823 pUsbDma->USBHS_DEVDMANXTDSC = Desc;
824}
825
831__STATIC_INLINE uint32_t USBHS_GetDmaNDA(UsbhsDevdma *pUsbDma)
832{
833 return (pUsbDma->USBHS_DEVDMANXTDSC);
834}
835
841__STATIC_INLINE void USBHS_SetDmaBuffAdd(UsbhsDevdma *pUsbDma, uint32_t Addr)
842{
843 pUsbDma->USBHS_DEVDMAADDRESS = Addr;
844}
845
846
852__STATIC_INLINE uint32_t USBHS_GetDmaBuffAdd(UsbhsDevdma *pUsbDma)
853{
854 return (pUsbDma->USBHS_DEVDMAADDRESS);
855}
856
862__STATIC_INLINE void USBHS_ConfigureDma(UsbhsDevdma *pUsbDma, uint32_t Cfg)
863{
864 pUsbDma->USBHS_DEVDMACONTROL |= Cfg;
865}
866
872__STATIC_INLINE uint32_t USBHS_GetDmaConfiguration(UsbhsDevdma *pUsbDma)
873{
874 return (pUsbDma->USBHS_DEVDMACONTROL);
875}
876
877
883__STATIC_INLINE void USBHS_SetDmaStatus(UsbhsDevdma *pUsbDma, uint32_t Status)
884{
885 pUsbDma->USBHS_DEVDMASTATUS = Status;
886}
887
888
894__STATIC_INLINE uint32_t USBHS_GetDmaStatus(UsbhsDevdma *pUsbDma)
895{
896 return (pUsbDma->USBHS_DEVDMASTATUS);
897}
898
899
905__STATIC_INLINE uint16_t USBHS_GetDmaBuffCount(UsbhsDevdma *pUsbDma)
906{
907 return ((pUsbDma->USBHS_DEVDMASTATUS & USBHS_DEVDMASTATUS_BUFF_COUNT_Msk)
908 >> USBHS_DEVDMASTATUS_BUFF_COUNT_Pos);
909}
910
911
912/*--------------------------------------------------------
913* =========== USB Host Functions ========================
914*---------------------------------------------------------*/
915
917#define CHIP_USB_NUMPIPE 10
919#define CHIP_USB_DMA_NUMPIPE 7
920
922#define CHIP_USB_PIPE_MAXPACKETSIZE(ep) \
923 ((ep == 0) ? 64 : 1024)
924
926#define CHIP_USB_PIPE_BANKS(ep) ((ep==0)?1:((ep<=2)?3:2))
927
928
929#define CHIP_USB_PIPE_HBW(ep) ((((ep)>=1) &&((ep)<=2))?true:false)
930
932#define CHIP_USB_PIPE_DMA(ep) ((((ep)>=1)&&((ep)<=7))?true:false)
933
938__STATIC_INLINE void USBHS_SetHostHighSpeed(Usbhs *pUsbhs)
939{
940 pUsbhs->USBHS_HSTCTRL &= ~USBHS_HSTCTRL_SPDCONF_Msk;
941 pUsbhs->USBHS_HSTCTRL |= USBHS_HSTCTRL_SPDCONF_NORMAL;
942}
943
948__STATIC_INLINE void USBHS_SetHostLowSpeed(Usbhs *pUsbhs)
949{
950 pUsbhs->USBHS_HSTCTRL &= ~USBHS_HSTCTRL_SPDCONF_Msk;
951 pUsbhs->USBHS_HSTCTRL |= USBHS_HSTCTRL_SPDCONF_LOW_POWER;
952}
953
958__STATIC_INLINE void USBHS_SetHostForcedFullSpeed(Usbhs *pUsbhs)
959{
960 pUsbhs->USBHS_HSTCTRL &= ~USBHS_HSTCTRL_SPDCONF_Msk;
961 pUsbhs->USBHS_HSTCTRL |= USBHS_HSTCTRL_SPDCONF_FORCED_FS;
962}
963
968__STATIC_INLINE void USBHS_Reset(void)
969{
970 USBHS->USBHS_HSTCTRL |= USBHS_HSTCTRL_RESET;
971}
972
977__STATIC_INLINE void USBHS_StopReset(void)
978{
979 USBHS->USBHS_HSTCTRL &= ~USBHS_HSTCTRL_RESET;
980}
981
986__STATIC_INLINE void USBHS_Resume(void)
987{
988 USBHS->USBHS_HSTCTRL |= USBHS_HSTCTRL_RESUME;
989}
990
995__STATIC_INLINE void USBHS_EnableSOF(Usbhs *pUsbhs)
996{
997 pUsbhs->USBHS_HSTCTRL |= USBHS_HSTCTRL_SOFE;
998}
999
1004__STATIC_INLINE uint8_t USBHS_IsEnableSOF(Usbhs *pUsbhs)
1005{
1006 return (pUsbhs->USBHS_HSTCTRL & USBHS_HSTCTRL_SOFE) >> 8;
1007}
1012__STATIC_INLINE void USBHS_DisableSOF(void)
1013{
1014 USBHS->USBHS_HSTCTRL &= ~USBHS_HSTCTRL_SOFE;
1015}
1016
1021__STATIC_INLINE uint32_t USBHS_GetHostStatus(Usbhs *pUsbhs, uint8_t IntType)
1022{
1023 return (pUsbhs->USBHS_HSTISR & IntType);
1024}
1025
1026
1031__STATIC_INLINE uint32_t USBHS_GetHostPipeStatus(Usbhs *pUsbhs, uint8_t PipeInt)
1032{
1033 assert(PipeInt < CHIP_USB_NUMPIPE);
1034 return (pUsbhs->USBHS_HSTISR & (USBHS_HSTISR_PEP_0 << PipeInt));
1035}
1036
1037
1042__STATIC_INLINE uint32_t USBHS_GetHostDmaPipeStatus(Usbhs *pUsbhs,
1043 uint8_t PipeInt)
1044{
1045 assert(PipeInt);
1046 assert(PipeInt < CHIP_USB_DMA_NUMPIPE);
1047 return (pUsbhs->USBHS_HSTISR & (USBHS_HSTISR_DMA_1 << PipeInt));
1048}
1049
1054__STATIC_INLINE void USBHS_ClearHostStatus(Usbhs *pUsbhs, uint32_t IntType)
1055{
1056 pUsbhs->USBHS_HSTICR = IntType;
1057}
1058
1063__STATIC_INLINE void USBHS_SetHostStatus(Usbhs *pUsbhs, uint32_t IntType)
1064{
1065 pUsbhs->USBHS_HSTIFR = IntType;
1066}
1067
1072__STATIC_INLINE void USBHS_SetHostDmaStatus(Usbhs *pUsbhs, uint8_t PipeInt)
1073{
1074 assert(PipeInt);
1075 assert(PipeInt < CHIP_USB_DMA_NUMPIPE);
1076 pUsbhs->USBHS_HSTIFR = (USBHS_HSTIFR_DMA_1 << PipeInt);
1077}
1078
1079/*** Interrupt Mask ****/
1084__STATIC_INLINE uint8_t USBHS_IsHostIntEnable(Usbhs *pUsbhs, uint8_t IntType)
1085{
1086 return (pUsbhs->USBHS_HSTIMR & IntType);
1087}
1088
1093__STATIC_INLINE uint32_t USBHS_IsHostPipeIntEnable(Usbhs *pUsbhs,
1094 uint8_t PipeInt)
1095{
1096 assert(PipeInt < CHIP_USB_NUMPIPE);
1097 return (pUsbhs->USBHS_HSTIMR & (USBHS_HSTIMR_PEP_0 << PipeInt));
1098}
1099
1104__STATIC_INLINE uint32_t USBHS_IsHostDmaIntEnable(Usbhs *pUsbhs,
1105 uint8_t PipeInt)
1106{
1107 assert(PipeInt);
1108 assert(PipeInt < CHIP_USB_DMA_NUMPIPE);
1109 return (pUsbhs->USBHS_HSTIMR & (USBHS_HSTIMR_DMA_1 << PipeInt));
1110}
1111
1112/*** Interrupt Disable ****/
1117__STATIC_INLINE void USBHS_HostIntDisable(Usbhs *pUsbhs, uint32_t IntType)
1118{
1119 pUsbhs->USBHS_HSTIDR = IntType;
1120}
1121
1126__STATIC_INLINE void USBHS_HostPipeIntDisable(Usbhs *pUsbhs, uint8_t PipeInt)
1127{
1128 assert(PipeInt < CHIP_USB_NUMPIPE);
1129 pUsbhs->USBHS_HSTIDR = (USBHS_HSTIDR_PEP_0 << PipeInt);
1130}
1131
1136__STATIC_INLINE void USBHS_HostDmaIntDisable(Usbhs *pUsbhs, uint8_t PipeInt)
1137{
1138 assert(PipeInt);
1139 assert(PipeInt < CHIP_USB_DMA_NUMPIPE);
1140 pUsbhs->USBHS_HSTIDR = (USBHS_HSTIDR_DMA_1 << PipeInt);
1141}
1142
1143/*** Interrupt Enable ****/
1144
1149__STATIC_INLINE void USBHS_HostIntEnable(Usbhs *pUsbhs, uint32_t IntType)
1150{
1151 pUsbhs->USBHS_HSTIER = IntType;
1152}
1153
1158__STATIC_INLINE void USBHS_HostPipeIntEnable(Usbhs *pUsbhs, uint8_t PipeInt)
1159{
1160 assert(PipeInt < CHIP_USB_NUMPIPE);
1161 pUsbhs->USBHS_HSTIER = (USBHS_HSTIER_PEP_0 << PipeInt);
1162}
1163
1168__STATIC_INLINE void USBHS_HostDmaIntEnable(Usbhs *pUsbhs, uint8_t PipeInt)
1169{
1170 assert(PipeInt < CHIP_USB_DMA_NUMPIPE);
1171 pUsbhs->USBHS_HSTIER |= (USBHS_HSTIER_DMA_1 << PipeInt);
1172}
1173
1178__STATIC_INLINE uint16_t USBHS_HostGetSOF(void)
1179{
1180 return ((USBHS->USBHS_HSTFNUM & USBHS_HSTFNUM_FNUM_Msk) >>
1181 USBHS_HSTFNUM_FNUM_Pos);
1182}
1183
1188__STATIC_INLINE uint16_t USBHS_HostGetFramePos(void)
1189{
1190 return ((USBHS->USBHS_HSTFNUM & USBHS_HSTFNUM_FLENHIGH_Msk) >>
1191 USBHS_HSTFNUM_FLENHIGH_Pos);
1192}
1193
1194
1199__STATIC_INLINE uint16_t USBHS_HostGetMSOF(void)
1200{
1201 return ((USBHS->USBHS_HSTFNUM & USBHS_HSTFNUM_MFNUM_Msk) >>
1202 USBHS_HSTFNUM_MFNUM_Pos);
1203}
1204
1205__STATIC_INLINE void USBHS_HostSetAddr(Usbhs *pUsbhs, uint8_t Pipe,
1206 uint8_t Addr)
1207{
1208 assert(Pipe < CHIP_USB_NUMPIPE);
1209
1210 if (Pipe < 4)
1211 pUsbhs->USBHS_HSTADDR1 |= (Addr << (8 * Pipe));
1212 else if ((Pipe < 8) && (Pipe >= 4))
1213 pUsbhs->USBHS_HSTADDR2 |= (Addr << (8 * (Pipe - 4)));
1214 else
1215 pUsbhs->USBHS_HSTADDR3 |= (Addr << (8 * (Pipe - 8)));
1216
1217}
1218
1219__STATIC_INLINE uint8_t USBHS_HostGetAddr(Usbhs *pUsbhs, uint8_t Pipe)
1220{
1221 assert(Pipe < CHIP_USB_NUMPIPE);
1222
1223 if (Pipe < 4)
1224 return (pUsbhs->USBHS_HSTADDR1 >> (8 * Pipe));
1225 else if ((Pipe < 8) && (Pipe >= 4))
1226 return (pUsbhs->USBHS_HSTADDR2 >> (8 * (Pipe - 4)));
1227 else
1228 return (pUsbhs->USBHS_HSTADDR3 >> (8 * (Pipe - 8)));
1229
1230}
1231
1236__STATIC_INLINE void USBHS_HostPipeEnable(Usbhs *pUsbhs, uint8_t Pipe)
1237{
1238 assert(Pipe < CHIP_USB_NUMPIPE);
1239 pUsbhs->USBHS_HSTPIP |= (USBHS_HSTPIP_PEN0 << Pipe);
1240}
1241
1246__STATIC_INLINE void USBHS_HostPipeDisable(Usbhs *pUsbhs, uint8_t Pipe)
1247{
1248 assert(Pipe < CHIP_USB_NUMPIPE);
1249 pUsbhs->USBHS_HSTPIP &= ~(USBHS_HSTPIP_PEN0 << Pipe);
1250}
1251
1256__STATIC_INLINE uint32_t USBHS_IsHostPipeEnable(Usbhs *pUsbhs, uint8_t Pipe)
1257{
1258 assert(Pipe < CHIP_USB_NUMPIPE);
1259 return (pUsbhs->USBHS_HSTPIP & (USBHS_HSTPIP_PEN0 << Pipe));
1260}
1265__STATIC_INLINE void USBHS_HostPipeReset(Usbhs *pUsbhs, uint8_t Pipe)
1266{
1267 assert(Pipe < CHIP_USB_NUMPIPE);
1268 pUsbhs->USBHS_HSTPIP |= (USBHS_HSTPIP_PRST0 << Pipe);
1269 pUsbhs->USBHS_HSTPIP &= ~(USBHS_HSTPIP_PRST0 << Pipe);
1270}
1271
1276__STATIC_INLINE void USBHS_HostConfigure(Usbhs *pUsbhs, uint8_t Pipe,
1277 uint32_t pipeBank, uint8_t pipeSize, uint32_t pipeType, uint32_t pipeToken,
1278 uint8_t pipeEpNum, uint8_t PipeIntFreq)
1279{
1280 assert(Pipe < CHIP_USB_NUMPIPE);
1281 pUsbhs->USBHS_HSTPIPCFG[Pipe] |= (pipeBank | pipeToken | USBHS_HSTPIPCFG_PSIZE(
1282 pipeSize) | pipeType | USBHS_HSTPIPCFG_PEPNUM(pipeEpNum) |
1283 USBHS_HSTPIPCFG_INTFRQ(PipeIntFreq));
1284}
1285
1290__STATIC_INLINE void USBHS_HostAllocMem(Usbhs *pUsbhs, uint8_t Pipe)
1291{
1292 pUsbhs->USBHS_HSTPIPCFG[Pipe] |= USBHS_HSTPIPCFG_ALLOC;
1293
1294}
1295
1300__STATIC_INLINE void USBHS_HostFreeMem(Usbhs *pUsbhs, uint8_t Pipe)
1301{
1302 pUsbhs->USBHS_HSTPIPCFG[Pipe] &= ~USBHS_HSTPIPCFG_ALLOC;
1303
1304}
1305
1306
1311__STATIC_INLINE uint16_t USBHS_HostGetSize(Usbhs *pUsbhs, uint8_t Pipe)
1312{
1313 return (8 << ((pUsbhs->USBHS_HSTPIPCFG[Pipe] & USBHS_HSTPIPCFG_PSIZE_Msk) >>
1314 USBHS_HSTPIPCFG_PSIZE_Pos));
1315
1316}
1317
1322__STATIC_INLINE void USBHS_HostSetToken(Usbhs *pUsbhs, uint8_t Pipe,
1323 uint32_t Token)
1324{
1325 pUsbhs->USBHS_HSTPIPCFG[Pipe] &= ~USBHS_HSTPIPCFG_PTOKEN_Msk;
1326 pUsbhs->USBHS_HSTPIPCFG[Pipe] |= Token;
1327
1328}
1329
1330
1335__STATIC_INLINE uint32_t USBHS_HostGetToken(Usbhs *pUsbhs, uint8_t Pipe)
1336{
1337 return (pUsbhs->USBHS_HSTPIPCFG[Pipe] & USBHS_HSTPIPCFG_PTOKEN_Msk);
1338
1339}
1340
1341
1346__STATIC_INLINE void USBHS_HostSetPipeType(Usbhs *pUsbhs, uint8_t Pipe,
1347 uint8_t PipeType)
1348{
1349 pUsbhs->USBHS_HSTPIPCFG[Pipe] &= ~USBHS_HSTPIPCFG_PTYPE_Msk;
1350 pUsbhs->USBHS_HSTPIPCFG[Pipe] |= PipeType;
1351
1352}
1353
1358__STATIC_INLINE uint32_t USBHS_HostGetPipeType(Usbhs *pUsbhs, uint8_t Pipe)
1359{
1360 return (pUsbhs->USBHS_HSTPIPCFG[Pipe] & USBHS_HSTPIPCFG_PTYPE_Msk);
1361
1362}
1363
1364__STATIC_INLINE uint8_t USBHS_GetPipeEpAddr(Usbhs *pUsbhs, uint8_t Pipe)
1365{
1366
1367 if (USBHS_HostGetToken(USBHS, Pipe) == USBHS_HSTPIPCFG_PTOKEN_IN)
1368 return (((pUsbhs->USBHS_HSTPIPCFG[Pipe] & USBHS_HSTPIPCFG_PEPNUM_Msk) >>
1369 USBHS_HSTPIPCFG_PEPNUM_Pos) | 0x80);
1370 else
1371 return (((pUsbhs->USBHS_HSTPIPCFG[Pipe] & USBHS_HSTPIPCFG_PEPNUM_Msk) >>
1372 USBHS_HSTPIPCFG_PEPNUM_Pos) | 0x00);
1373}
1374
1375
1376
1381__STATIC_INLINE void USBHS_HostEnableAutoSw(Usbhs *pUsbhs, uint8_t Pipe)
1382{
1383 pUsbhs->USBHS_HSTPIPCFG[Pipe] |= USBHS_HSTPIPCFG_AUTOSW;
1384}
1385
1390__STATIC_INLINE void USBHS_HostDisableAutoSw(Usbhs *pUsbhs, uint8_t Pipe)
1391{
1392 pUsbhs->USBHS_HSTPIPCFG[Pipe] &= ~USBHS_HSTPIPCFG_AUTOSW;
1393}
1394
1399__STATIC_INLINE void USBHS_HostSetIntFreq(Usbhs *pUsbhs, uint8_t Pipe,
1400 uint8_t Freq)
1401{
1402 pUsbhs->USBHS_HSTPIPCFG[Pipe] |= USBHS_HSTPIPCFG_BINTERVAL(Freq);
1403}
1404
1405
1410__STATIC_INLINE void USBHS_HostEnablePing(Usbhs *pUsbhs, uint8_t Pipe)
1411{
1412 pUsbhs->USBHS_HSTPIPCFG[Pipe] |= USBHS_HSTPIPCFG_PINGEN;
1413}
1414
1415
1420__STATIC_INLINE uint8_t USBHS_HostGetDataTogSeq(Usbhs *pUsbhs, uint8_t Pipe)
1421{
1422 return ((pUsbhs->USBHS_HSTPIPISR[Pipe] & USBHS_HSTPIPISR_DTSEQ_Msk) >>
1423 USBHS_HSTPIPISR_DTSEQ_Pos);
1424}
1425
1426
1431__STATIC_INLINE uint8_t USBHS_HostGetNumOfBusyBank(Usbhs *pUsbhs, uint8_t Pipe)
1432{
1433 return ((pUsbhs->USBHS_HSTPIPISR[Pipe] & USBHS_HSTPIPISR_NBUSYBK_Msk) >>
1434 USBHS_HSTPIPISR_NBUSYBK_Pos);
1435}
1436
1437
1442__STATIC_INLINE uint8_t USBHS_HostGetCurrentBank(Usbhs *pUsbhs, uint8_t Pipe)
1443{
1444 return ((pUsbhs->USBHS_HSTPIPISR[Pipe] & USBHS_HSTPIPISR_CURRBK_Msk) >>
1445 USBHS_HSTPIPISR_CURRBK_Pos);
1446}
1447
1448
1453__STATIC_INLINE uint8_t USBHS_HostGetPipeByteCount(Usbhs *pUsbhs, uint8_t Pipe)
1454{
1455 return ((pUsbhs->USBHS_HSTPIPISR[Pipe] & USBHS_HSTPIPISR_PBYCT_Msk) >>
1456 USBHS_HSTPIPISR_PBYCT_Pos);
1457}
1458
1463__STATIC_INLINE uint32_t USBHS_IsHostConfigOk(Usbhs *pUsbhs, uint8_t Pipe)
1464{
1465 return (pUsbhs->USBHS_HSTPIPISR[Pipe] & USBHS_DEVEPTISR_CFGOK);
1466}
1467
1472__STATIC_INLINE uint32_t USBHS_HostGetIntTypeStatus(Usbhs *pUsbhs, uint8_t Pipe,
1473 uint32_t intType)
1474{
1475 return (pUsbhs->USBHS_HSTPIPISR[Pipe] & intType);
1476}
1477
1482__STATIC_INLINE void USBHS_HostAckPipeIntType(Usbhs *pUsbhs, uint8_t Pipe,
1483 uint32_t intType)
1484{
1485 pUsbhs->USBHS_HSTPIPICR[Pipe] = intType;
1486}
1487
1492__STATIC_INLINE void USBHS_HostSetPipeIntType(Usbhs *pUsbhs, uint8_t Pipe,
1493 uint32_t intType)
1494{
1495 pUsbhs->USBHS_HSTPIPIFR[Pipe] = intType;
1496}
1497
1502__STATIC_INLINE uint32_t USBHS_IsHostPipeIntTypeEnable(Usbhs *pUsbhs,
1503 uint8_t Pipe, uint32_t intType)
1504{
1505 return (pUsbhs->USBHS_HSTPIPIMR[Pipe] & intType);
1506}
1507
1512__STATIC_INLINE void USBHS_HostDisablePipeIntType(Usbhs *pUsbhs, uint8_t Pipe,
1513 uint32_t intType)
1514{
1515 pUsbhs->USBHS_HSTPIPIDR[Pipe] = intType;
1516}
1517
1522__STATIC_INLINE void USBHS_HostEnablePipeIntType(Usbhs *pUsbhs, uint8_t Pipe,
1523 uint32_t intType)
1524{
1525 pUsbhs->USBHS_HSTPIPIER[Pipe] = intType;
1526}
1527
1532__STATIC_INLINE void USBHS_HostEnableInReq(Usbhs *pUsbhs, uint8_t Pipe)
1533{
1534 pUsbhs->USBHS_HSTPIPINRQ[Pipe] |= USBHS_HSTPIPINRQ_INMODE;
1535}
1536
1541__STATIC_INLINE void USBHS_HostDisableInReq(Usbhs *pUsbhs, uint8_t Pipe)
1542{
1543 pUsbhs->USBHS_HSTPIPINRQ[Pipe] &= ~USBHS_HSTPIPINRQ_INMODE;
1544}
1545
1550__STATIC_INLINE uint8_t USBHS_IsHostInReqEnable(Usbhs *pUsbhs, uint8_t Pipe)
1551{
1552 return ((pUsbhs->USBHS_HSTPIPINRQ[Pipe] & USBHS_HSTPIPINRQ_INMODE) >> 8);
1553}
1554
1559__STATIC_INLINE void USBHS_HostInReq(Usbhs *pUsbhs, uint8_t Pipe, uint8_t InReq)
1560{
1561 pUsbhs->USBHS_HSTPIPINRQ[Pipe] = USBHS_HSTPIPINRQ_INRQ(InReq - 1);
1562}
1563
1564
1569__STATIC_INLINE void USBHS_HostSetErr(Usbhs *pUsbhs, uint8_t Pipe, uint8_t Err)
1570{
1571 pUsbhs->USBHS_HSTPIPERR[Pipe] |= Err;
1572}
1573
1578__STATIC_INLINE uint8_t USBHS_HostGetErr(Usbhs *pUsbhs, uint8_t Pipe,
1579 uint8_t Err)
1580{
1581 return (pUsbhs->USBHS_HSTPIPERR[Pipe] & Err);
1582}
1583
1584
1589__STATIC_INLINE void USBHS_HostClearErr(Usbhs *pUsbhs, uint8_t Pipe,
1590 uint8_t Err)
1591{
1592 pUsbhs->USBHS_HSTPIPERR[Pipe] = Err;
1593}
1594
1595
1596__STATIC_INLINE uint8_t USBHS_GetInterruptPipeNum(void)
1597{
1598 uint32_t status = USBHS->USBHS_HSTISR;
1599 uint32_t mask = USBHS->USBHS_HSTIMR;
1600 return ctz(((status & mask) >> 8) | (1 << USBHS_EPT_NUM));
1601}
1602
1603static inline uint8_t USBHS_GetInterruptPipeDmaNum(void)
1604{
1605 uint32_t status = USBHS->USBHS_HSTISR;
1606 uint32_t mask = USBHS->USBHS_HSTIMR;
1607 return (ctz(((status & mask) >> 25) | (1 << (USBHS_EPT_NUM - 1))) + 1);
1608}
1609/*--------------------------------------------------------
1610* =========== USB Host's pipe DMA functions =========
1611*---------------------------------------------------------*/
1612
1618__STATIC_INLINE void USBHS_SetHostDmaNDA(UsbhsHstdma *pUsbDma, uint32_t Desc)
1619{
1620 pUsbDma->USBHS_HSTDMANXTDSC = Desc;
1621}
1622
1628__STATIC_INLINE uint32_t USBHS_GetHostDmaNDA(UsbhsHstdma *pUsbDma)
1629{
1630 return (pUsbDma->USBHS_HSTDMANXTDSC);
1631}
1632
1638__STATIC_INLINE void USBHS_SetHostDmaBuffAdd(UsbhsHstdma *pUsbDma,
1639 uint32_t Addr)
1640{
1641 pUsbDma->USBHS_HSTDMAADDRESS = Addr;
1642}
1643
1644
1650__STATIC_INLINE uint32_t USBHS_GetHostDmaBuffAdd(UsbhsHstdma *pUsbDma)
1651{
1652 return (pUsbDma->USBHS_HSTDMAADDRESS);
1653}
1654
1660__STATIC_INLINE void USBHS_HostConfigureDma(UsbhsHstdma *pUsbDma, uint32_t Cfg)
1661{
1662 pUsbDma->USBHS_HSTDMACONTROL |= Cfg;
1663}
1664
1670__STATIC_INLINE uint32_t USBHS_GetHostDmaConfiguration(UsbhsHstdma *pUsbDma)
1671{
1672 return (pUsbDma->USBHS_HSTDMACONTROL);
1673}
1674
1675
1681__STATIC_INLINE void USBHS_SetHostPipeDmaStatus(UsbhsHstdma *pUsbDma,
1682 uint32_t Status)
1683{
1684 pUsbDma->USBHS_HSTDMASTATUS = Status;
1685}
1686
1687
1693__STATIC_INLINE uint32_t USBHS_GetHostPipeDmaStatus(UsbhsHstdma *pUsbDma)
1694{
1695 return (pUsbDma->USBHS_HSTDMASTATUS);
1696}
1697
1699#endif /* #ifndef USBHS_H */
#define ctz(u)
Counts the trailing zero bits of the given value considered as a 32-bit integer.
Definition: compiler.h:440
UsbhsDevdma hardware registers.
Definition: component_usbhs.h:41
__IO uint32_t USBHS_DEVDMACONTROL
(UsbhsDevdma Offset: 0x8) Device DMA Channel Control Register
Definition: component_usbhs.h:44
__IO uint32_t USBHS_DEVDMAADDRESS
(UsbhsDevdma Offset: 0x4) Device DMA Channel Address Register
Definition: component_usbhs.h:43
__IO uint32_t USBHS_DEVDMANXTDSC
(UsbhsDevdma Offset: 0x0) Device DMA Channel Next Descriptor Address Register
Definition: component_usbhs.h:42
__IO uint32_t USBHS_DEVDMASTATUS
(UsbhsDevdma Offset: 0xC) Device DMA Channel Status Register
Definition: component_usbhs.h:45
UsbhsHstdma hardware registers.
Definition: component_usbhs.h:48
__IO uint32_t USBHS_HSTDMASTATUS
(UsbhsHstdma Offset: 0xC) Host DMA Channel Status Register
Definition: component_usbhs.h:52
__IO uint32_t USBHS_HSTDMAADDRESS
(UsbhsHstdma Offset: 0x4) Host DMA Channel Address Register
Definition: component_usbhs.h:50
__IO uint32_t USBHS_HSTDMANXTDSC
(UsbhsHstdma Offset: 0x0) Host DMA Channel Next Descriptor Address Register
Definition: component_usbhs.h:49
__IO uint32_t USBHS_HSTDMACONTROL
(UsbhsHstdma Offset: 0x8) Host DMA Channel Control Register
Definition: component_usbhs.h:51
Definition: component_usbhs.h:57
__I uint32_t USBHS_DEVFNUM
(Usbhs Offset: 0x0020) Device Frame Number Register
Definition: component_usbhs.h:66
__O uint32_t USBHS_DEVEPTIDR[10]
(Usbhs Offset: 0x220) Device Endpoint Disable Register (n = 0)
Definition: component_usbhs.h:80
__O uint32_t USBHS_DEVIDR
(Usbhs Offset: 0x0014) Device Global Interrupt Disable Register
Definition: component_usbhs.h:63
__O uint32_t USBHS_HSTPIPIDR[10]
(Usbhs Offset: 0x620) Host Pipe Disable Register (n = 0)
Definition: component_usbhs.h:109
__IO uint32_t USBHS_HSTCTRL
(Usbhs Offset: 0x0400) Host General Control Register
Definition: component_usbhs.h:84
__O uint32_t USBHS_HSTIDR
(Usbhs Offset: 0x0414) Host Global Interrupt Disable Register
Definition: component_usbhs.h:89
__O uint32_t USBHS_DEVEPTIFR[10]
(Usbhs Offset: 0x190) Device Endpoint Set Register (n = 0)
Definition: component_usbhs.h:74
__O uint32_t USBHS_DEVIER
(Usbhs Offset: 0x0018) Device Global Interrupt Enable Register
Definition: component_usbhs.h:64
__I uint32_t USBHS_DEVISR
(Usbhs Offset: 0x0004) Device Global Interrupt Status Register
Definition: component_usbhs.h:59
__IO uint32_t USBHS_HSTADDR1
(Usbhs Offset: 0x0424) Host Address 1 Register
Definition: component_usbhs.h:93
__O uint32_t USBHS_HSTIER
(Usbhs Offset: 0x0418) Host Global Interrupt Enable Register
Definition: component_usbhs.h:90
__IO uint32_t USBHS_DEVEPT
(Usbhs Offset: 0x001C) Device Endpoint Register
Definition: component_usbhs.h:65
__O uint32_t USBHS_DEVEPTIER[10]
(Usbhs Offset: 0x1F0) Device Endpoint Enable Register (n = 0)
Definition: component_usbhs.h:78
__I uint32_t USBHS_HSTIMR
(Usbhs Offset: 0x0410) Host Global Interrupt Mask Register
Definition: component_usbhs.h:88
__IO uint32_t USBHS_HSTPIPINRQ[10]
(Usbhs Offset: 0x650) Host Pipe IN Request Register (n = 0)
Definition: component_usbhs.h:111
__I uint32_t USBHS_SR
(Usbhs Offset: 0x0804) General Status Register
Definition: component_usbhs.h:118
__O uint32_t USBHS_HSTIFR
(Usbhs Offset: 0x040C) Host Global Interrupt Set Register
Definition: component_usbhs.h:87
__O uint32_t USBHS_DEVIFR
(Usbhs Offset: 0x000C) Device Global Interrupt Set Register
Definition: component_usbhs.h:61
__IO uint32_t USBHS_DEVCTRL
(Usbhs Offset: 0x0000) Device General Control Register
Definition: component_usbhs.h:58
__O uint32_t USBHS_SCR
(Usbhs Offset: 0x0808) General Status Clear Register
Definition: component_usbhs.h:119
__I uint32_t USBHS_HSTPIPIMR[10]
(Usbhs Offset: 0x5C0) Host Pipe Mask Register (n = 0)
Definition: component_usbhs.h:105
__IO uint32_t USBHS_DEVEPTCFG[10]
(Usbhs Offset: 0x100) Device Endpoint Configuration Register (n = 0)
Definition: component_usbhs.h:68
__I uint32_t USBHS_DEVEPTISR[10]
(Usbhs Offset: 0x130) Device Endpoint Status Register (n = 0)
Definition: component_usbhs.h:70
__IO uint32_t USBHS_HSTPIPCFG[10]
(Usbhs Offset: 0x500) Host Pipe Configuration Register (n = 0)
Definition: component_usbhs.h:97
__I uint32_t USBHS_DEVIMR
(Usbhs Offset: 0x0010) Device Global Interrupt Mask Register
Definition: component_usbhs.h:62
__O uint32_t USBHS_HSTPIPIER[10]
(Usbhs Offset: 0x5F0) Host Pipe Enable Register (n = 0)
Definition: component_usbhs.h:107
__IO uint32_t USBHS_HSTPIP
(Usbhs Offset: 0x0041C) Host Pipe Register
Definition: component_usbhs.h:91
__IO uint32_t USBHS_CTRL
(Usbhs Offset: 0x0800) General Control Register
Definition: component_usbhs.h:117
__O uint32_t USBHS_SFR
(Usbhs Offset: 0x080C) General Status Set Register
Definition: component_usbhs.h:120
__O uint32_t USBHS_HSTPIPIFR[10]
(Usbhs Offset: 0x590) Host Pipe Set Register (n = 0)
Definition: component_usbhs.h:103
__I uint32_t USBHS_HSTPIPISR[10]
(Usbhs Offset: 0x530) Host Pipe Status Register (n = 0)
Definition: component_usbhs.h:99
__O uint32_t USBHS_DEVEPTICR[10]
(Usbhs Offset: 0x160) Device Endpoint Clear Register (n = 0)
Definition: component_usbhs.h:72
__O uint32_t USBHS_DEVICR
(Usbhs Offset: 0x0008) Device Global Interrupt Clear Register
Definition: component_usbhs.h:60
__IO uint32_t USBHS_HSTPIPERR[10]
(Usbhs Offset: 0x680) Host Pipe Error Register (n = 0)
Definition: component_usbhs.h:113
__IO uint32_t USBHS_HSTADDR3
(Usbhs Offset: 0x042C) Host Address 3 Register
Definition: component_usbhs.h:95
__I uint32_t USBHS_HSTISR
(Usbhs Offset: 0x0404) Host Global Interrupt Status Register
Definition: component_usbhs.h:85
__I uint32_t USBHS_DEVEPTIMR[10]
(Usbhs Offset: 0x1C0) Device Endpoint Mask Register (n = 0)
Definition: component_usbhs.h:76
__O uint32_t USBHS_HSTICR
(Usbhs Offset: 0x0408) Host Global Interrupt Clear Register
Definition: component_usbhs.h:86
__IO uint32_t USBHS_HSTADDR2
(Usbhs Offset: 0x0428) Host Address 2 Register
Definition: component_usbhs.h:94
__O uint32_t USBHS_HSTPIPICR[10]
(Usbhs Offset: 0x560) Host Pipe Clear Register (n = 0)
Definition: component_usbhs.h:101
__STATIC_INLINE uint8_t USBHS_IsEnableSOF(Usbhs *pUsbhs)
Sets USB host Enable the Generation of Start of Frame.
Definition: usbhs.h:1004
__STATIC_INLINE void USBHS_ForceLowSpeed(Usbhs *pUsbhs, uint8_t Enable)
Force Low Speed mode.
Definition: usbhs.h:324
__STATIC_INLINE bool USBHS_IsUsbLowSpeed(Usbhs *pUsbhs)
Enable or disable USB address.
Definition: usbhs.h:231
__STATIC_INLINE void USBHS_FreezeClock(Usbhs *pUsbhs)
Freeze or unfreeze USB clock.
Definition: usbhs.h:106
__STATIC_INLINE uint32_t USBHS_GetHostDmaPipeStatus(Usbhs *pUsbhs, uint8_t PipeInt)
Gets USB host interrupt status.
Definition: usbhs.h:1042
__STATIC_INLINE void USBHS_SetHostLowSpeed(Usbhs *pUsbhs)
Sets USB host's speed to Low speed.
Definition: usbhs.h:948
__STATIC_INLINE void USBHS_EnableHSTestMode(Usbhs *pUsbhs)
Disable/Enables HS Test mode.
Definition: usbhs.h:377
__STATIC_INLINE uint32_t USBHS_IsHostPipeIntTypeEnable(Usbhs *pUsbhs, uint8_t Pipe, uint32_t intType)
Gets USB host interrupt status.
Definition: usbhs.h:1502
__STATIC_INLINE void USBHS_HostPipeEnable(Usbhs *pUsbhs, uint8_t Pipe)
Gets USB host interrupt status.
Definition: usbhs.h:1236
__STATIC_INLINE uint32_t USBHS_GetHostDmaNDA(UsbhsHstdma *pUsbDma)
Gets DMA next descriptor address.
Definition: usbhs.h:1628
__STATIC_INLINE void USBHS_Reset(void)
Sets USB host sends reste signal on USB Bus.
Definition: usbhs.h:968
__STATIC_INLINE void USBHS_SetDmaStatus(UsbhsDevdma *pUsbDma, uint32_t Status)
Set DMA status.
Definition: usbhs.h:883
#define CHIP_USB_DMA_NUMPIPE
Definition: usbhs.h:919
__STATIC_INLINE void USBHS_DisableInt(Usbhs *pUsbhs, uint32_t IntType)
Disables interrupt for endpoint.
Definition: usbhs.h:522
__STATIC_INLINE uint32_t USBHS_IsIntEnableEP(Usbhs *pUsbhs, uint8_t EpNum)
Check if endpoint's interrupt is enabled for a given endpoint number.
Definition: usbhs.h:465
__STATIC_INLINE uint32_t USBHS_ReadStatus(Usbhs *pUsbhs)
Raise interrupt for endpoint.
Definition: usbhs.h:183
__STATIC_INLINE void USBHS_ConfigureEPs(Usbhs *pUsbhs, const uint8_t Ep, const uint8_t Type, const uint8_t Dir, const uint8_t Size, const uint8_t Bank)
Definition: usbhs.h:629
__STATIC_INLINE uint32_t USBHS_GetUsbSpeed(Usbhs *pUsbhs)
Enable or disable USB address.
Definition: usbhs.h:194
__STATIC_INLINE uint8_t USBHS_IsHostInReqEnable(Usbhs *pUsbhs, uint8_t Pipe)
Gets USB host interrupt status.
Definition: usbhs.h:1550
__STATIC_INLINE void USBHS_HostEnableInReq(Usbhs *pUsbhs, uint8_t Pipe)
Gets USB host interrupt status.
Definition: usbhs.h:1532
__STATIC_INLINE void USBHS_UsbEnable(Usbhs *pUsbhs, uint8_t Enable)
Enables or disables USB.
Definition: usbhs.h:140
__STATIC_INLINE uint8_t USBHS_GetEpType(Usbhs *pUsbhs, uint8_t Ep)
Definition: usbhs.h:688
__STATIC_INLINE void USBHS_HostDisablePipeIntType(Usbhs *pUsbhs, uint8_t Pipe, uint32_t intType)
Gets USB host interrupt status.
Definition: usbhs.h:1512
__STATIC_INLINE void USBHS_ConfigureDma(UsbhsDevdma *pUsbDma, uint32_t Cfg)
Setup the USBHS DMA.
Definition: usbhs.h:862
__STATIC_INLINE bool USBHS_IsUsbHighSpeed(Usbhs *pUsbhs)
Enable or disable USB address.
Definition: usbhs.h:219
__STATIC_INLINE void USBHS_SetIsoTrans(Usbhs *pUsbhs, uint8_t Ep, uint8_t nbTrans)
Definition: usbhs.h:707
__STATIC_INLINE void USBHS_FreeMemory(Usbhs *pUsbhs, uint8_t Ep)
Definition: usbhs.h:670
__STATIC_INLINE uint32_t USBHS_GetHostStatus(Usbhs *pUsbhs, uint8_t IntType)
Gets USB host interrupt status.
Definition: usbhs.h:1021
__STATIC_INLINE uint32_t USBHS_ReadIntStatus(Usbhs *pUsbhs, uint32_t IntType)
Read status for an interrupt.
Definition: usbhs.h:388
__STATIC_INLINE uint8_t USBHS_HostGetCurrentBank(Usbhs *pUsbhs, uint8_t Pipe)
Gets USB host interrupt status.
Definition: usbhs.h:1442
__STATIC_INLINE void USBHS_EnableHighSpeed(Usbhs *pUsbhs, uint8_t Enable)
Disable/Enables High Speed mode.
Definition: usbhs.h:338
__STATIC_INLINE void USBHS_HostPipeIntDisable(Usbhs *pUsbhs, uint8_t PipeInt)
Gets USB host interrupt status.
Definition: usbhs.h:1126
__STATIC_INLINE void USBHS_SetHostDmaNDA(UsbhsHstdma *pUsbDma, uint32_t Desc)
Sets DMA next descriptor address.
Definition: usbhs.h:1618
__STATIC_INLINE void USBHS_HostSetToken(Usbhs *pUsbhs, uint8_t Pipe, uint32_t Token)
Gets USB host interrupt status.
Definition: usbhs.h:1322
__STATIC_INLINE uint32_t USBHS_GetHostPipeStatus(Usbhs *pUsbhs, uint8_t PipeInt)
Gets USB host interrupt status.
Definition: usbhs.h:1031
__STATIC_INLINE void USBHS_HostPipeDisable(Usbhs *pUsbhs, uint8_t Pipe)
Gets USB host interrupt status.
Definition: usbhs.h:1246
__STATIC_INLINE uint32_t USBHS_GetConfigureEPs(Usbhs *pUsbhs, uint8_t Ep, uint32_t IntType)
Definition: usbhs.h:679
__STATIC_INLINE void USBHS_HostDmaIntDisable(Usbhs *pUsbhs, uint8_t PipeInt)
Gets USB host interrupt status.
Definition: usbhs.h:1136
__STATIC_INLINE uint32_t USBHS_IsHostDmaIntEnable(Usbhs *pUsbhs, uint8_t PipeInt)
Gets USB host interrupt status.
Definition: usbhs.h:1104
__STATIC_INLINE void USBHS_EnableTestMode(Usbhs *pUsbhs, uint32_t mode)
Disable/Enables Test mode.
Definition: usbhs.h:366
__STATIC_INLINE uint32_t USBHS_ReadDmaIntStatus(Usbhs *pUsbhs, uint8_t DmaNum)
Read status for a DMA Endpoint.
Definition: usbhs.h:409
__STATIC_INLINE uint32_t USBHS_IsEpIntEnable(Usbhs *pUsbhs, uint8_t Ep, uint32_t EpIntType)
Definition: usbhs.h:716
__STATIC_INLINE uint8_t USBHS_HostGetNumOfBusyBank(Usbhs *pUsbhs, uint8_t Pipe)
Gets USB host interrupt status.
Definition: usbhs.h:1431
__STATIC_INLINE uint32_t USBHS_HostGetPipeType(Usbhs *pUsbhs, uint8_t Pipe)
Gets USB host interrupt status.
Definition: usbhs.h:1358
__STATIC_INLINE void USBHS_HostEnablePing(Usbhs *pUsbhs, uint8_t Pipe)
Gets USB host interrupt status.
Definition: usbhs.h:1410
__STATIC_INLINE void USBHS_HostFreeMem(Usbhs *pUsbhs, uint8_t Pipe)
Gets USB host interrupt status.
Definition: usbhs.h:1300
__STATIC_INLINE void USBHS_HostSetIntFreq(Usbhs *pUsbhs, uint8_t Pipe, uint8_t Freq)
Gets USB host interrupt status.
Definition: usbhs.h:1399
__STATIC_INLINE void USBHS_HostClearErr(Usbhs *pUsbhs, uint8_t Pipe, uint8_t Err)
Gets USB host interrupt status.
Definition: usbhs.h:1589
__STATIC_INLINE uint32_t USBHS_IsBankKilled(Usbhs *pUsbhs, uint8_t Ep)
Definition: usbhs.h:735
__STATIC_INLINE void USBHS_HostSetPipeType(Usbhs *pUsbhs, uint8_t Pipe, uint8_t PipeType)
Gets USB host interrupt status.
Definition: usbhs.h:1346
__STATIC_INLINE void USBHS_UsbMode(Usbhs *pUsbhs, USB_Mode_t Mode)
Device or Host Mode.
Definition: usbhs.h:155
__STATIC_INLINE uint32_t USBHS_IsDmaIntEnable(Usbhs *pUsbhs, uint8_t DmaNum)
Check if endpoint's DMA interrupt is enabled for a given endpoint DMA number.
Definition: usbhs.h:478
__STATIC_INLINE void USBHS_SetHostDmaStatus(Usbhs *pUsbhs, uint8_t PipeInt)
Gets USB host interrupt status.
Definition: usbhs.h:1072
__STATIC_INLINE void USBHS_AckEpInterrupt(Usbhs *pUsbhs, uint8_t Ep, uint32_t EpInt)
Definition: usbhs.h:759
__STATIC_INLINE void USBHS_DisableIntEP(Usbhs *pUsbhs, uint8_t Ep)
Disables interrupt for endpoint.
Definition: usbhs.h:533
__STATIC_INLINE void USBHS_RaiseInt(Usbhs *pUsbhs, uint32_t IntType)
Raise interrupt for endpoint.
Definition: usbhs.h:432
__STATIC_INLINE uint8_t USBHS_GetFrameNumCrcErr(Usbhs *pUsbhs)
Get Frame number CRC error.
Definition: usbhs.h:616
__STATIC_INLINE uint8_t USBHS_IsHostIntEnable(Usbhs *pUsbhs, uint8_t IntType)
Gets USB host interrupt status.
Definition: usbhs.h:1084
__STATIC_INLINE void USBHS_EnableEPIntType(Usbhs *pUsbhs, uint8_t Ep, uint32_t EpInt)
Definition: usbhs.h:726
__STATIC_INLINE uint32_t USBHS_GetDmaConfiguration(UsbhsDevdma *pUsbDma)
Get DMA configuration.
Definition: usbhs.h:872
__STATIC_INLINE uint16_t USBHS_ByteCount(Usbhs *pUsbhs, uint8_t Ep)
Definition: usbhs.h:806
__STATIC_INLINE uint32_t USBHS_GetDmaBuffAdd(UsbhsDevdma *pUsbDma)
Gets USBHS's DMA Buffer addresse.
Definition: usbhs.h:852
__STATIC_INLINE void USBHS_SetHostStatus(Usbhs *pUsbhs, uint32_t IntType)
Gets USB host interrupt status.
Definition: usbhs.h:1063
__STATIC_INLINE void USBHS_VBusHWC(Usbhs *pUsbhs, uint8_t Enable)
Freeze or unfreeze USB clock.
Definition: usbhs.h:125
__STATIC_INLINE void USBHS_UnFreezeClock(Usbhs *pUsbhs)
Freeze or unfreeze USB clock.
Definition: usbhs.h:116
__STATIC_INLINE void USBHS_SetHostForcedFullSpeed(Usbhs *pUsbhs)
Sets USB host's speed to forced Full speed.
Definition: usbhs.h:958
__STATIC_INLINE void USBHS_EnableInt(Usbhs *pUsbhs, uint32_t IntType)
Enables Interrupt.
Definition: usbhs.h:489
__STATIC_INLINE void USBHS_HostIntEnable(Usbhs *pUsbhs, uint32_t IntType)
Gets USB host interrupt status.
Definition: usbhs.h:1149
__STATIC_INLINE void USBHS_SetHostDmaBuffAdd(UsbhsHstdma *pUsbDma, uint32_t Addr)
Sets USBHS's DMA Buffer addresse.
Definition: usbhs.h:1638
__STATIC_INLINE uint32_t USBHS_HostGetToken(Usbhs *pUsbhs, uint8_t Pipe)
Gets USB host interrupt status.
Definition: usbhs.h:1335
__STATIC_INLINE void USBHS_RaiseEPInt(Usbhs *pUsbhs, uint8_t Ep, uint32_t EpInt)
Definition: usbhs.h:768
__STATIC_INLINE uint32_t USBHS_IsHostConfigOk(Usbhs *pUsbhs, uint8_t Pipe)
Gets USB host interrupt status.
Definition: usbhs.h:1463
__STATIC_INLINE void USBHS_RaiseDmaInt(Usbhs *pUsbhs, uint8_t Dma)
Raise DMA interrupt for endpoint.
Definition: usbhs.h:442
__STATIC_INLINE uint32_t USBHS_GetHostPipeDmaStatus(UsbhsHstdma *pUsbDma)
Get Dma Status.
Definition: usbhs.h:1693
__STATIC_INLINE uint32_t USBHS_IsEPEnabled(Usbhs *pUsbhs, uint8_t Ep)
Checks if Endpoint is enable.
Definition: usbhs.h:584
__STATIC_INLINE void USBHS_DisableSOF(void)
Sets USB host disable the Generation of Start of Frame.
Definition: usbhs.h:1012
__STATIC_INLINE void USBHS_ResetEP(Usbhs *pUsbhs, uint8_t Ep)
Rests Endpoint.
Definition: usbhs.h:572
__STATIC_INLINE bool USBHS_IsUsbFullSpeed(Usbhs *pUsbhs)
Enable or disable USB address.
Definition: usbhs.h:206
#define CHIP_USB_NUMPIPE
Definition: usbhs.h:917
__STATIC_INLINE uint8_t USBHS_HostGetPipeByteCount(Usbhs *pUsbhs, uint8_t Pipe)
Gets USB host interrupt status.
Definition: usbhs.h:1453
__STATIC_INLINE uint32_t USBHS_GetDmaNDA(UsbhsDevdma *pUsbDma)
Gets DMA next descriptor address.
Definition: usbhs.h:831
__STATIC_INLINE void USBHS_SetRemoteWakeUp(Usbhs *pUsbhs)
Set Remote WakeUp mode.
Definition: usbhs.h:355
__STATIC_INLINE void USBHS_AllocateMemory(Usbhs *pUsbhs, uint8_t Ep)
Definition: usbhs.h:661
__STATIC_INLINE void USBHS_HostAckPipeIntType(Usbhs *pUsbhs, uint8_t Pipe, uint32_t intType)
Gets USB host interrupt status.
Definition: usbhs.h:1482
__STATIC_INLINE uint32_t USBHS_IsIntEnable(Usbhs *pUsbhs, uint32_t IntType)
check for interrupt of endpoint.
Definition: usbhs.h:454
__STATIC_INLINE uint8_t USBHS_NumOfBanksInUse(Usbhs *pUsbhs, uint8_t Ep)
Definition: usbhs.h:796
__STATIC_INLINE void USBHS_DisableDMAIntEP(Usbhs *pUsbhs, uint8_t DmaEp)
Disables DMA interrupt for endpoint.
Definition: usbhs.h:543
__STATIC_INLINE void USBHS_HostEnableAutoSw(Usbhs *pUsbhs, uint8_t Pipe)
Gets USB host interrupt status.
Definition: usbhs.h:1381
__STATIC_INLINE uint8_t USBHS_GetAddress(Usbhs *pUsbhs)
Get USB address.
Definition: usbhs.h:298
__STATIC_INLINE uint32_t USBHS_ReadEpIntStatus(Usbhs *pUsbhs, uint8_t EpNum)
Read status for an Endpoint.
Definition: usbhs.h:399
__STATIC_INLINE uint8_t USBHS_IsBankFree(Usbhs *pUsbhs, uint8_t Ep)
Definition: usbhs.h:785
__STATIC_INLINE void USBHS_HostIntDisable(Usbhs *pUsbhs, uint32_t IntType)
Gets USB host interrupt status.
Definition: usbhs.h:1117
__STATIC_INLINE void USBHS_ClearHostStatus(Usbhs *pUsbhs, uint32_t IntType)
Gets USB host interrupt status.
Definition: usbhs.h:1054
__STATIC_INLINE void USBHS_StopReset(void)
Sets USB host sends reste signal on USB Bus.
Definition: usbhs.h:977
__STATIC_INLINE void USBHS_HostSetPipeIntType(Usbhs *pUsbhs, uint8_t Pipe, uint32_t intType)
Gets USB host interrupt status.
Definition: usbhs.h:1492
__STATIC_INLINE void USBHS_EnableIntEP(Usbhs *pUsbhs, uint8_t EpNum)
Enables interrupt for a given endpoint.
Definition: usbhs.h:499
__STATIC_INLINE void USBHS_EnableEP(Usbhs *pUsbhs, uint8_t Ep, uint8_t Enable)
Enables or disables endpoint.
Definition: usbhs.h:556
__STATIC_INLINE uint8_t USBHS_GetFrameNum(Usbhs *pUsbhs)
Get Frame number.
Definition: usbhs.h:605
__STATIC_INLINE uint8_t USBHS_HostGetDataTogSeq(Usbhs *pUsbhs, uint8_t Pipe)
Gets USB host interrupt status.
Definition: usbhs.h:1420
__STATIC_INLINE void USBHS_Ack(Usbhs *pUsbhs, uint32_t AckType)
Raise interrupt for endpoint.
Definition: usbhs.h:244
__STATIC_INLINE uint16_t USBHS_HostGetMSOF(void)
Gets USB host interrupt status.
Definition: usbhs.h:1199
__STATIC_INLINE uint32_t USBHS_ReadEPStatus(Usbhs *pUsbhs, uint8_t Ep, uint32_t EpInt)
Definition: usbhs.h:776
__STATIC_INLINE void USBHS_HostDmaIntEnable(Usbhs *pUsbhs, uint8_t PipeInt)
Gets USB host interrupt status.
Definition: usbhs.h:1168
__STATIC_INLINE void USBHS_HostPipeIntEnable(Usbhs *pUsbhs, uint8_t PipeInt)
Gets USB host interrupt status.
Definition: usbhs.h:1158
__STATIC_INLINE void USBHS_Resume(void)
Sets USB host send Resume on USB bus.
Definition: usbhs.h:986
__STATIC_INLINE void USBHS_AckInt(Usbhs *pUsbhs, uint32_t IntType)
Acknowledge interrupt for endpoint.
Definition: usbhs.h:420
__STATIC_INLINE uint32_t USBHS_GetDmaStatus(UsbhsDevdma *pUsbDma)
Get Dma Status.
Definition: usbhs.h:894
__STATIC_INLINE void USBHS_HostSetErr(Usbhs *pUsbhs, uint8_t Pipe, uint8_t Err)
Gets USB host interrupt status.
Definition: usbhs.h:1569
__STATIC_INLINE void USBHS_HostDisableInReq(Usbhs *pUsbhs, uint8_t Pipe)
Gets USB host interrupt status.
Definition: usbhs.h:1541
__STATIC_INLINE uint16_t USBHS_HostGetSize(Usbhs *pUsbhs, uint8_t Pipe)
Gets USB host interrupt status.
Definition: usbhs.h:1311
__STATIC_INLINE uint16_t USBHS_HostGetSOF(void)
Gets USB host interrupt status.
Definition: usbhs.h:1178
__STATIC_INLINE uint8_t USBHS_HostGetErr(Usbhs *pUsbhs, uint8_t Pipe, uint8_t Err)
Gets USB host interrupt status.
Definition: usbhs.h:1578
__STATIC_INLINE void USBHS_EnableSOF(Usbhs *pUsbhs)
Sets USB host Enable the Generation of Start of Frame.
Definition: usbhs.h:995
__STATIC_INLINE uint32_t USBHS_IsHostPipeEnable(Usbhs *pUsbhs, uint8_t Pipe)
Gets USB host interrupt status.
Definition: usbhs.h:1256
__STATIC_INLINE void USBHS_HostEnablePipeIntType(Usbhs *pUsbhs, uint8_t Pipe, uint32_t intType)
Gets USB host interrupt status.
Definition: usbhs.h:1522
__STATIC_INLINE uint16_t USBHS_HostGetFramePos(void)
Gets USB host interrupt status.
Definition: usbhs.h:1188
__STATIC_INLINE void USBHS_Set(Usbhs *pUsbhs, uint32_t SetStatus)
Raise interrupt for endpoint.
Definition: usbhs.h:257
__STATIC_INLINE void USBHS_EnableDMAIntEP(Usbhs *pUsbhs, uint32_t DmaEp)
Enables DMA interrupt for a given endpoint.
Definition: usbhs.h:510
__STATIC_INLINE void USBHS_HostConfigureDma(UsbhsHstdma *pUsbDma, uint32_t Cfg)
Setup the USBHS DMA.
Definition: usbhs.h:1660
__STATIC_INLINE uint32_t USBHS_IsHostPipeIntEnable(Usbhs *pUsbhs, uint8_t PipeInt)
Gets USB host interrupt status.
Definition: usbhs.h:1093
__STATIC_INLINE void USBHS_DetachUsb(Usbhs *pUsbhs, uint8_t Enable)
Attach or detach USB.
Definition: usbhs.h:309
__STATIC_INLINE uint32_t USBHS_GetHostDmaConfiguration(UsbhsHstdma *pUsbDma)
Get DMA configuration.
Definition: usbhs.h:1670
__STATIC_INLINE void USBHS_HostConfigure(Usbhs *pUsbhs, uint8_t Pipe, uint32_t pipeBank, uint8_t pipeSize, uint32_t pipeType, uint32_t pipeToken, uint8_t pipeEpNum, uint8_t PipeIntFreq)
Gets USB host interrupt status.
Definition: usbhs.h:1276
__STATIC_INLINE void USBHS_SetDmaBuffAdd(UsbhsDevdma *pUsbDma, uint32_t Addr)
Sets USBHS's DMA Buffer addresse.
Definition: usbhs.h:841
__STATIC_INLINE void USBHS_SetHostPipeDmaStatus(UsbhsHstdma *pUsbDma, uint32_t Status)
Set DMA status.
Definition: usbhs.h:1681
__STATIC_INLINE uint8_t USBHS_GetMicroFrameNum(Usbhs *pUsbhs)
Get MicrFrame number.
Definition: usbhs.h:594
__STATIC_INLINE void USBHS_EnableAddress(Usbhs *pUsbhs, uint8_t Enable)
Enable or disable USB address.
Definition: usbhs.h:273
__STATIC_INLINE uint32_t USBHS_HostGetIntTypeStatus(Usbhs *pUsbhs, uint8_t Pipe, uint32_t intType)
Gets USB host interrupt status.
Definition: usbhs.h:1472
__STATIC_INLINE uint16_t USBHS_GetDmaBuffCount(UsbhsDevdma *pUsbDma)
Get DMA buffer's count.
Definition: usbhs.h:905
__STATIC_INLINE uint32_t USBHS_GetHostDmaBuffAdd(UsbhsHstdma *pUsbDma)
Gets USBHS's DMA Buffer addresse.
Definition: usbhs.h:1650
__STATIC_INLINE void USBHS_KillBank(Usbhs *pUsbhs, uint8_t Ep)
Definition: usbhs.h:743
__STATIC_INLINE void USBHS_DisableEPIntType(Usbhs *pUsbhs, uint8_t Ep, uint32_t EpInt)
Definition: usbhs.h:750
__STATIC_INLINE void USBHS_HostInReq(Usbhs *pUsbhs, uint8_t Pipe, uint8_t InReq)
Gets USB host interrupt status.
Definition: usbhs.h:1559
__STATIC_INLINE void USBHS_HostAllocMem(Usbhs *pUsbhs, uint8_t Pipe)
Gets USB host interrupt status.
Definition: usbhs.h:1290
__STATIC_INLINE void USBHS_HostPipeReset(Usbhs *pUsbhs, uint8_t Pipe)
Gets USB host interrupt status.
Definition: usbhs.h:1265
__STATIC_INLINE uint32_t USBHS_GetEpSize(Usbhs *pUsbhs, uint8_t Ep)
Definition: usbhs.h:697
__STATIC_INLINE void USBHS_SetAddress(Usbhs *pUsbhs, uint8_t Addr)
Configure USB address and enable or disable it.
Definition: usbhs.h:287
__STATIC_INLINE void USBHS_AutoSwitchBankEnable(Usbhs *pUsbhs, uint8_t Ep, uint8_t Enable)
Definition: usbhs.h:648
__STATIC_INLINE void USBHS_HostDisableAutoSw(Usbhs *pUsbhs, uint8_t Pipe)
Gets USB host interrupt status.
Definition: usbhs.h:1390
__STATIC_INLINE void USBHS_SetHostHighSpeed(Usbhs *pUsbhs)
Sets USB host's speed to Normal , it sets to HS from FS.
Definition: usbhs.h:938
__STATIC_INLINE uint8_t USBHS_ISUsableClock(Usbhs *pUsbhs)
Check if clock is usable or not.
Definition: usbhs.h:171
__STATIC_INLINE void USBHS_SetDmaNDA(UsbhsDevdma *pUsbDma, uint32_t Desc)
Sets DMA next descriptor address.
Definition: usbhs.h:821