|
uint32_t | GC |
|
uint32_t | CPENA |
|
uint32_t | BUSY0 |
|
uint32_t | BUSY1 |
|
uint32_t | BUSY2 |
|
uint32_t | BUSY3 |
|
uint32_t | ACPE |
|
uint8_t | reserved1 [4] |
|
uint32_t | RLBECTRL |
|
uint32_t | BFINTS |
|
uint32_t | BFINTC |
|
uint8_t | reserved2 [8] |
|
uint32_t | INTOFF0 |
|
uint32_t | INTOFF1 |
|
uint32_t | BIM |
|
uint32_t | RLOSTFL |
|
uint32_t | BFINTFL |
|
uint32_t | BERINTFL |
|
uint32_t | MP1S |
|
uint32_t | MP1E |
|
uint32_t | DCTRL |
|
uint32_t | WPR |
|
uint32_t | WMR |
|
uint32_t | ID |
|
uint32_t | PCR |
|
uint32_t | PAR |
|
uint8_t | reserved3 [4] |
|
uint32_t | MPCS |
|
uint32_t | MP0S |
|
uint32_t | MP0E |
|
The documentation for this struct was generated from the following file:
- bsps/arm/tms570/include/bsp/ti_herc/reg_htu.h