|
|
uint32_t | CTRL0 |
| |
|
uint8_t | reserved1 [4] |
| |
|
uint32_t | CTRL1 |
| |
|
uint8_t | reserved2 [4] |
| |
|
uint32_t | CTRL2 |
| |
|
uint8_t | reserved3 [4] |
| |
|
uint32_t | INTS |
| |
|
uint8_t | reserved4 [4] |
| |
|
uint32_t | INTR |
| |
|
uint8_t | reserved5 [4] |
| |
|
uint32_t | STATUS |
| |
|
uint8_t | reserved6 [4] |
| |
|
uint32_t | INT_OFFS_REG |
| |
|
uint8_t | reserved7 [4] |
| |
|
uint32_t | BUSY |
| |
|
uint8_t | reserved8 [4] |
| |
|
uint32_t | PCOUNT_REG1 |
| |
|
uint32_t | SCOUNT_REG1 |
| |
|
uint32_t | CURSEC_REG1 |
| |
|
uint32_t | WDTOPLD1 |
| |
|
uint32_t | BCTOPLD1 |
| |
|
uint8_t | reserved9 [12] |
| |
|
uint32_t | PSA_SIGREGL1 |
| |
|
uint32_t | PSA_SIGREGH1 |
| |
|
uint32_t | REGL1 |
| |
|
uint32_t | REGH1 |
| |
|
uint32_t | PSA_SECSIGREGL1 |
| |
|
uint32_t | PSA_SECSIGREGH1 |
| |
|
uint32_t | RAW_DATAREGL1 |
| |
|
uint32_t | RAW_DATAREGH1 |
| |
|
uint32_t | PCOUNT_REG2 |
| |
|
uint32_t | SCOUNT_REG2 |
| |
|
uint32_t | CURSEC_REG2 |
| |
|
uint32_t | WDTOPLD2 |
| |
|
uint32_t | BCTOPLD2 |
| |
|
uint8_t | reserved10 [12] |
| |
|
uint32_t | PSA_SIGREGL2 |
| |
|
uint32_t | PSA_SIGREGH2 |
| |
|
uint32_t | REGL2 |
| |
|
uint32_t | REGH2 |
| |
|
uint32_t | PSA_SECSIGREGL2 |
| |
|
uint32_t | PSA_SECSIGREGH2 |
| |
|
uint32_t | RAW_DATAREGL2 |
| |
|
uint32_t | RAW_DATAREGH2 |
| |
|
uint8_t | reserved11 [128] |
| |
|
uint32_t | BUS_SEL |
| |
The documentation for this struct was generated from the following file:
- bsps/arm/tms570/include/bsp/ti_herc/reg_crc.h
1.9.4