|
|
uint8_t | reserved0_8000 [0x08030-0x08000] |
| |
|
volatile uint32_t | omisr |
| |
|
volatile uint32_t | omimr |
| |
|
uint8_t | reserved0_8038 [0x08050-0x08038] |
| |
|
volatile uint32_t | imr0 |
| |
|
volatile uint32_t | imr1 |
| |
|
volatile uint32_t | omr0 |
| |
|
volatile uint32_t | omr1 |
| |
|
volatile uint32_t | odr |
| |
|
uint8_t | reserved0_8064 [0x08068-0x08064] |
| |
|
volatile uint32_t | idr |
| |
|
uint8_t | reserved0_806C [0x08080-0x0806C] |
| |
|
volatile uint32_t | imisr |
| |
|
volatile uint32_t | imimr |
| |
|
uint8_t | reserved0_8088 [0x080A8-0x08088] |
| |
|
struct m83xxDMARegisters_::m83xxDMAChannelRegisters_ | chan [4] |
| |
|
volatile uint32_t | dmagsr |
| |
|
uint8_t | reserved0_82AC [0x082FF-0x082AC] |
| |
The documentation for this struct was generated from the following file:
1.9.4