RTEMS
6.1-rc1
bsps
powerpc
include
libcpu
spr.h
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/*
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* spr.h -- Access to special purpose registers.
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*
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* Copyright (C) 1998 Gabriel Paubert, paubert@iram.es
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*
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* Modified to compile in RTEMS development environment
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* by Eric Valette
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*
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* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*
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*/
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#ifndef _LIBCPU_SPR_H
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#define _LIBCPU_SPR_H
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#include <
rtems/powerpc/registers.h
>
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#define __MFSPR(reg, val) \
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__asm__ __volatile__("mfspr %0,"
#reg : "=r" (val))
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#define __MTSPR(val, reg) \
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__asm__ __volatile__("mtspr "
#reg",%0" : : "r" (val))
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#define SPR_RW(reg) \
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static inline unsigned long _read_##reg(void) \
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{\
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unsigned long val;\
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__MFSPR(reg, val);\
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return val;\
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}\
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static inline void _write_##reg(unsigned long val)\
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{\
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__MTSPR(val,reg);\
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return;\
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}
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#define SPR_RO(reg) \
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static inline unsigned long _read_##reg(void) \
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{\
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unsigned long val;\
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__MFSPR(reg,val);\
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return val;\
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}
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static
inline
unsigned
long
_read_MSR(
void
)
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{
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unsigned
long
val;
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__asm__
volatile
(
"mfmsr %0"
:
"=r"
(val));
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return
val;
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}
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static
inline
void
_write_MSR(
unsigned
long
val)
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{
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__asm__
volatile
(
"mtmsr %0"
: :
"r"
(val));
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return
;
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}
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static
inline
unsigned
long
_read_SR(
void
* va)
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{
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unsigned
long
val;
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__asm__
volatile
(
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".machine \"push\"\n"
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".machine \"any\"\n"
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"mfsrin %0,%1\n"
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".machine \"pop\""
:
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"=r"
(val) :
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"r"
(va)
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);
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return
val;
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}
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static
inline
void
_write_SR(
unsigned
long
val,
void
* va)
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{
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__asm__
volatile
(
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".machine \"push\"\n"
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".machine \"any\"\n"
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"mtsrin %0,%1\n"
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".machine \"pop\""
: :
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"r"
(val) ,
"r"
(va) :
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"memory"
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);
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return
;
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}
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#endif
__asm__
register struct Per_CPU_Control *_SPARC_Per_CPU_current __asm__("g6")
The pointer to the current per-CPU control is available via register g6.
registers.h
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