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RTEMS 6.1-rc1
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53#ifndef __sed1356_16bit_h
54#define __sed1356_16bit_h
79#define SED1356_REG_REV_and_MISC SED_REG16(0x00)
80#define SED1356_REG_GPIO_CFG SED_REG16(0x04)
81#define SED1356_REG_GPIO_CTL SED_REG16(0x08)
82#define SED1356_REG_MD_CFG_RD_LO_and_HI SED_REG16(0x0c)
83#define SED1356_REG_MCLK_CFG SED_REG16(0x10)
84#define SED1356_REG_LCD_PCLK_CFG SED_REG16(0x14)
85#define SED1356_REG_CRT_PCLK_CFG SED_REG16(0x18)
86#define SED1356_REG_MEDIA_PCLK_CFG SED_REG16(0x1c)
87#define SED1356_REG_WAIT_STATE SED_REG16(0x1e)
88#define SED1356_REG_MEM_CFG_and_REF_RATE SED_REG16(0x20)
89#define SED1356_REG_MEM_TMG0_and_1 SED_REG16(0x2a)
90#define SED1356_REG_PANEL_TYPE_and_MOD_RATE SED_REG16(0x30)
92#define SED1356_REG_LCD_HOR_DISP SED_REG16(0x32)
93#define SED1356_REG_LCD_HOR_NONDISP_and_START SED_REG16(0x34)
94#define SED1356_REG_LCD_HOR_PULSE SED_REG16(0x36)
95#define SED1356_REG_LCD_VER_DISP_HT_LO_and_HI SED_REG16(0x38)
96#define SED1356_REG_LCD_VER_NONDISP_and_START SED_REG16(0x3a)
97#define SED1356_REG_LCD_VER_PULSE SED_REG16(0x3c)
98#define SED1356_REG_LCD_DISP_MODE_and_MISC SED_REG16(0x40)
99#define SED1356_REG_LCD_DISP_START_LO_and_MID SED_REG16(0x42)
100#define SED1356_REG_LCD_DISP_START_HI SED_REG16(0x44)
101#define SED1356_REG_LCD_ADD_OFFSET_LO_and_HI SED_REG16(0x46)
102#define SED1356_REG_LCD_PIXEL_PAN SED_REG16(0x48)
103#define SED1356_REG_LCD_FIFO_THRESH_LO_and_HI SED_REG16(0x4a)
105#define SED1356_REG_CRT_HOR_DISP SED_REG16(0x50)
106#define SED1356_REG_CRT_HOR_NONDISP_and_START SED_REG16(0x52)
107#define SED1356_REG_CRT_HOR_PULSE SED_REG16(0x54)
108#define SED1356_REG_CRT_VER_DISP_HT_LO_and_HI SED_REG16(0x56)
109#define SED1356_REG_CRT_VER_NONDISP_and_START SED_REG16(0x58)
110#define SED1356_REG_CRT_VER_PULSE_and_OUT_CTL SED_REG16(0x5a)
111#define SED1356_REG_CRT_DISP_MODE SED_REG16(0x60)
112#define SED1356_REG_CRT_DISP_START_LO_and_MID SED_REG16(0x62)
113#define SED1356_REG_CRT_DISP_START_HI SED_REG16(0x64)
114#define SED1356_REG_CRT_ADD_OFFSET_LO_and_HI SED_REG16(0x66)
115#define SED1356_REG_CRT_PIXEL_PAN SED_REG16(0x68)
116#define SED1356_REG_CRT_FIFO_THRESH_LO_and_HI SED_REG16(0x6a)
118#define SED1356_REG_LCD_CURSOR_CTL_and_START_ADD SED_REG16(0x70)
119#define SED1356_REG_LCD_CURSOR_X_POS_LO_and_HI SED_REG16(0x72)
120#define SED1356_REG_LCD_CURSOR_Y_POS_LO_and_HI SED_REG16(0x74)
121#define SED1356_REG_LCD_CURSOR_BLUE_and_GREEN_CLR_0 SED_REG16(0x76)
122#define SED1356_REG_LCD_CURSOR_RED_CLR_0 SED_REG16(0x78)
123#define SED1356_REG_LCD_CURSOR_BLUE_and_GREEN_CLR_1 SED_REG16(0x7a)
124#define SED1356_REG_LCD_CURSOR_RED_CLR_1 SED_REG16(0x7c)
125#define SED1356_REG_LCD_CURSOR_FIFO_THRESH SED_REG16(0x7e)
127#define SED1356_REG_CRT_CURSOR_CTL_and_START_ADD SED_REG16(0x80)
128#define SED1356_REG_CRT_CURSOR_X_POS_LO_and_HI SED_REG16(0x82)
129#define SED1356_REG_CRT_CURSOR_Y_POS_LO_and_HI SED_REG16(0x84)
130#define SED1356_REG_CRT_CURSOR_BLUE_and_GREEN_CLR_0 SED_REG16(0x86)
131#define SED1356_REG_CRT_CURSOR_RED_CLR_0 SED_REG16(0x88)
132#define SED1356_REG_CRT_CURSOR_BLUE_and_GREEN_CLR_1 SED_REG16(0x8a)
133#define SED1356_REG_CRT_CURSOR_RED_CLR_1 SED_REG16(0x8c)
134#define SED1356_REG_CRT_CURSOR_FIFO_THRESH SED_REG16(0x8e)
136#define SED1356_REG_BLT_CTL_0_and_1 SED_REG16(0x100)
137#define SED1356_REG_BLT_ROP_CODE_and_BLT_OP SED_REG16(0x102)
138#define SED1356_REG_BLT_SRC_START_LO_and_MID SED_REG16(0x104)
139#define SED1356_REG_BLT_SRC_START_HI SED_REG16(0x106)
140#define SED1356_REG_BLT_DEST_START_LO_and_MID SED_REG16(0x108)
141#define SED1356_REG_BLT_DEST_START_HI SED_REG16(0x10a)
142#define SED1356_REG_BLT_ADD_OFFSET_LO_and_HI SED_REG16(0x10c)
143#define SED1356_REG_BLT_WID_LO_and_HI SED_REG16(0x110)
144#define SED1356_REG_BLT_HGT_LO_and_HI SED_REG16(0x112)
145#define SED1356_REG_BLT_BG_CLR_LO_and_HI SED_REG16(0x114)
146#define SED1356_REG_BLT_FG_CLR_LO_and_HI SED_REG16(0x118)
148#define SED1356_REG_LUT_MODE SED_REG16(0x1e0)
149#define SED1356_REG_LUT_ADD SED_REG16(0x1e2)
150#define SED1356_REG_LUT_DATA SED_REG16(0x1e4)
152#define SED1356_REG_PWR_CFG_and_STAT SED_REG16(0x1f0)
153#define SED1356_REG_WATCHDOG_CTL SED_REG16(0x1f4)
154#define SED1356_REG_DISP_MODE SED_REG16(0x1fc)
161#define SED1356_REV_ID_MASK 0xfc
162#define SED1356_REV_ID_1356 BIT4
163#define SED1356_REV_ID_1355 BIT3
166#define SED1356_MISC_HOST_DIS BIT7 << 8
169#define SED1356_GPIO_GPIO3 BIT3
170#define SED1356_GPIO_GPIO2 BIT2
171#define SED1356_GPIO_GPIO1 BIT1
174#define SED1356_MCLK_DIV2 BIT4
175#define SED1356_MCLK_SRC_BCLK BIT0
176#define SED1356_MCLK_SRC_CLKI 0x00
181#define SED1356_PCLK_X2 BIT7
182#define SED1356_PCLK_DIV1 0x00 << 4
183#define SED1356_PCLK_DIV2 0x01 << 4
184#define SED1356_PCLK_DIV3 0x02 << 4
185#define SED1356_PCLK_DIV4 0x03 << 4
186#define SED1356_PCLK_SRC_CLKI 0x00
187#define SED1356_PCLK_SRC_BCLK 0x01
188#define SED1356_PCLK_SRC_CLKI2 0x02
189#define SED1356_PCLK_SRC_MCLK 0x03
192#define SED1356_MEM_CFG_2CAS_EDO 0x00
193#define SED1356_MEM_CFG_2CAS_FPM 0x01
194#define SED1356_MEM_CFG_2WE_EDO 0x02
195#define SED1356_MEM_CFG_2WE_FPM 0x03
196#define SED1356_MEM_CFG_MASK 0x03
199#define SED1356_REF_TYPE_CBR 0x00 << 6 << 8
200#define SED1356_REF_TYPE_SELF 0x01 << 6 << 8
201#define SED1356_REF_TYPE_NONE 0x02 << 6 << 8
202#define SED1356_REF_TYPE_MASK 0x03 << 6 << 8
203#define SED1356_REF_RATE_64 0x00 << 0 << 8
204#define SED1356_REF_RATE_128 0x01 << 0 << 8
205#define SED1356_REF_RATE_256 0x02 << 0 << 8
206#define SED1356_REF_RATE_512 0x03 << 0 << 8
207#define SED1356_REF_RATE_1024 0x04 << 0 << 8
208#define SED1356_REF_RATE_2048 0x05 << 0 << 8
209#define SED1356_REF_RATE_4096 0x06 << 0 << 8
210#define SED1356_REF_RATE_8192 0x07 << 0 << 8
211#define SED1356_REF_RATE_MASK 0x07 << 0 << 8
214#define SED1356_MEM_TMG0_EDO50_MCLK40 0x01
215#define SED1356_MEM_TMG0_EDO50_MCLK33 0x01
216#define SED1356_MEM_TMG0_EDO60_MCLK33 0x01
217#define SED1356_MEM_TMG0_EDO50_MCLK30 0x12
218#define SED1356_MEM_TMG0_EDO60_MCLK30 0x01
219#define SED1356_MEM_TMG0_EDO70_MCLK30 0x00
220#define SED1356_MEM_TMG0_EDO50_MCLK25 0x12
221#define SED1356_MEM_TMG0_EDO60_MCLK25 0x12
222#define SED1356_MEM_TMG0_EDO70_MCLK25 0x01
223#define SED1356_MEM_TMG0_EDO80_MCLK25 0x00
224#define SED1356_MEM_TMG0_EDO50_MCLK20 0x12
225#define SED1356_MEM_TMG0_EDO60_MCLK20 0x12
226#define SED1356_MEM_TMG0_EDO70_MCLK20 0x12
227#define SED1356_MEM_TMG0_EDO80_MCLK20 0x01
228#define SED1356_MEM_TMG0_FPM50_MCLK25 0x12
229#define SED1356_MEM_TMG0_FPM60_MCLK25 0x01
230#define SED1356_MEM_TMG0_FPM50_MCLK20 0x12
231#define SED1356_MEM_TMG0_FPM60_MCLK20 0x12
232#define SED1356_MEM_TMG0_FPM70_MCLK20 0x11
233#define SED1356_MEM_TMG0_FPM80_MCLK20 0x01
236#define SED1356_MEM_TMG1_EDO50_MCLK40 0x01 << 8
237#define SED1356_MEM_TMG1_EDO50_MCLK33 0x01 << 8
238#define SED1356_MEM_TMG1_EDO60_MCLK33 0x01 << 8
239#define SED1356_MEM_TMG1_EDO50_MCLK30 0x02 << 8
240#define SED1356_MEM_TMG1_EDO60_MCLK30 0x01 << 8
241#define SED1356_MEM_TMG1_EDO70_MCLK30 0x00 << 8
242#define SED1356_MEM_TMG1_EDO50_MCLK25 0x02 << 8
243#define SED1356_MEM_TMG1_EDO60_MCLK25 0x02 << 8
244#define SED1356_MEM_TMG1_EDO70_MCLK25 0x01 << 8
245#define SED1356_MEM_TMG1_EDO80_MCLK25 0x01 << 8
246#define SED1356_MEM_TMG1_EDO50_MCLK20 0x02 << 8
247#define SED1356_MEM_TMG1_EDO60_MCLK20 0x02 << 8
248#define SED1356_MEM_TMG1_EDO70_MCLK20 0x02 << 8
249#define SED1356_MEM_TMG1_EDO80_MCLK20 0x01 << 8
250#define SED1356_MEM_TMG1_FPM50_MCLK25 0x02 << 8
251#define SED1356_MEM_TMG1_FPM60_MCLK25 0x01 << 8
252#define SED1356_MEM_TMG1_FPM50_MCLK20 0x02 << 8
253#define SED1356_MEM_TMG1_FPM60_MCLK20 0x02 << 8
254#define SED1356_MEM_TMG1_FPM70_MCLK20 0x02 << 8
255#define SED1356_MEM_TMG1_FPM80_MCLK20 0x01 << 8
262#define SED1356_PANEL_TYPE_EL BIT7
263#define SED1356_PANEL_TYPE_4_9 (0x00 << 4)
264#define SED1356_PANEL_TYPE_8_12 (0x01 << 4)
265#define SED1356_PANEL_TYPE_16 (0x02 << 4)
266#define SED1356_PANEL_TYPE_MASK (0x03 << 4)
267#define SED1356_PANEL_TYPE_FMT BIT3
268#define SED1356_PANEL_TYPE_CLR BIT2
269#define SED1356_PANEL_TYPE_DUAL BIT1
270#define SED1356_PANEL_TYPE_TFT BIT0
275#define SED1356_PULSE_POL_HIGH BIT7
276#define SED1356_PULSE_POL_LOW 0x00
277#define SED1356_PULSE_WID(_x_) (_x_ & 0x0f)
280#define SED1356_LCD_DISP_BLANK BIT7
281#define SED1356_LCD_DISP_SWIV_NORM (0x00 << 4)
282#define SED1356_LCD_DISP_SWIV_90 (0x00 << 4)
283#define SED1356_LCD_DISP_SWIV_180 (0x01 << 4)
284#define SED1356_LCD_DISP_SWIV_270 (0x01 << 4)
285#define SED1356_LCD_DISP_SWIV_MASK (0x01 << 4)
286#define SED1356_LCD_DISP_16BPP 0x05
287#define SED1356_LCD_DISP_15BPP 0x04
288#define SED1356_LCD_DISP_8BPP 0x03
289#define SED1356_LCD_DISP_4BPP 0x02
290#define SED1356_LCD_DISP_BPP_MASK 0x07
293#define SED1356_LCD_MISC_DITH BIT1 << 8
294#define SED1356_LCD_MISC_DUAL BIT0 << 8
297#define SED1356_CRT_OUT_CHROM BIT5 << 8
298#define SED1356_CRT_OUT_LUM BIT4 << 8
299#define SED1356_CRT_OUT_DAC_LVL BIT3 << 8
300#define SED1356_CRT_OUT_SVIDEO BIT1 << 8
301#define SED1356_CRT_OUT_PAL BIT0 << 8
304#define SED1356_CRT_DISP_BLANK BIT7
305#define SED1356_CRT_DISP_16BPP 0x05
306#define SED1356_CRT_DISP_15BPP 0x04
307#define SED1356_CRT_DISP_8BPP 0x03
308#define SED1356_CRT_DISP_4BPP 0x02
309#define SED1356_CRT_DISP_BPP_MASK 0x07
312#define SED1356_DISP_SWIV_NORM (0x00 << 6)
313#define SED1356_DISP_SWIV_90 (0x01 << 6)
314#define SED1356_DISP_SWIV_180 (0x00 << 6)
315#define SED1356_DISP_SWIV_270 (0x01 << 6)
316#define SED1356_DISP_MODE_OFF 0x00
317#define SED1356_DISP_MODE_LCD 0x01
318#define SED1356_DISP_MODE_CRT 0x02
319#define SED1356_DISP_MODE_LCD_CRT 0x03
320#define SED1356_DISP_MODE_TV 0x04
321#define SED1356_DISP_MODE_TV_LCD 0x05
322#define SED1356_DISP_MODE_TV_FLICK 0x06
323#define SED1356_DISP_MODE_TV_LCD_FLICK 0x07
326#define SED1356_PWR_PCLK BIT1
327#define SED1356_PWR_MCLK BIT0
330#define SED1356_VER_NONDISP BIT7
333extern long PIXELS_PER_ROW;
334extern long PIXELS_PER_COL;
335#define BYTES_PER_PIXEL 2
336extern long COLS_PER_SCREEN;
337extern long ROWS_PER_SCREEN;
341#define RED_SUBPIXEL(n) ((n & 0x1f) << 11)
342#define GREEN_SUBPIXEL(n) ((n & 0x1f) << 5)
343#define BLUE_SUBPIXEL(n) ((n & 0x1f) << 0)
347#define LU_BLACK (RED_SUBPIXEL(0x00) | GREEN_SUBPIXEL(0x00) | BLUE_SUBPIXEL(0x00))
348#define LU_BLUE (RED_SUBPIXEL(0x00) | GREEN_SUBPIXEL(0x00) | BLUE_SUBPIXEL(0x0f))
349#define LU_GREEN (RED_SUBPIXEL(0x00) | GREEN_SUBPIXEL(0x0f) | BLUE_SUBPIXEL(0x00))
350#define LU_CYAN (RED_SUBPIXEL(0x00) | GREEN_SUBPIXEL(0x0f) | BLUE_SUBPIXEL(0x0f))
351#define LU_RED (RED_SUBPIXEL(0x0f) | GREEN_SUBPIXEL(0x00) | BLUE_SUBPIXEL(0x00))
352#define LU_VIOLET (RED_SUBPIXEL(0x0f) | GREEN_SUBPIXEL(0x00) | BLUE_SUBPIXEL(0x0f))
353#define LU_YELLOW (RED_SUBPIXEL(0x0f) | GREEN_SUBPIXEL(0x0f) | BLUE_SUBPIXEL(0x00))
354#define LU_GREY (RED_SUBPIXEL(0x0f) | GREEN_SUBPIXEL(0x0f) | BLUE_SUBPIXEL(0x0f))
355#define LU_WHITE (RED_SUBPIXEL(0x17) | GREEN_SUBPIXEL(0x17) | BLUE_SUBPIXEL(0x17))
356#define LU_BRT_BLUE (RED_SUBPIXEL(0x00) | GREEN_SUBPIXEL(0x00) | BLUE_SUBPIXEL(0x1f))
357#define LU_BRT_GREEN (RED_SUBPIXEL(0x00) | GREEN_SUBPIXEL(0x1f) | BLUE_SUBPIXEL(0x00))
358#define LU_BRT_CYAN (RED_SUBPIXEL(0x00) | GREEN_SUBPIXEL(0x1f) | BLUE_SUBPIXEL(0x1f))
359#define LU_BRT_RED (RED_SUBPIXEL(0x1f) | GREEN_SUBPIXEL(0x00) | BLUE_SUBPIXEL(0x00))
360#define LU_BRT_VIOLET (RED_SUBPIXEL(0x1f) | GREEN_SUBPIXEL(0x00) | BLUE_SUBPIXEL(0x1f))
361#define LU_BRT_YELLOW (RED_SUBPIXEL(0x1f) | GREEN_SUBPIXEL(0x1f) | BLUE_SUBPIXEL(0x00))
362#define LU_BRT_WHITE (RED_SUBPIXEL(0x1f) | GREEN_SUBPIXEL(0x1f) | BLUE_SUBPIXEL(0x1f))
364 { 0x00, 0x00, 0x00, },
365 { 0x00, 0x00, 0xA0, },
366 { 0x00, 0xA0, 0x00, },
367 { 0x00, 0xA0, 0xA0, },
368 { 0xA0, 0x00, 0x00, },
369 { 0xA0, 0x00, 0xA0, },
370 { 0xA0, 0xA0, 0x00, },
371 { 0xA0, 0xA0, 0xA0, },
372 { 0x50, 0x50, 0x50, },
373 { 0x50, 0x50, 0xF0, },
374 { 0x50, 0xF0, 0x50, },
375 { 0x50, 0xF0, 0xF0, },
376 { 0xF0, 0x50, 0x50, },
377 { 0xF0, 0x50, 0xF0, },
378 { 0xF0, 0xF0, 0x50, },
379 { 0xF0, 0xF0, 0xF0, },
382#define BLUE (0x14 << 0)
383#define GREEN (0x14 << 6)
384#define RED (0x14 << 11)
386#define HALF_BLUE (0x0a << 0)
387#define HALF_GREEN (0x0a << 6)
388#define HALF_RED (0x0a << 11)
391#define BRT_BLUE (0x1e << 0)
392#define BRT_GREEN (0x1e << 6)
393#define BRT_RED (0x1e << 11)
396#define LU_BLUE (BLUE)
397#define LU_GREEN (GREEN)
398#define LU_CYAN (GREEN | BLUE)
400#define LU_VIOLET (RED | BLUE)
401#define LU_YELLOW (RED | GREEN)
402#define LU_WHITE (RED | GREEN | BLUE)
403#define LU_GREY (HALF_RED | HALF_GREEN | HALF_BLUE)
404#define LU_BRT_BLUE (HALF_RED | HALF_GREEN | BRT_BLUE)
405#define LU_BRT_GREEN (HALF_RED | BRT_GREEN | HALF_BLUE)
406#define LU_BRT_CYAN (HALF_RED | BRT_GREEN | BRT_BLUE)
407#define LU_BRT_RED (BRT_RED | HALF_GREEN | HALF_BLUE)
408#define LU_BRT_VIOLET (BRT_RED | HALF_GREEN | BRT_BLUE)
409#define LU_BRT_YELLOW (BRT_RED | BRT_GREEN | HALF_BLUE)
410#define LU_BRT_WHITE (BRT_RED | BRT_GREEN | BRT_BLUE)
412const ushort vga_lookup[] = {
437#define BOTTOM (PIXELS_PER_COL-1)
439#define RIGHT (PIXELS_PER_ROW-1)
440#define CENTER_X (PIXELS_PER_ROW/2)
441#define CENTER_Y (PIXELS_PER_COL/2)
475#define SED_HOR_PULSE_WIDTH_CRT 0x07
476#define SED_HOR_PULSE_START_CRT 0x02
477#define SED_HOR_NONDISP_CRT 0x17
500#define SED_VER_PULSE_WIDTH_CRT 0x02
501#define SED_VER_PULSE_START_CRT 0x08
502#define SED_VER_NONDISP_CRT 0x27
532extern long SED_HOR_PULSE_WIDTH_LCD;
533extern long SED_HOR_PULSE_START_LCD;
534extern long SED_HOR_NONDISP_LCD;
562extern long SED_VER_PULSE_WIDTH_LCD;
563extern long SED_VER_PULSE_START_LCD;
564extern long SED_VER_NONDISP_LCD;