44#define Size(pAt25) ((pAt25)->pDesc->size)
45#define PageSize(pAt25) ((pAt25)->pDesc->pageSize)
46#define BlockSize(pAt25) ((pAt25)->pDesc->blockSize)
47#define Name(pAt25) ((pAt25)->pDesc->name)
48#define ManId(pAt25) (((pAt25)->pDesc->jedecId) & 0xFF)
49#define PageNumber(pAt25) (Size(pAt25) / PageSize(pAt25))
50#define BlockNumber(pAt25) (Size(pAt25) / BlockSize(pAt25))
51#define PagePerBlock(pAt25) (BlockSize(pAt25) / PageSize(pAt25))
52#define BlockEraseCmd(pAt25) ((pAt25)->pDesc->blockEraseCmd)
59#define ERROR_PROTECTED 1
63#define ERROR_PROGRAM 3
68#define STATUS_RDYBSY (1 << 0)
70#define STATUS_RDYBSY_READY (0 << 0)
72#define STATUS_RDYBSY_BUSY (1 << 0)
74#define STATUS_WEL (1 << 1)
76#define STATUS_WEL_DISABLED (0 << 1)
78#define STATUS_WEL_ENABLED (1 << 1)
80#define STATUS_SWP (3 << 2)
82#define STATUS_SWP_PROTALL (3 << 2)
84#define STATUS_SWP_PROTSOME (1 << 2)
86#define STATUS_SWP_PROTNONE (0 << 2)
88#define STATUS_WPP (1 << 4)
90#define STATUS_WPP_NOTASSERTED (0 << 4)
92#define STATUS_WPP_ASSERTED (1 << 4)
94#define STATUS_EPE (1 << 5)
96#define STATUS_EPE_SUCCESS (0 << 5)
98#define STATUS_EPE_ERROR (1 << 5)
100#define STATUS_SPRL (1 << 7)
102#define STATUS_SPRL_UNLOCKED (0 << 7)
104#define STATUS_SPRL_LOCKED (1 << 7)
107#define STATUS_QUAD_ENABLE (1 << 1)
109#define STATUS_WRAP_ENABLE (0 << 4)
112#define STATUS_LATENCY_CTRL (0xF << 0)
114#define STATUS_WRAP_BYTE (1 << 5)
116#define BLOCK_PROTECT_Msk (7 << 2)
118#define TOP_BTM_PROTECT_Msk (1 << 5)
120#define SEC_PROTECT_Msk (1 << 6)
122#define CHIP_PROTECT_Msk (0x1F << 2)
125#define READ_ARRAY 0x0B
127#define READ_ARRAY_LF 0x03
129#define READ_ARRAY_DUAL 0x3B
131#define READ_ARRAY_QUAD 0x6B
133#define READ_ARRAY_DUAL_IO 0xBB
135#define READ_ARRAY_QUAD_IO 0xEB
137#define BLOCK_ERASE_4K 0x20
139#define BLOCK_ERASE_32K 0x52
141#define BLOCK_ERASE_64K 0xD8
143#define CHIP_ERASE_1 0x60
145#define CHIP_ERASE_2 0xC7
147#define BYTE_PAGE_PROGRAM 0x02
149#define SEQUENTIAL_PROGRAM_1 0xAD
151#define SEQUENTIAL_PROGRAM_2 0xAF
153#define WRITE_ENABLE 0x06
155#define WRITE_DISABLE 0x04
157#define PROTECT_SECTOR 0x36
159#define UNPROTECT_SECTOR 0x39
161#define READ_SECTOR_PROT 0x3C
163#define READ_STATUS_1 0x05
165#define READ_STATUS_2 0x35
167#define READ_STATUS_3 0x33
169#define WRITE_STATUS 0x01
171#define READ_JEDEC_ID 0x9F
173#define DEEP_PDOWN 0xB9
175#define RES_DEEP_PDOWN 0xAB
177#define SOFT_RESET_ENABLE 0x66
179#define SOFT_RESET 0x99
181#define WRAP_ENABLE 0x77
183#define CONT_MODE_RESET 0xFF
186#define ATMEL_SPI_FLASH 0x1F
187#define ST_SPI_FLASH 0x20
188#define WINBOND_SPI_FLASH 0xEF
189#define MACRONIX_SPI_FLASH 0xC2
190#define SST_SPI_FLASH 0xBF
196uint32_t S25FL1D_ReadJedecId(
void);
198void S25FL1D_InitFlashInterface(uint8_t Mode);
200void S25FL1D_SoftReset(
void);
202void S25FL1D_ContReadModeReset(
void);
203unsigned char S25FL1D_Unprotect(
void);
205unsigned char S25FL1D_Protect(uint32_t StartAddr, uint32_t Size);
207void S25FL1D_QuadMode(uint8_t Enable);
209void S25FL1D_EnableWrap(uint8_t ByetAlign);
211void S25FL1D_SetReadLatencyControl(uint8_t Latency);
213unsigned char S25FL1D_EraseChip(
void);
215unsigned char S25FL1D_EraseSector(
unsigned int address);
217unsigned char S25FL1D_Erase64KBlock(
unsigned int address);
219unsigned char S25FL1D_Write(
225extern unsigned char S25FL1D_Read(
230extern unsigned char S25FL1D_ReadDual(
235extern unsigned char S25FL1D_ReadQuad(
240extern unsigned char S25FL1D_ReadDualIO(
247extern unsigned char S25FL1D_ReadQuadIO(
unsigned size
Definition: tte.h:1